| 1 | /* |
| 2 | * QEMU PowerPC PowerNV Emulation of some CHIPTOD behaviour |
| 3 | * |
| 4 | * Copyright (c) 2022-2023, IBM Corporation. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #ifndef PPC_PNV_CHIPTOD_H |
| 10 | #define PPC_PNV_CHIPTOD_H |
| 11 | |
| 12 | #include "qom/object.h" |
| 13 | |
| 14 | #define TYPE_PNV_CHIPTOD "pnv-chiptod" |
| 15 | OBJECT_DECLARE_TYPE(PnvChipTOD, PnvChipTODClass, PNV_CHIPTOD) |
| 16 | #define TYPE_PNV9_CHIPTOD TYPE_PNV_CHIPTOD "-POWER9" |
| 17 | DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV9_CHIPTOD, TYPE_PNV9_CHIPTOD) |
| 18 | #define TYPE_PNV10_CHIPTOD TYPE_PNV_CHIPTOD "-POWER10" |
| 19 | DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV10_CHIPTOD, TYPE_PNV10_CHIPTOD) |
| 20 | #define TYPE_PNV11_CHIPTOD TYPE_PNV_CHIPTOD "-POWER11" |
| 21 | DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV11_CHIPTOD, TYPE_PNV11_CHIPTOD) |
| 22 | |
| 23 | enum tod_state { |
| 24 | tod_error = 0, |
| 25 | tod_not_set = 7, |
| 26 | tod_running = 2, |
| 27 | tod_stopped = 1, |
| 28 | }; |
| 29 | |
| 30 | typedef struct PnvCore PnvCore; |
| 31 | |
| 32 | struct PnvChipTOD { |
| 33 | DeviceState xd; |
| 34 | |
| 35 | PnvChip *chip; |
| 36 | MemoryRegion xscom_regs; |
| 37 | |
| 38 | bool primary; |
| 39 | bool secondary; |
| 40 | enum tod_state tod_state; |
| 41 | uint64_t tod_error; |
| 42 | uint64_t pss_mss_ctrl_reg; |
| 43 | PnvCore *slave_pc_target; |
| 44 | uint64_t tx_ttype_ctrl; |
| 45 | uint8_t tod_state_val; |
| 46 | }; |
| 47 | |
| 48 | struct PnvChipTODClass { |
| 49 | DeviceClass parent_class; |
| 50 | |
| 51 | void (*broadcast_ttype)(PnvChipTOD *sender, uint32_t trigger); |
| 52 | PnvCore *(*tx_ttype_target)(PnvChipTOD *chiptod, uint64_t val); |
| 53 | |
| 54 | int xscom_size; |
| 55 | }; |
| 56 | |
| 57 | #endif /* PPC_PNV_CHIPTOD_H */ |