| 1 | /* |
| 2 | * QEMU emulation of an RISC-V IOMMU |
| 3 | * |
| 4 | * Copyright (C) 2022-2023 Rivos Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2 or later, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #ifndef HW_RISCV_IOMMU_H |
| 20 | #define HW_RISCV_IOMMU_H |
| 21 | |
| 22 | #include "qom/object.h" |
| 23 | |
| 24 | #define TYPE_RISCV_IOMMU "riscv-iommu" |
| 25 | OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUState, RISCV_IOMMU) |
| 26 | |
| 27 | #define TYPE_RISCV_IOMMU_MEMORY_REGION "riscv-iommu-mr" |
| 28 | typedef struct RISCVIOMMUSpace RISCVIOMMUSpace; |
| 29 | |
| 30 | #define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci" |
| 31 | OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStatePci, RISCV_IOMMU_PCI) |
| 32 | |
| 33 | #define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device" |
| 34 | OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStateSys, RISCV_IOMMU_SYS) |
| 35 | |
| 36 | #define FDT_IRQ_TYPE_EDGE_LOW 1 |
| 37 | |
| 38 | #endif |