| 1 | /* |
| 2 | * ASPEED AST2400 Timer |
| 3 | * |
| 4 | * Andrew Jeffery <andrew@aj.id.au> |
| 5 | * |
| 6 | * Copyright (C) 2016 IBM Corp. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along |
| 19 | * with this program; if not, see <https://www.gnu.org/licenses/>. |
| 20 | */ |
| 21 | #ifndef ASPEED_TIMER_H |
| 22 | #define ASPEED_TIMER_H |
| 23 | |
| 24 | #include "qemu/timer.h" |
| 25 | #include "hw/misc/aspeed_scu.h" |
| 26 | #include "qom/object.h" |
| 27 | |
| 28 | #define TYPE_ASPEED_TIMER "aspeed.timer" |
| 29 | OBJECT_DECLARE_TYPE(AspeedTimerCtrlState, AspeedTimerClass, ASPEED_TIMER) |
| 30 | #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" |
| 31 | #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" |
| 32 | #define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600" |
| 33 | #define TYPE_ASPEED_1030_TIMER TYPE_ASPEED_TIMER "-ast1030" |
| 34 | #define TYPE_ASPEED_2700_TIMER TYPE_ASPEED_TIMER "-ast2700" |
| 35 | |
| 36 | #define ASPEED_TIMER_NR_TIMERS 8 |
| 37 | |
| 38 | typedef struct AspeedTimer { |
| 39 | qemu_irq irq; |
| 40 | |
| 41 | uint8_t id; |
| 42 | QEMUTimer timer; |
| 43 | |
| 44 | /** |
| 45 | * Track the line level as the ASPEED timers implement edge triggered |
| 46 | * interrupts, signalling with both the rising and falling edge. |
| 47 | */ |
| 48 | int32_t level; |
| 49 | uint32_t reload; |
| 50 | uint32_t match[2]; |
| 51 | uint64_t start; |
| 52 | } AspeedTimer; |
| 53 | |
| 54 | struct AspeedTimerCtrlState { |
| 55 | /*< private >*/ |
| 56 | SysBusDevice parent; |
| 57 | |
| 58 | /*< public >*/ |
| 59 | MemoryRegion iomem; |
| 60 | |
| 61 | uint32_t ctrl; |
| 62 | uint32_t ctrl2; |
| 63 | uint32_t ctrl3; |
| 64 | uint32_t irq_sts; |
| 65 | AspeedTimer timers[ASPEED_TIMER_NR_TIMERS]; |
| 66 | |
| 67 | AspeedSCUState *scu; |
| 68 | }; |
| 69 | |
| 70 | |
| 71 | struct AspeedTimerClass { |
| 72 | SysBusDeviceClass parent_class; |
| 73 | |
| 74 | uint64_t (*read)(AspeedTimerCtrlState *s, hwaddr offset); |
| 75 | void (*write)(AspeedTimerCtrlState *s, hwaddr offset, uint64_t value); |
| 76 | }; |
| 77 | |
| 78 | #endif /* ASPEED_TIMER_H */ |