| 1 | /* |
| 2 | * i.MX GPT Timer |
| 3 | * |
| 4 | * Copyright (c) 2008 OK Labs |
| 5 | * Copyright (c) 2011 NICTA Pty Ltd |
| 6 | * Originally written by Hans Jiang |
| 7 | * Updated by Peter Chubb |
| 8 | * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> |
| 9 | * Updated by Gaurav Sharma <gaurav.sharma_7@nxp.com> |
| 10 | * |
| 11 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 12 | * of this software and associated documentation files (the "Software"), to deal |
| 13 | * in the Software without restriction, including without limitation the rights |
| 14 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 15 | * copies of the Software, and to permit persons to whom the Software is |
| 16 | * furnished to do so, subject to the following conditions: |
| 17 | * |
| 18 | * The above copyright notice and this permission notice shall be included in |
| 19 | * all copies or substantial portions of the Software. |
| 20 | * |
| 21 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 22 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 23 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 24 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 25 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 26 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 27 | * THE SOFTWARE. |
| 28 | */ |
| 29 | |
| 30 | #ifndef IMX_GPT_H |
| 31 | #define IMX_GPT_H |
| 32 | |
| 33 | #include "hw/core/sysbus.h" |
| 34 | #include "hw/core/ptimer.h" |
| 35 | #include "hw/misc/imx_ccm.h" |
| 36 | #include "qom/object.h" |
| 37 | |
| 38 | /* |
| 39 | * GPT : General purpose timer |
| 40 | * |
| 41 | * This timer counts up continuously while it is enabled, resetting itself |
| 42 | * to 0 when it reaches GPT_TIMER_MAX (in freerun mode) or when it |
| 43 | * reaches the value of one of the ocrX (in periodic mode). |
| 44 | */ |
| 45 | |
| 46 | #define GPT_TIMER_MAX 0XFFFFFFFFUL |
| 47 | |
| 48 | /* Control register. Not all of these bits have any effect (yet) */ |
| 49 | #define GPT_CR_EN (1 << 0) /* GPT Enable */ |
| 50 | #define GPT_CR_ENMOD (1 << 1) /* GPT Enable Mode */ |
| 51 | #define GPT_CR_DBGEN (1 << 2) /* GPT Debug mode enable */ |
| 52 | #define GPT_CR_WAITEN (1 << 3) /* GPT Wait Mode Enable */ |
| 53 | #define GPT_CR_DOZEN (1 << 4) /* GPT Doze mode enable */ |
| 54 | #define GPT_CR_STOPEN (1 << 5) /* GPT Stop Mode Enable */ |
| 55 | #define GPT_CR_CLKSRC_SHIFT (6) |
| 56 | #define GPT_CR_CLKSRC_MASK (0x7) |
| 57 | |
| 58 | #define GPT_CR_FRR (1 << 9) /* Freerun or Restart */ |
| 59 | #define GPT_CR_SWR (1 << 15) /* Software Reset */ |
| 60 | #define GPT_CR_IM1 (3 << 16) /* Input capture channel 1 mode (2 bits) */ |
| 61 | #define GPT_CR_IM2 (3 << 18) /* Input capture channel 2 mode (2 bits) */ |
| 62 | #define GPT_CR_OM1 (7 << 20) /* Output Compare Channel 1 Mode (3 bits) */ |
| 63 | #define GPT_CR_OM2 (7 << 23) /* Output Compare Channel 2 Mode (3 bits) */ |
| 64 | #define GPT_CR_OM3 (7 << 26) /* Output Compare Channel 3 Mode (3 bits) */ |
| 65 | #define GPT_CR_FO1 (1 << 29) /* Force Output Compare Channel 1 */ |
| 66 | #define GPT_CR_FO2 (1 << 30) /* Force Output Compare Channel 2 */ |
| 67 | #define GPT_CR_FO3 (1 << 31) /* Force Output Compare Channel 3 */ |
| 68 | |
| 69 | #define GPT_SR_OF1 (1 << 0) |
| 70 | #define GPT_SR_OF2 (1 << 1) |
| 71 | #define GPT_SR_OF3 (1 << 2) |
| 72 | #define GPT_SR_ROV (1 << 5) |
| 73 | |
| 74 | #define GPT_IR_OF1IE (1 << 0) |
| 75 | #define GPT_IR_OF2IE (1 << 1) |
| 76 | #define GPT_IR_OF3IE (1 << 2) |
| 77 | #define GPT_IR_ROVIE (1 << 5) |
| 78 | |
| 79 | #define TYPE_IMX25_GPT "imx25.gpt" |
| 80 | #define TYPE_IMX31_GPT "imx31.gpt" |
| 81 | #define TYPE_IMX6_GPT "imx6.gpt" |
| 82 | #define TYPE_IMX6UL_GPT "imx6ul.gpt" |
| 83 | #define TYPE_IMX7_GPT "imx7.gpt" |
| 84 | #define TYPE_IMX8MP_GPT "imx8mp.gpt" |
| 85 | #define TYPE_IMX8MM_GPT "imx8mm.gpt" |
| 86 | |
| 87 | #define TYPE_IMX_GPT TYPE_IMX25_GPT |
| 88 | |
| 89 | typedef struct IMXGPTState IMXGPTState; |
| 90 | DECLARE_INSTANCE_CHECKER(IMXGPTState, IMX_GPT, |
| 91 | TYPE_IMX_GPT) |
| 92 | |
| 93 | struct IMXGPTState { |
| 94 | /*< private >*/ |
| 95 | SysBusDevice parent_obj; |
| 96 | |
| 97 | /*< public >*/ |
| 98 | ptimer_state *timer; |
| 99 | MemoryRegion iomem; |
| 100 | IMXCCMState *ccm; |
| 101 | |
| 102 | uint32_t cr; |
| 103 | uint32_t pr; |
| 104 | uint32_t sr; |
| 105 | uint32_t ir; |
| 106 | uint32_t ocr1; |
| 107 | uint32_t ocr2; |
| 108 | uint32_t ocr3; |
| 109 | uint32_t icr1; |
| 110 | uint32_t icr2; |
| 111 | uint32_t cnt; |
| 112 | |
| 113 | uint32_t next_timeout; |
| 114 | uint32_t next_int; |
| 115 | |
| 116 | uint32_t freq; |
| 117 | |
| 118 | qemu_irq irq; |
| 119 | |
| 120 | const IMXClk *clocks; |
| 121 | }; |
| 122 | |
| 123 | #endif /* IMX_GPT_H */ |