| 1 | #ifndef HW_USB_UHCI_REGS_H |
| 2 | #define HW_USB_UHCI_REGS_H |
| 3 | |
| 4 | #define UHCI_USBCMD 0 |
| 5 | #define UHCI_USBSTS 2 |
| 6 | #define UHCI_USBINTR 4 |
| 7 | #define UHCI_USBFRNUM 6 |
| 8 | #define UHCI_USBFLBASEADD 8 |
| 9 | #define UHCI_USBSOF 0x0c |
| 10 | #define UHCI_USBPORTSC1 0x10 |
| 11 | #define UHCI_USBPORTSC2 0x12 |
| 12 | #define UHCI_USBPORTSC3 0x14 |
| 13 | #define UHCI_USBPORTSC4 0x16 |
| 14 | |
| 15 | #define UHCI_CMD_FGR (1 << 4) |
| 16 | #define UHCI_CMD_EGSM (1 << 3) |
| 17 | #define UHCI_CMD_GRESET (1 << 2) |
| 18 | #define UHCI_CMD_HCRESET (1 << 1) |
| 19 | #define UHCI_CMD_RS (1 << 0) |
| 20 | |
| 21 | #define UHCI_STS_HCHALTED (1 << 5) |
| 22 | #define UHCI_STS_HCPERR (1 << 4) |
| 23 | #define UHCI_STS_HSERR (1 << 3) |
| 24 | #define UHCI_STS_RD (1 << 2) |
| 25 | #define UHCI_STS_USBERR (1 << 1) |
| 26 | #define UHCI_STS_USBINT (1 << 0) |
| 27 | |
| 28 | #define TD_CTRL_SPD (1 << 29) |
| 29 | #define TD_CTRL_ERROR_SHIFT 27 |
| 30 | #define TD_CTRL_IOS (1 << 25) |
| 31 | #define TD_CTRL_IOC (1 << 24) |
| 32 | #define TD_CTRL_ACTIVE (1 << 23) |
| 33 | #define TD_CTRL_STALL (1 << 22) |
| 34 | #define TD_CTRL_BABBLE (1 << 20) |
| 35 | #define TD_CTRL_NAK (1 << 19) |
| 36 | #define TD_CTRL_TIMEOUT (1 << 18) |
| 37 | |
| 38 | #define UHCI_PORT_SUSPEND (1 << 12) |
| 39 | #define UHCI_PORT_RESET (1 << 9) |
| 40 | #define UHCI_PORT_LSDA (1 << 8) |
| 41 | #define UHCI_PORT_RSVD1 (1 << 7) |
| 42 | #define UHCI_PORT_RD (1 << 6) |
| 43 | #define UHCI_PORT_ENC (1 << 3) |
| 44 | #define UHCI_PORT_EN (1 << 2) |
| 45 | #define UHCI_PORT_CSC (1 << 1) |
| 46 | #define UHCI_PORT_CCS (1 << 0) |
| 47 | |
| 48 | #define UHCI_PORT_READ_ONLY (0x1bb) |
| 49 | #define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC) |
| 50 | |
| 51 | #endif /* HW_USB_UHCI_REGS_H */ |