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1 /*
2 * Virtio GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2014
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2.
11 * See the COPYING file in the top-level directory.
12 */
13
14 #ifndef HW_VIRTIO_GPU_H
15 #define HW_VIRTIO_GPU_H
16
17 #include "qemu/queue.h"
18 #include "qemu/units.h"
19 #include "ui/qemu-pixman.h"
20 #include "ui/console.h"
21 #include "hw/virtio/virtio.h"
22 #include "qemu/log.h"
23 #include "system/vhost-user-backend.h"
24 #include "qapi/qapi-types-virtio.h"
25
26 #include "standard-headers/linux/virtio_gpu.h"
27 #include "standard-headers/linux/virtio_ids.h"
28 #include "qom/object.h"
29
30 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
31 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass,
32 VIRTIO_GPU_BASE)
33
34 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
35 OBJECT_DECLARE_TYPE(VirtIOGPU, VirtIOGPUClass, VIRTIO_GPU)
36
37 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device"
38 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL)
39
40 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
41 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU)
42
43 #define TYPE_VIRTIO_GPU_RUTABAGA "virtio-gpu-rutabaga-device"
44 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPURutabaga, VIRTIO_GPU_RUTABAGA)
45
46 struct virtio_gpu_simple_resource {
47 uint32_t resource_id;
48 uint32_t width;
49 uint32_t height;
50 uint32_t format;
51 uint64_t *addrs;
52 struct iovec *iov;
53 unsigned int iov_cnt;
54 uint32_t scanout_bitmask;
55 pixman_image_t *image;
56 qemu_pixman_shareable share_handle;
57 uint64_t hostmem;
58
59 uint64_t blob_size;
60 void *blob;
61 int dmabuf_fd;
62 uint8_t *remapped;
63
64 QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
65 };
66
67 struct virtio_gpu_framebuffer {
68 pixman_format_code_t format;
69 uint32_t width, height;
70 uint32_t stride;
71 uint32_t offset;
72 };
73
74 struct virtio_gpu_scanout {
75 QemuConsole *con;
76 DisplaySurface *ds;
77 uint32_t width, height;
78 int x, y;
79 int invalidate;
80 uint32_t resource_id;
81 struct virtio_gpu_update_cursor cursor;
82 QEMUCursor *current_cursor;
83 struct virtio_gpu_framebuffer fb;
84 };
85
86 struct virtio_gpu_requested_state {
87 uint16_t width_mm, height_mm;
88 uint32_t width, height;
89 uint32_t refresh_rate;
90 int x, y;
91 };
92
93 enum virtio_gpu_base_conf_flags {
94 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
95 VIRTIO_GPU_FLAG_STATS_ENABLED,
96 VIRTIO_GPU_FLAG_EDID_ENABLED,
97 VIRTIO_GPU_FLAG_DMABUF_ENABLED,
98 VIRTIO_GPU_FLAG_BLOB_ENABLED,
99 VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED,
100 VIRTIO_GPU_FLAG_RUTABAGA_ENABLED,
101 VIRTIO_GPU_FLAG_VENUS_ENABLED,
102 VIRTIO_GPU_FLAG_RESOURCE_UUID_ENABLED,
103 VIRTIO_GPU_FLAG_DRM_ENABLED,
104 };
105
106 #define virtio_gpu_virgl_enabled(_cfg) \
107 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
108 #define virtio_gpu_stats_enabled(_cfg) \
109 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
110 #define virtio_gpu_edid_enabled(_cfg) \
111 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
112 #define virtio_gpu_dmabuf_enabled(_cfg) \
113 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
114 #define virtio_gpu_blob_enabled(_cfg) \
115 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
116 #define virtio_gpu_context_init_enabled(_cfg) \
117 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED))
118 #define virtio_gpu_rutabaga_enabled(_cfg) \
119 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_RUTABAGA_ENABLED))
120 #define virtio_gpu_resource_uuid_enabled(_cfg) \
121 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_RESOURCE_UUID_ENABLED))
122 #define virtio_gpu_hostmem_enabled(_cfg) \
123 (_cfg.hostmem > 0)
124 #define virtio_gpu_venus_enabled(_cfg) \
125 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VENUS_ENABLED))
126 #define virtio_gpu_drm_enabled(_cfg) \
127 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DRM_ENABLED))
128
129 struct virtio_gpu_base_conf {
130 uint32_t max_outputs;
131 uint32_t flags;
132 uint32_t xres;
133 uint32_t yres;
134 uint64_t hostmem;
135 VirtIOGPUOutputList *outputs;
136 };
137
138 struct virtio_gpu_ctrl_command {
139 VirtQueueElement elem;
140 VirtQueue *vq;
141 struct virtio_gpu_ctrl_hdr cmd_hdr;
142 uint32_t error;
143 bool finished;
144 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
145 };
146
147 struct VirtIOGPUBase {
148 VirtIODevice parent_obj;
149
150 Error *migration_blocker;
151
152 struct virtio_gpu_base_conf conf;
153 struct virtio_gpu_config virtio_config;
154 const GraphicHwOps *hw_ops;
155
156 int renderer_blocked;
157 int enable;
158
159 MemoryRegion hostmem;
160
161 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
162
163 int enabled_output_bitmask;
164 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
165 };
166
167 struct VirtIOGPUBaseClass {
168 VirtioDeviceClass parent;
169
170 void (*gl_flushed)(VirtIOGPUBase *g);
171 };
172
173 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \
174 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \
175 DEFINE_PROP_VIRTIO_GPU_OUTPUT_LIST("outputs", _state, _conf.outputs), \
176 DEFINE_PROP_BIT("edid", _state, _conf.flags, \
177 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
178 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1280), \
179 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 800)
180
181 typedef struct VGPUDMABuf {
182 QemuDmaBuf *buf;
183 uint32_t scanout_id;
184 QTAILQ_ENTRY(VGPUDMABuf) next;
185 } VGPUDMABuf;
186
187 struct VirtIOGPU {
188 VirtIOGPUBase parent_obj;
189
190 uint8_t scanout_vmstate_version;
191 uint64_t conf_max_hostmem;
192
193 VirtQueue *ctrl_vq;
194 VirtQueue *cursor_vq;
195
196 QEMUBH *ctrl_bh;
197 QEMUBH *cursor_bh;
198 QEMUBH *reset_bh;
199 QemuCond reset_cond;
200 bool reset_finished;
201
202 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
203 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
204 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
205
206 uint64_t hostmem;
207
208 bool processing_cmdq;
209
210 uint32_t inflight;
211 struct {
212 uint32_t max_inflight;
213 uint32_t requests;
214 uint32_t req_3d;
215 uint32_t bytes_3d;
216 } stats;
217
218 struct {
219 QTAILQ_HEAD(, VGPUDMABuf) bufs;
220 VGPUDMABuf *primary[VIRTIO_GPU_MAX_SCANOUTS];
221 } dmabuf;
222
223 GArray *capset_ids;
224 };
225
226 struct VirtIOGPUClass {
227 VirtIOGPUBaseClass parent;
228
229 void (*handle_ctrl)(VirtIODevice *vdev, VirtQueue *vq);
230 void (*process_cmd)(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
231 void (*update_cursor_data)(VirtIOGPU *g,
232 struct virtio_gpu_scanout *s,
233 uint32_t resource_id);
234 void (*resource_destroy)(VirtIOGPU *g,
235 struct virtio_gpu_simple_resource *res,
236 Error **errp);
237 };
238
239 struct virtio_gpu_virgl_context_fence {
240 uint32_t ctx_id;
241 uint32_t ring_idx;
242 uint64_t fence_id;
243 QSLIST_ENTRY(virtio_gpu_virgl_context_fence) next;
244 };
245
246 /* VirtIOGPUGL renderer states */
247 typedef enum {
248 RS_START, /* starting state */
249 RS_INIT_FAILED, /* failed initialisation */
250 RS_INITED, /* initialised and working */
251 RS_RESET, /* inited and reset pending, moves to start after reset */
252 } RenderState;
253
254 struct VirtIOGPUGL {
255 struct VirtIOGPU parent_obj;
256
257 RenderState renderer_state;
258
259 QEMUTimer *fence_poll;
260 QEMUTimer *print_stats;
261
262 QEMUBH *cmdq_resume_bh;
263
264 QEMUBH *async_fence_bh;
265 QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;
266
267 MemoryRegion hostmem_background;
268 void *hostmem_mmap;
269 };
270
271 struct VhostUserGPU {
272 VirtIOGPUBase parent_obj;
273
274 VhostUserBackend *vhost;
275 int vhost_gpu_fd; /* closed by the chardev */
276 CharFrontend vhost_chr;
277 QemuDmaBuf *dmabuf[VIRTIO_GPU_MAX_SCANOUTS];
278 bool backend_blocked;
279 };
280
281 #define MAX_SLOTS 4096
282
283 struct MemoryRegionInfo {
284 int used;
285 MemoryRegion mr;
286 uint32_t resource_id;
287 };
288
289 struct rutabaga;
290
291 struct VirtIOGPURutabaga {
292 VirtIOGPU parent_obj;
293 struct MemoryRegionInfo memory_regions[MAX_SLOTS];
294 uint64_t capset_mask;
295 char *wayland_socket_path;
296 char *wsi;
297 bool headless;
298 uint32_t num_capsets;
299 struct rutabaga *rutabaga;
300 };
301
302 /*
303 * With 4 KiB pages and QEMU's VIRTQUEUE_MAX_SIZE (1024) mapped-iov
304 * limit, the largest inline command is ~4 MiB. Cap submit_3d
305 * allocations to this value to prevent a malicious guest from
306 * triggering an OOM abort via an inflated cs.size field.
307 */
308 #define VIRTIO_GPU_MAX_CMD_SUBMIT_SIZE (4 * MiB)
309
310 #define VIRTIO_GPU_FILL_CMD(out) do { \
311 size_t virtiogpufillcmd_s_ = \
312 iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
313 &out, sizeof(out)); \
314 if (virtiogpufillcmd_s_ != sizeof(out)) { \
315 qemu_log_mask(LOG_GUEST_ERROR, \
316 "%s: command size incorrect %zu vs %zu\n", \
317 __func__, virtiogpufillcmd_s_, sizeof(out)); \
318 memset(&out, 0, sizeof(out)); \
319 virtio_gpu_ctrl_response_nodata( \
320 g, cmd, VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER); \
321 return; \
322 } \
323 } while (0)
324
325 /* virtio-gpu-base.c */
326 bool virtio_gpu_base_device_realize(DeviceState *qdev,
327 VirtIOHandleOutput ctrl_cb,
328 VirtIOHandleOutput cursor_cb,
329 Error **errp);
330 void virtio_gpu_base_device_unrealize(DeviceState *qdev);
331 void virtio_gpu_base_reset(VirtIOGPUBase *g);
332 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
333 struct virtio_gpu_resp_display_info *dpy_info);
334
335 void virtio_gpu_base_generate_edid(VirtIOGPUBase *g, int scanout,
336 struct virtio_gpu_resp_edid *edid);
337 /* virtio-gpu.c */
338 struct virtio_gpu_simple_resource *
339 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
340
341 void virtio_gpu_ctrl_response(VirtIOGPU *g,
342 struct virtio_gpu_ctrl_command *cmd,
343 struct virtio_gpu_ctrl_hdr *resp,
344 size_t resp_len);
345 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
346 struct virtio_gpu_ctrl_command *cmd,
347 enum virtio_gpu_ctrl_type type);
348 void virtio_gpu_get_display_info(VirtIOGPU *g,
349 struct virtio_gpu_ctrl_command *cmd);
350 void virtio_gpu_get_edid(VirtIOGPU *g,
351 struct virtio_gpu_ctrl_command *cmd);
352 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
353 uint32_t nr_entries, uint32_t offset,
354 struct virtio_gpu_ctrl_command *cmd,
355 uint64_t **addr, struct iovec **iov,
356 uint32_t *niov);
357 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
358 struct iovec *iov, uint32_t count);
359 void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
360 struct virtio_gpu_simple_resource *res);
361 void virtio_gpu_process_cmdq(VirtIOGPU *g);
362 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp);
363 void virtio_gpu_reset(VirtIODevice *vdev);
364 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
365 void virtio_gpu_update_cursor_data(VirtIOGPU *g,
366 struct virtio_gpu_scanout *s,
367 uint32_t resource_id);
368
369 bool virtio_gpu_check_scanout_bounds(uint32_t scanout_id, uint32_t resource_id,
370 uint32_t width, uint32_t height,
371 const struct virtio_gpu_rect *r,
372 uint32_t *error);
373
374 /**
375 * virtio_gpu_scanout_blob_to_fb() - fill out fb based on scanout data
376 * fb: the frame-buffer descriptor to fill out
377 * ss: the scanout blob data
378 * blob_size: size of scanout blob data
379 *
380 * This will check we have enough space for the frame taking into
381 * account that stride.
382 *
383 * Returns true on success, otherwise logs guest error and returns false
384 */
385 bool virtio_gpu_scanout_blob_to_fb(struct virtio_gpu_framebuffer *fb,
386 struct virtio_gpu_set_scanout_blob *ss,
387 uint64_t blob_size);
388
389 /* virtio-gpu-udmabuf.c */
390 bool virtio_gpu_have_udmabuf(void);
391 bool virtio_gpu_init_udmabuf(struct virtio_gpu_simple_resource *res);
392 void virtio_gpu_fini_udmabuf(VirtIOGPU *g,
393 struct virtio_gpu_simple_resource *res);
394 int virtio_gpu_update_dmabuf(VirtIOGPU *g,
395 uint32_t scanout_id,
396 struct virtio_gpu_simple_resource *res,
397 struct virtio_gpu_framebuffer *fb,
398 struct virtio_gpu_rect *r);
399
400 void virtio_gpu_update_scanout(VirtIOGPU *g,
401 uint32_t scanout_id,
402 struct virtio_gpu_simple_resource *res,
403 struct virtio_gpu_framebuffer *fb,
404 struct virtio_gpu_rect *r);
405 void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id);
406
407 /* virtio-gpu-3d.c */
408 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
409 struct virtio_gpu_ctrl_command *cmd);
410 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
411 void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g);
412 GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g);
413 void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g);
414 void virtio_gpu_virgl_resource_destroy(VirtIOGPU *g,
415 struct virtio_gpu_simple_resource *res,
416 Error **errp);
417 bool virtio_gpu_virgl_update_render_state(VirtIOGPU *g);
418
419 #endif