| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Target independent generic vector operation expansion |
| 4 | * |
| 5 | * Copyright (c) 2018 Linaro |
| 6 | */ |
| 7 | |
| 8 | #ifndef TCG_TCG_OP_GVEC_COMMON_H |
| 9 | #define TCG_TCG_OP_GVEC_COMMON_H |
| 10 | |
| 11 | /* |
| 12 | * "Generic" vectors. All operands are given as offsets from ENV, |
| 13 | * and therefore cannot also be allocated via tcg_global_mem_new_*. |
| 14 | * OPRSZ is the byte size of the vector upon which the operation is performed. |
| 15 | * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared. |
| 16 | * |
| 17 | * All sizes must be 8 or any multiple of 16. |
| 18 | * When OPRSZ is 8, the alignment may be 8, otherwise must be 16. |
| 19 | * Operands may completely, but not partially, overlap. |
| 20 | */ |
| 21 | |
| 22 | /* Expand a call to a gvec-style helper, with pointers to two vector |
| 23 | operands, and a descriptor (see tcg-gvec-desc.h). */ |
| 24 | typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32); |
| 25 | void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs, |
| 26 | uint32_t oprsz, uint32_t maxsz, int32_t data, |
| 27 | gen_helper_gvec_2 *fn); |
| 28 | |
| 29 | /* Similarly, passing an extra data value. */ |
| 30 | typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32); |
| 31 | void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c, |
| 32 | uint32_t oprsz, uint32_t maxsz, int32_t data, |
| 33 | gen_helper_gvec_2i *fn); |
| 34 | |
| 35 | /* Similarly, passing an extra pointer (e.g. env or float_status). */ |
| 36 | typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); |
| 37 | void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs, |
| 38 | TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, |
| 39 | int32_t data, gen_helper_gvec_2_ptr *fn); |
| 40 | |
| 41 | /* Similarly, with three vector operands. */ |
| 42 | typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); |
| 43 | void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 44 | uint32_t oprsz, uint32_t maxsz, int32_t data, |
| 45 | gen_helper_gvec_3 *fn); |
| 46 | |
| 47 | /* Similarly, with four vector operands. */ |
| 48 | typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr, |
| 49 | TCGv_ptr, TCGv_i32); |
| 50 | void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 51 | uint32_t cofs, uint32_t oprsz, uint32_t maxsz, |
| 52 | int32_t data, gen_helper_gvec_4 *fn); |
| 53 | |
| 54 | /* Similarly, with five vector operands. */ |
| 55 | typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, |
| 56 | TCGv_ptr, TCGv_i32); |
| 57 | void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 58 | uint32_t cofs, uint32_t xofs, uint32_t oprsz, |
| 59 | uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn); |
| 60 | |
| 61 | typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, |
| 62 | TCGv_ptr, TCGv_i32); |
| 63 | void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 64 | TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, |
| 65 | int32_t data, gen_helper_gvec_3_ptr *fn); |
| 66 | |
| 67 | typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, |
| 68 | TCGv_ptr, TCGv_ptr, TCGv_i32); |
| 69 | void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 70 | uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz, |
| 71 | uint32_t maxsz, int32_t data, |
| 72 | gen_helper_gvec_4_ptr *fn); |
| 73 | |
| 74 | typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, |
| 75 | TCGv_ptr, TCGv_ptr, TCGv_i32); |
| 76 | void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 77 | uint32_t cofs, uint32_t eofs, TCGv_ptr ptr, |
| 78 | uint32_t oprsz, uint32_t maxsz, int32_t data, |
| 79 | gen_helper_gvec_5_ptr *fn); |
| 80 | |
| 81 | /* Expand a gvec operation. Either inline or out-of-line depending on |
| 82 | the actual vector size and the operations supported by the host. */ |
| 83 | typedef struct { |
| 84 | /* Expand inline as a 64-bit or 32-bit integer. |
| 85 | Only one of these will be non-NULL. */ |
| 86 | void (*fni8)(TCGv_i64, TCGv_i64); |
| 87 | void (*fni4)(TCGv_i32, TCGv_i32); |
| 88 | /* Expand inline with a host vector type. */ |
| 89 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec); |
| 90 | /* Expand out-of-line helper w/descriptor. */ |
| 91 | gen_helper_gvec_2 *fno; |
| 92 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 93 | const TCGOpcode *opt_opc; |
| 94 | /* The data argument to the out-of-line helper. */ |
| 95 | int32_t data; |
| 96 | /* The vector element size, if applicable. */ |
| 97 | uint8_t vece; |
| 98 | /* Prefer i64 to v64. */ |
| 99 | bool prefer_i64; |
| 100 | /* Load dest as a 2nd source operand. */ |
| 101 | bool load_dest; |
| 102 | } GVecGen2; |
| 103 | |
| 104 | typedef struct { |
| 105 | /* Expand inline as a 64-bit or 32-bit integer. |
| 106 | Only one of these will be non-NULL. */ |
| 107 | void (*fni8)(TCGv_i64, TCGv_i64, int64_t); |
| 108 | void (*fni4)(TCGv_i32, TCGv_i32, int32_t); |
| 109 | /* Expand inline with a host vector type. */ |
| 110 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t); |
| 111 | /* Expand out-of-line helper w/descriptor, data in descriptor. */ |
| 112 | gen_helper_gvec_2 *fno; |
| 113 | /* Expand out-of-line helper w/descriptor, data as argument. */ |
| 114 | gen_helper_gvec_2i *fnoi; |
| 115 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 116 | const TCGOpcode *opt_opc; |
| 117 | /* The vector element size, if applicable. */ |
| 118 | uint8_t vece; |
| 119 | /* Prefer i64 to v64. */ |
| 120 | bool prefer_i64; |
| 121 | /* Load dest as a 3rd source operand. */ |
| 122 | bool load_dest; |
| 123 | } GVecGen2i; |
| 124 | |
| 125 | typedef struct { |
| 126 | /* Expand inline as a 64-bit or 32-bit integer. |
| 127 | Only one of these will be non-NULL. */ |
| 128 | void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64); |
| 129 | void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32); |
| 130 | /* Expand inline with a host vector type. */ |
| 131 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec); |
| 132 | /* Expand out-of-line helper w/descriptor. */ |
| 133 | gen_helper_gvec_2i *fno; |
| 134 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 135 | const TCGOpcode *opt_opc; |
| 136 | /* The data argument to the out-of-line helper. */ |
| 137 | uint32_t data; |
| 138 | /* The vector element size, if applicable. */ |
| 139 | uint8_t vece; |
| 140 | /* Prefer i64 to v64. */ |
| 141 | bool prefer_i64; |
| 142 | /* Load scalar as 1st source operand. */ |
| 143 | bool scalar_first; |
| 144 | } GVecGen2s; |
| 145 | |
| 146 | typedef struct { |
| 147 | /* Expand inline as a 64-bit or 32-bit integer. |
| 148 | Only one of these will be non-NULL. */ |
| 149 | void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64); |
| 150 | void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32); |
| 151 | /* Expand inline with a host vector type. */ |
| 152 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec); |
| 153 | /* Expand out-of-line helper w/descriptor. */ |
| 154 | gen_helper_gvec_3 *fno; |
| 155 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 156 | const TCGOpcode *opt_opc; |
| 157 | /* The data argument to the out-of-line helper. */ |
| 158 | int32_t data; |
| 159 | /* The vector element size, if applicable. */ |
| 160 | uint8_t vece; |
| 161 | /* Prefer i64 to v64. */ |
| 162 | bool prefer_i64; |
| 163 | /* Load dest as a 3rd source operand. */ |
| 164 | bool load_dest; |
| 165 | } GVecGen3; |
| 166 | |
| 167 | typedef struct { |
| 168 | /* |
| 169 | * Expand inline as a 64-bit or 32-bit integer. Only one of these will be |
| 170 | * non-NULL. |
| 171 | */ |
| 172 | void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, int64_t); |
| 173 | void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, int32_t); |
| 174 | /* Expand inline with a host vector type. */ |
| 175 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, int64_t); |
| 176 | /* Expand out-of-line helper w/descriptor, data in descriptor. */ |
| 177 | gen_helper_gvec_3 *fno; |
| 178 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 179 | const TCGOpcode *opt_opc; |
| 180 | /* The vector element size, if applicable. */ |
| 181 | uint8_t vece; |
| 182 | /* Prefer i64 to v64. */ |
| 183 | bool prefer_i64; |
| 184 | /* Load dest as a 3rd source operand. */ |
| 185 | bool load_dest; |
| 186 | /* Write aofs as a 2nd dest operand. */ |
| 187 | bool write_aofs; |
| 188 | } GVecGen3i; |
| 189 | |
| 190 | typedef struct { |
| 191 | /* Expand inline as a 64-bit or 32-bit integer. |
| 192 | Only one of these will be non-NULL. */ |
| 193 | void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64); |
| 194 | void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32); |
| 195 | /* Expand inline with a host vector type. */ |
| 196 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec); |
| 197 | /* Expand out-of-line helper w/descriptor. */ |
| 198 | gen_helper_gvec_4 *fno; |
| 199 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 200 | const TCGOpcode *opt_opc; |
| 201 | /* The data argument to the out-of-line helper. */ |
| 202 | int32_t data; |
| 203 | /* The vector element size, if applicable. */ |
| 204 | uint8_t vece; |
| 205 | /* Prefer i64 to v64. */ |
| 206 | bool prefer_i64; |
| 207 | /* Write aofs as a 2nd dest operand. */ |
| 208 | bool write_aofs; |
| 209 | } GVecGen4; |
| 210 | |
| 211 | typedef struct { |
| 212 | /* |
| 213 | * Expand inline as a 64-bit or 32-bit integer. Only one of these will be |
| 214 | * non-NULL. |
| 215 | */ |
| 216 | void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64, int64_t); |
| 217 | void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32, int32_t); |
| 218 | /* Expand inline with a host vector type. */ |
| 219 | void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec, int64_t); |
| 220 | /* Expand out-of-line helper w/descriptor, data in descriptor. */ |
| 221 | gen_helper_gvec_4 *fno; |
| 222 | /* The optional opcodes, if any, utilized by .fniv. */ |
| 223 | const TCGOpcode *opt_opc; |
| 224 | /* The vector element size, if applicable. */ |
| 225 | uint8_t vece; |
| 226 | /* Prefer i64 to v64. */ |
| 227 | bool prefer_i64; |
| 228 | } GVecGen4i; |
| 229 | |
| 230 | /* Expand (dbase+dofs) = op(abase+aofs), length @oprsz, clearing to @maxsz. */ |
| 231 | void tcg_gen_gvec_2_var(TCGv_ptr dbase, uint32_t dofs, |
| 232 | TCGv_ptr abase, uint32_t aofs, |
| 233 | uint32_t oprsz, uint32_t maxsz, const GVecGen2 *op); |
| 234 | /* Similarly, expand (env+dofs) = op(env+aofs). */ |
| 235 | void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs, |
| 236 | uint32_t oprsz, uint32_t maxsz, const GVecGen2 *op); |
| 237 | /* Similarly, expand (env+dofs) = op(env+aofs, c). */ |
| 238 | void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz, |
| 239 | uint32_t maxsz, int64_t c, const GVecGen2i *op); |
| 240 | /* Similarly, expand (env+dofs) = op(env+aofs, s). */ |
| 241 | void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz, |
| 242 | uint32_t maxsz, TCGv_i64 c, const GVecGen2s *op); |
| 243 | |
| 244 | /* |
| 245 | * Expand (dbase+dofs) = op(abase+aofs, bbase+bofs), |
| 246 | * length @oprsz, clearing to @maxsz. |
| 247 | */ |
| 248 | void tcg_gen_gvec_3_var(TCGv_ptr dbase, uint32_t dofs, |
| 249 | TCGv_ptr abase, uint32_t aofs, |
| 250 | TCGv_ptr bbase, uint32_t bofs, |
| 251 | uint32_t oprsz, uint32_t maxsz, const GVecGen3 *op); |
| 252 | /* Similarly, expand (env+dofs) = op(env+aofs, env+bofs). */ |
| 253 | void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 254 | uint32_t oprsz, uint32_t maxsz, const GVecGen3 *op); |
| 255 | |
| 256 | /* |
| 257 | * Depending on op->load_dest and op->write_aofs, expand |
| 258 | * (env+dofs) = op(env+aofs, env+bofs, c) |
| 259 | * or |
| 260 | * (env+dofs) = op(env+dofs, env+aofs, env+bofs, c) |
| 261 | * or |
| 262 | * (env+dofs), (env+aofs) = op(env+aofs, env+bofs, c) |
| 263 | * or |
| 264 | * (env+dofs), (env+aofs) = op(env+dofs, env+aofs, env+bofs, c) |
| 265 | */ |
| 266 | void tcg_gen_gvec_3i(uint32_t dofs, uint32_t aofs, uint32_t bofs, |
| 267 | uint32_t oprsz, uint32_t maxsz, int64_t c, |
| 268 | const GVecGen3i *op); |
| 269 | |
| 270 | /* |
| 271 | * Depending on op->write_aofs, expand |
| 272 | * (env+dofs) = op(env+aofs, env+bofs, env+cofs) |
| 273 | * or |
| 274 | * (env+dofs), (env+aofs) = op(env+aofs, env+bofs, env+cofs) |
| 275 | */ |
| 276 | void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, |
| 277 | uint32_t oprsz, uint32_t maxsz, const GVecGen4 *); |
| 278 | |
| 279 | /* Expand (env+dofs) = op(env+aofs, env+bofs, env+cofs, c). */ |
| 280 | void tcg_gen_gvec_4i(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, |
| 281 | uint32_t oprsz, uint32_t maxsz, int64_t c, |
| 282 | const GVecGen4i *); |
| 283 | |
| 284 | /* Expand a specific vector operation. */ |
| 285 | |
| 286 | void tcg_gen_gvec_mov_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs, |
| 287 | TCGv_ptr abase, uint32_t aofs, |
| 288 | uint32_t oprsz, uint32_t maxsz); |
| 289 | |
| 290 | void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 291 | uint32_t oprsz, uint32_t maxsz); |
| 292 | void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 293 | uint32_t oprsz, uint32_t maxsz); |
| 294 | void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 295 | uint32_t oprsz, uint32_t maxsz); |
| 296 | void tcg_gen_gvec_abs(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 297 | uint32_t oprsz, uint32_t maxsz); |
| 298 | |
| 299 | void tcg_gen_gvec_add_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs, |
| 300 | TCGv_ptr abase, uint32_t aofs, |
| 301 | TCGv_ptr bbase, uint32_t bofs, |
| 302 | uint32_t oprsz, uint32_t maxsz); |
| 303 | void tcg_gen_gvec_sub_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs, |
| 304 | TCGv_ptr abase, uint32_t aofs, |
| 305 | TCGv_ptr bbase, uint32_t bofs, |
| 306 | uint32_t oprsz, uint32_t maxsz); |
| 307 | |
| 308 | void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 309 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 310 | void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 311 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 312 | void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 313 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 314 | |
| 315 | void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 316 | int64_t c, uint32_t oprsz, uint32_t maxsz); |
| 317 | void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 318 | int64_t c, uint32_t oprsz, uint32_t maxsz); |
| 319 | |
| 320 | void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 321 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 322 | void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 323 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 324 | void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 325 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 326 | |
| 327 | /* Saturated arithmetic. */ |
| 328 | void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 329 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 330 | void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 331 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 332 | void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 333 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 334 | void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 335 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 336 | |
| 337 | /* Min/max. */ |
| 338 | void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 339 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 340 | void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 341 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 342 | void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 343 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 344 | void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 345 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 346 | |
| 347 | void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 348 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 349 | void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 350 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 351 | void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 352 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 353 | void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 354 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 355 | void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 356 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 357 | void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 358 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 359 | void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 360 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 361 | void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 362 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 363 | |
| 364 | void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 365 | int64_t c, uint32_t oprsz, uint32_t maxsz); |
| 366 | void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 367 | int64_t c, uint32_t oprsz, uint32_t maxsz); |
| 368 | void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 369 | int64_t c, uint32_t oprsz, uint32_t maxsz); |
| 370 | |
| 371 | void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 372 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 373 | void tcg_gen_gvec_andcs(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 374 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 375 | void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 376 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 377 | void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 378 | TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); |
| 379 | |
| 380 | void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 381 | uint32_t s, uint32_t m); |
| 382 | void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t s, |
| 383 | uint32_t m, uint64_t imm); |
| 384 | void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s, |
| 385 | uint32_t m, TCGv_i32); |
| 386 | void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s, |
| 387 | uint32_t m, TCGv_i64); |
| 388 | |
| 389 | void tcg_gen_gvec_dup_imm_var(unsigned vece, TCGv_ptr dbase, uint32_t dofs, |
| 390 | uint32_t oprsz, uint32_t maxsz, uint64_t imm); |
| 391 | |
| 392 | void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 393 | int64_t shift, uint32_t oprsz, uint32_t maxsz); |
| 394 | void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 395 | int64_t shift, uint32_t oprsz, uint32_t maxsz); |
| 396 | void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 397 | int64_t shift, uint32_t oprsz, uint32_t maxsz); |
| 398 | void tcg_gen_gvec_rotli(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 399 | int64_t shift, uint32_t oprsz, uint32_t maxsz); |
| 400 | void tcg_gen_gvec_rotri(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 401 | int64_t shift, uint32_t oprsz, uint32_t maxsz); |
| 402 | |
| 403 | void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 404 | TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); |
| 405 | void tcg_gen_gvec_shrs(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 406 | TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); |
| 407 | void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 408 | TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); |
| 409 | void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 410 | TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); |
| 411 | void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 412 | TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); |
| 413 | |
| 414 | /* |
| 415 | * Perform vector shift by vector element, modulo the element size. |
| 416 | * E.g. D[i] = A[i] << (B[i] % (8 << vece)). |
| 417 | */ |
| 418 | void tcg_gen_gvec_shlv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 419 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 420 | void tcg_gen_gvec_shrv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 421 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 422 | void tcg_gen_gvec_sarv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 423 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 424 | void tcg_gen_gvec_rotlv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 425 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 426 | void tcg_gen_gvec_rotrv(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 427 | uint32_t bofs, uint32_t oprsz, uint32_t maxsz); |
| 428 | |
| 429 | void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs, |
| 430 | uint32_t aofs, uint32_t bofs, |
| 431 | uint32_t oprsz, uint32_t maxsz); |
| 432 | void tcg_gen_gvec_cmpi(TCGCond cond, unsigned vece, uint32_t dofs, |
| 433 | uint32_t aofs, int64_t c, |
| 434 | uint32_t oprsz, uint32_t maxsz); |
| 435 | void tcg_gen_gvec_cmps(TCGCond cond, unsigned vece, uint32_t dofs, |
| 436 | uint32_t aofs, TCGv_i64 c, |
| 437 | uint32_t oprsz, uint32_t maxsz); |
| 438 | |
| 439 | /* |
| 440 | * Perform vector bit select: d = (b & a) | (c & ~a). |
| 441 | */ |
| 442 | void tcg_gen_gvec_bitsel(unsigned vece, uint32_t dofs, uint32_t aofs, |
| 443 | uint32_t bofs, uint32_t cofs, |
| 444 | uint32_t oprsz, uint32_t maxsz); |
| 445 | |
| 446 | /* |
| 447 | * 64-bit vector operations. Use these when the register has been allocated |
| 448 | * with tcg_global_mem_new_i64, and so we cannot also address it via pointer. |
| 449 | * OPRSZ = MAXSZ = 8. |
| 450 | */ |
| 451 | |
| 452 | void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a); |
| 453 | void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a); |
| 454 | void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a); |
| 455 | |
| 456 | void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 457 | void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 458 | void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 459 | |
| 460 | void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 461 | void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 462 | void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); |
| 463 | |
| 464 | void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 465 | void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 466 | void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 467 | void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 468 | void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 469 | void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); |
| 470 | void tcg_gen_vec_rotl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c); |
| 471 | void tcg_gen_vec_rotl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c); |
| 472 | |
| 473 | /* 32-bit vector operations. */ |
| 474 | void tcg_gen_vec_add8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b); |
| 475 | void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b); |
| 476 | |
| 477 | void tcg_gen_vec_sub8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b); |
| 478 | void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b); |
| 479 | |
| 480 | void tcg_gen_vec_shl8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 481 | void tcg_gen_vec_shl16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 482 | void tcg_gen_vec_shr8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 483 | void tcg_gen_vec_shr16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 484 | void tcg_gen_vec_sar8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 485 | void tcg_gen_vec_sar16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); |
| 486 | |
| 487 | #endif |