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1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Target dependent memory related functions.
4 *
5 * Copyright (c) 2008 Fabrice Bellard
6 */
7
8 #ifndef TCG_TCG_OP_MEM_H
9 #define TCG_TCG_OP_MEM_H
10
11 #ifndef TCG_ADDRESS_BITS
12 #error TCG_ADDRESS_BITS must be defined
13 #endif
14
15 #include "tcg/tcg-op-common.h"
16
17 #if TCG_ADDRESS_BITS == 32
18 typedef TCGv_i32 TCGv_va;
19 #define TCG_TYPE_VA TCG_TYPE_I32
20 #define tcgv_va_temp tcgv_i32_temp
21 #define tcgv_va_temp_new tcg_temp_new_i32
22 #elif TCG_ADDRESS_BITS == 64
23 typedef TCGv_i64 TCGv_va;
24 #define TCG_TYPE_VA TCG_TYPE_I64
25 #define tcgv_va_temp tcgv_i64_temp
26 #define tcgv_va_temp_new tcg_temp_new_i64
27 #else
28 #error
29 #endif
30
31 static inline void
32 tcg_gen_qemu_ld_i32(TCGv_i32 v, TCGv_va a, TCGArg i, MemOp m)
33 {
34 tcg_gen_qemu_ld_i32_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
35 }
36
37 static inline void
38 tcg_gen_qemu_st_i32(TCGv_i32 v, TCGv_va a, TCGArg i, MemOp m)
39 {
40 tcg_gen_qemu_st_i32_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
41 }
42
43 static inline void
44 tcg_gen_qemu_ld_i64(TCGv_i64 v, TCGv_va a, TCGArg i, MemOp m)
45 {
46 tcg_gen_qemu_ld_i64_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
47 }
48
49 static inline void
50 tcg_gen_qemu_st_i64(TCGv_i64 v, TCGv_va a, TCGArg i, MemOp m)
51 {
52 tcg_gen_qemu_st_i64_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
53 }
54
55 static inline void
56 tcg_gen_qemu_ld_i128(TCGv_i128 v, TCGv_va a, TCGArg i, MemOp m)
57 {
58 tcg_gen_qemu_ld_i128_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
59 }
60
61 static inline void
62 tcg_gen_qemu_st_i128(TCGv_i128 v, TCGv_va a, TCGArg i, MemOp m)
63 {
64 tcg_gen_qemu_st_i128_chk(v, tcgv_va_temp(a), i, m, TCG_TYPE_VA);
65 }
66
67 #define DEF_ATOMIC2(N, S) \
68 static inline void N##_##S(TCGv_##S r, TCGv_va a, TCGv_##S v, \
69 TCGArg i, MemOp m) \
70 { N##_##S##_chk(r, tcgv_va_temp(a), v, i, m, TCG_TYPE_VA); }
71
72 #define DEF_ATOMIC3(N, S) \
73 static inline void N##_##S(TCGv_##S r, TCGv_va a, TCGv_##S o, \
74 TCGv_##S n, TCGArg i, MemOp m) \
75 { N##_##S##_chk(r, tcgv_va_temp(a), o, n, i, m, TCG_TYPE_VA); }
76
77 DEF_ATOMIC3(tcg_gen_atomic_cmpxchg, i32)
78 DEF_ATOMIC3(tcg_gen_atomic_cmpxchg, i64)
79 DEF_ATOMIC3(tcg_gen_atomic_cmpxchg, i128)
80
81 DEF_ATOMIC3(tcg_gen_nonatomic_cmpxchg, i32)
82 DEF_ATOMIC3(tcg_gen_nonatomic_cmpxchg, i64)
83 DEF_ATOMIC3(tcg_gen_nonatomic_cmpxchg, i128)
84
85 DEF_ATOMIC2(tcg_gen_atomic_xchg, i32)
86 DEF_ATOMIC2(tcg_gen_atomic_xchg, i64)
87 DEF_ATOMIC2(tcg_gen_atomic_xchg, i128)
88
89 DEF_ATOMIC2(tcg_gen_atomic_fetch_add, i32)
90 DEF_ATOMIC2(tcg_gen_atomic_fetch_add, i64)
91 DEF_ATOMIC2(tcg_gen_atomic_fetch_and, i32)
92 DEF_ATOMIC2(tcg_gen_atomic_fetch_and, i64)
93 DEF_ATOMIC2(tcg_gen_atomic_fetch_and, i128)
94 DEF_ATOMIC2(tcg_gen_atomic_fetch_or, i32)
95 DEF_ATOMIC2(tcg_gen_atomic_fetch_or, i64)
96 DEF_ATOMIC2(tcg_gen_atomic_fetch_or, i128)
97 DEF_ATOMIC2(tcg_gen_atomic_fetch_xor, i32)
98 DEF_ATOMIC2(tcg_gen_atomic_fetch_xor, i64)
99 DEF_ATOMIC2(tcg_gen_atomic_fetch_smin, i32)
100 DEF_ATOMIC2(tcg_gen_atomic_fetch_smin, i64)
101 DEF_ATOMIC2(tcg_gen_atomic_fetch_umin, i32)
102 DEF_ATOMIC2(tcg_gen_atomic_fetch_umin, i64)
103 DEF_ATOMIC2(tcg_gen_atomic_fetch_smax, i32)
104 DEF_ATOMIC2(tcg_gen_atomic_fetch_smax, i64)
105 DEF_ATOMIC2(tcg_gen_atomic_fetch_umax, i32)
106 DEF_ATOMIC2(tcg_gen_atomic_fetch_umax, i64)
107
108 DEF_ATOMIC2(tcg_gen_atomic_add_fetch, i32)
109 DEF_ATOMIC2(tcg_gen_atomic_add_fetch, i64)
110 DEF_ATOMIC2(tcg_gen_atomic_and_fetch, i32)
111 DEF_ATOMIC2(tcg_gen_atomic_and_fetch, i64)
112 DEF_ATOMIC2(tcg_gen_atomic_or_fetch, i32)
113 DEF_ATOMIC2(tcg_gen_atomic_or_fetch, i64)
114 DEF_ATOMIC2(tcg_gen_atomic_xor_fetch, i32)
115 DEF_ATOMIC2(tcg_gen_atomic_xor_fetch, i64)
116 DEF_ATOMIC2(tcg_gen_atomic_smin_fetch, i32)
117 DEF_ATOMIC2(tcg_gen_atomic_smin_fetch, i64)
118 DEF_ATOMIC2(tcg_gen_atomic_umin_fetch, i32)
119 DEF_ATOMIC2(tcg_gen_atomic_umin_fetch, i64)
120 DEF_ATOMIC2(tcg_gen_atomic_smax_fetch, i32)
121 DEF_ATOMIC2(tcg_gen_atomic_smax_fetch, i64)
122 DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i32)
123 DEF_ATOMIC2(tcg_gen_atomic_umax_fetch, i64)
124
125 #undef DEF_ATOMIC2
126 #undef DEF_ATOMIC3
127
128 #endif /* TCG_TCG_OP_MEM_H */