| 1 | /* |
| 2 | * Tiny Code Generator for QEMU |
| 3 | * |
| 4 | * Copyright (c) 2008 Fabrice Bellard |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #ifndef TCG_H |
| 26 | #define TCG_H |
| 27 | |
| 28 | #include "exec/memop.h" |
| 29 | #include "exec/memopidx.h" |
| 30 | #include "qemu/bitops.h" |
| 31 | #include "qemu/plugin.h" |
| 32 | #include "qemu/queue.h" |
| 33 | #include "tcg/tcg-mo.h" |
| 34 | #include "tcg/target-reg-bits.h" |
| 35 | #include "tcg-target.h" |
| 36 | #include "tcg/tcg-cond.h" |
| 37 | #include "tcg/insn-start-words.h" |
| 38 | #include "tcg/debug-assert.h" |
| 39 | |
| 40 | /* XXX: make safe guess about sizes */ |
| 41 | #define MAX_OP_PER_INSTR 266 |
| 42 | |
| 43 | #define CPU_TEMP_BUF_NLONGS 128 |
| 44 | #define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) |
| 45 | |
| 46 | typedef int64_t tcg_target_long; |
| 47 | typedef uint64_t tcg_target_ulong; |
| 48 | #define TCG_PRIlx PRIx64 |
| 49 | #define TCG_PRIld PRId64 |
| 50 | |
| 51 | #if TCG_TARGET_NB_REGS <= 32 |
| 52 | typedef uint32_t TCGRegSet; |
| 53 | #elif TCG_TARGET_NB_REGS <= 64 |
| 54 | typedef uint64_t TCGRegSet; |
| 55 | #else |
| 56 | #error unsupported |
| 57 | #endif |
| 58 | |
| 59 | typedef enum TCGOpcode { |
| 60 | #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name, |
| 61 | #include "tcg/tcg-opc.h" |
| 62 | #undef DEF |
| 63 | NB_OPS, |
| 64 | } TCGOpcode; |
| 65 | |
| 66 | #define tcg_regset_set_reg(d, r) ((d) |= (TCGRegSet)1 << (r)) |
| 67 | #define tcg_regset_reset_reg(d, r) ((d) &= ~((TCGRegSet)1 << (r))) |
| 68 | #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1) |
| 69 | |
| 70 | #ifndef TCG_TARGET_INSN_UNIT_SIZE |
| 71 | # error "Missing TCG_TARGET_INSN_UNIT_SIZE" |
| 72 | #elif TCG_TARGET_INSN_UNIT_SIZE == 1 |
| 73 | typedef uint8_t tcg_insn_unit; |
| 74 | #elif TCG_TARGET_INSN_UNIT_SIZE == 2 |
| 75 | typedef uint16_t tcg_insn_unit; |
| 76 | #elif TCG_TARGET_INSN_UNIT_SIZE == 4 |
| 77 | typedef uint32_t tcg_insn_unit; |
| 78 | #elif TCG_TARGET_INSN_UNIT_SIZE == 8 |
| 79 | typedef uint64_t tcg_insn_unit; |
| 80 | #else |
| 81 | /* The port better have done this. */ |
| 82 | #endif |
| 83 | |
| 84 | typedef struct TCGRelocation TCGRelocation; |
| 85 | struct TCGRelocation { |
| 86 | QSIMPLEQ_ENTRY(TCGRelocation) next; |
| 87 | tcg_insn_unit *ptr; |
| 88 | intptr_t addend; |
| 89 | int type; |
| 90 | }; |
| 91 | |
| 92 | typedef struct TCGOp TCGOp; |
| 93 | typedef struct TCGLabelUse TCGLabelUse; |
| 94 | struct TCGLabelUse { |
| 95 | QSIMPLEQ_ENTRY(TCGLabelUse) next; |
| 96 | TCGOp *op; |
| 97 | }; |
| 98 | |
| 99 | typedef struct TCGLabel TCGLabel; |
| 100 | struct TCGLabel { |
| 101 | bool present; |
| 102 | bool has_value; |
| 103 | uint16_t id; |
| 104 | union { |
| 105 | uintptr_t value; |
| 106 | const tcg_insn_unit *value_ptr; |
| 107 | } u; |
| 108 | QSIMPLEQ_HEAD(, TCGLabelUse) branches; |
| 109 | QSIMPLEQ_HEAD(, TCGRelocation) relocs; |
| 110 | QSIMPLEQ_ENTRY(TCGLabel) next; |
| 111 | }; |
| 112 | |
| 113 | typedef struct TCGPool { |
| 114 | struct TCGPool *next; |
| 115 | int size; |
| 116 | uint8_t data[] __attribute__ ((aligned)); |
| 117 | } TCGPool; |
| 118 | |
| 119 | #define TCG_POOL_CHUNK_SIZE 32768 |
| 120 | |
| 121 | #define TCG_MAX_TEMPS 512 |
| 122 | #define TCG_MAX_INSNS 512 |
| 123 | |
| 124 | /* when the size of the arguments of a called function is smaller than |
| 125 | this value, they are statically allocated in the TB stack frame */ |
| 126 | #define TCG_STATIC_CALL_ARGS_SIZE 128 |
| 127 | |
| 128 | typedef enum TCGType { |
| 129 | TCG_TYPE_I32, |
| 130 | TCG_TYPE_I64, |
| 131 | TCG_TYPE_I128, |
| 132 | |
| 133 | TCG_TYPE_V64, |
| 134 | TCG_TYPE_V128, |
| 135 | TCG_TYPE_V256, |
| 136 | |
| 137 | /* Number of different types (integer not enum) */ |
| 138 | #define TCG_TYPE_COUNT (TCG_TYPE_V256 + 1) |
| 139 | |
| 140 | /* An alias for the size of the host register. */ |
| 141 | TCG_TYPE_REG = TCG_TYPE_I64, |
| 142 | |
| 143 | /* An alias for the size of the native pointer. */ |
| 144 | #if UINTPTR_MAX == UINT32_MAX |
| 145 | TCG_TYPE_PTR = TCG_TYPE_I32, |
| 146 | #else |
| 147 | TCG_TYPE_PTR = TCG_TYPE_I64, |
| 148 | #endif |
| 149 | } TCGType; |
| 150 | |
| 151 | /** |
| 152 | * tcg_type_size |
| 153 | * @t: type |
| 154 | * |
| 155 | * Return the size of the type in bytes. |
| 156 | */ |
| 157 | static inline int tcg_type_size(TCGType t) |
| 158 | { |
| 159 | unsigned i = t; |
| 160 | if (i >= TCG_TYPE_V64) { |
| 161 | tcg_debug_assert(i < TCG_TYPE_COUNT); |
| 162 | i -= TCG_TYPE_V64 - 1; |
| 163 | } |
| 164 | return 4 << i; |
| 165 | } |
| 166 | |
| 167 | typedef tcg_target_ulong TCGArg; |
| 168 | |
| 169 | /* Define type and accessor macros for TCG variables. |
| 170 | |
| 171 | TCG variables are the inputs and outputs of TCG ops, as described |
| 172 | in tcg/README. Target CPU front-end code uses these types to deal |
| 173 | with TCG variables as it emits TCG code via the tcg_gen_* functions. |
| 174 | They come in several flavours: |
| 175 | * TCGv_i32 : 32 bit integer type |
| 176 | * TCGv_i64 : 64 bit integer type |
| 177 | * TCGv_i128 : 128 bit integer type |
| 178 | * TCGv_ptr : a host pointer type |
| 179 | * TCGv_vaddr: an integer type wide enough to hold a target pointer type |
| 180 | * TCGv_vec : a host vector type; the exact size is not exposed |
| 181 | to the CPU front-end code. |
| 182 | * TCGv : an integer type the same size as target_ulong |
| 183 | (an alias for either TCGv_i32 or TCGv_i64) |
| 184 | The compiler's type checking will complain if you mix them |
| 185 | up and pass the wrong sized TCGv to a function. |
| 186 | |
| 187 | Users of tcg_gen_* don't need to know about any of the internal |
| 188 | details of these, and should treat them as opaque types. |
| 189 | You won't be able to look inside them in a debugger either. |
| 190 | |
| 191 | Internal implementation details follow: |
| 192 | |
| 193 | Note that there is no definition of the structs TCGv_i32_d etc anywhere. |
| 194 | This is deliberate, because the values we store in variables of type |
| 195 | TCGv_i32 are not really pointers-to-structures. They're just small |
| 196 | integers, but keeping them in pointer types like this means that the |
| 197 | compiler will complain if you accidentally pass a TCGv_i32 to a |
| 198 | function which takes a TCGv_i64, and so on. Only the internals of |
| 199 | TCG need to care about the actual contents of the types. */ |
| 200 | |
| 201 | typedef struct TCGv_i32_d *TCGv_i32; |
| 202 | typedef struct TCGv_i64_d *TCGv_i64; |
| 203 | typedef struct TCGv_i128_d *TCGv_i128; |
| 204 | typedef struct TCGv_ptr_d *TCGv_ptr; |
| 205 | typedef struct TCGv_vec_d *TCGv_vec; |
| 206 | typedef TCGv_ptr TCGv_env; |
| 207 | |
| 208 | #if __SIZEOF_POINTER__ == 4 |
| 209 | typedef TCGv_i32 TCGv_vaddr; |
| 210 | #elif __SIZEOF_POINTER__ == 8 |
| 211 | typedef TCGv_i64 TCGv_vaddr; |
| 212 | #else |
| 213 | # error "sizeof pointer is different from {4,8}" |
| 214 | #endif /* __SIZEOF_POINTER__ */ |
| 215 | |
| 216 | /* call flags */ |
| 217 | /* Helper does not read globals (either directly or through an exception). It |
| 218 | implies TCG_CALL_NO_WRITE_GLOBALS. */ |
| 219 | #define TCG_CALL_NO_READ_GLOBALS 0x0001 |
| 220 | /* Helper does not write globals */ |
| 221 | #define TCG_CALL_NO_WRITE_GLOBALS 0x0002 |
| 222 | /* Helper can be safely suppressed if the return value is not used. */ |
| 223 | #define TCG_CALL_NO_SIDE_EFFECTS 0x0004 |
| 224 | /* Helper is G_NORETURN. */ |
| 225 | #define TCG_CALL_NO_RETURN 0x0008 |
| 226 | |
| 227 | /* convenience version of most used call flags */ |
| 228 | #define TCG_CALL_NO_RWG TCG_CALL_NO_READ_GLOBALS |
| 229 | #define TCG_CALL_NO_WG TCG_CALL_NO_WRITE_GLOBALS |
| 230 | #define TCG_CALL_NO_SE TCG_CALL_NO_SIDE_EFFECTS |
| 231 | #define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE) |
| 232 | #define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE) |
| 233 | |
| 234 | /* |
| 235 | * Flags for the bswap opcodes. |
| 236 | * If IZ, the input is zero-extended, otherwise unknown. |
| 237 | * If OZ or OS, the output is zero- or sign-extended respectively, |
| 238 | * otherwise the high bits are undefined. |
| 239 | */ |
| 240 | enum { |
| 241 | TCG_BSWAP_IZ = 1, |
| 242 | TCG_BSWAP_OZ = 2, |
| 243 | TCG_BSWAP_OS = 4, |
| 244 | }; |
| 245 | |
| 246 | typedef enum TCGTempVal { |
| 247 | TEMP_VAL_DEAD, |
| 248 | TEMP_VAL_REG, |
| 249 | TEMP_VAL_MEM, |
| 250 | TEMP_VAL_CONST, |
| 251 | } TCGTempVal; |
| 252 | |
| 253 | typedef enum TCGTempKind { |
| 254 | /* |
| 255 | * Temp is dead at the end of the extended basic block (EBB), |
| 256 | * the single-entry multiple-exit region that falls through |
| 257 | * conditional branches. |
| 258 | */ |
| 259 | TEMP_EBB, |
| 260 | /* Temp is live across the entire translation block, but dead at end. */ |
| 261 | TEMP_TB, |
| 262 | /* Temp is live across the entire translation block, and between them. */ |
| 263 | TEMP_GLOBAL, |
| 264 | /* Temp is in a fixed register. */ |
| 265 | TEMP_FIXED, |
| 266 | /* Temp is a fixed constant. */ |
| 267 | TEMP_CONST, |
| 268 | } TCGTempKind; |
| 269 | |
| 270 | typedef struct TCGTemp { |
| 271 | TCGReg reg:8; |
| 272 | TCGTempVal val_type:8; |
| 273 | TCGType base_type:8; |
| 274 | TCGType type:8; |
| 275 | TCGTempKind kind:3; |
| 276 | unsigned int indirect_reg:1; |
| 277 | unsigned int indirect_base:1; |
| 278 | unsigned int mem_coherent:1; |
| 279 | unsigned int mem_allocated:1; |
| 280 | unsigned int temp_allocated:1; |
| 281 | unsigned int temp_subindex:2; |
| 282 | |
| 283 | int64_t val; |
| 284 | struct TCGTemp *mem_base; |
| 285 | intptr_t mem_offset; |
| 286 | const char *name; |
| 287 | |
| 288 | /* Pass-specific information that can be stored for a temporary. |
| 289 | One word worth of integer data, and one pointer to data |
| 290 | allocated separately. */ |
| 291 | uintptr_t state; |
| 292 | void *state_ptr; |
| 293 | } TCGTemp; |
| 294 | |
| 295 | typedef struct TCGContext TCGContext; |
| 296 | |
| 297 | typedef struct TCGTempSet { |
| 298 | unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)]; |
| 299 | } TCGTempSet; |
| 300 | |
| 301 | /* |
| 302 | * With 1 128-bit output, a 32-bit host requires 4 output parameters, |
| 303 | * which leaves a maximum of 28 other slots. Which is enough for 7 |
| 304 | * 128-bit operands. |
| 305 | */ |
| 306 | #define DEAD_ARG (1 << 4) |
| 307 | #define SYNC_ARG (1 << 0) |
| 308 | typedef uint32_t TCGLifeData; |
| 309 | |
| 310 | struct TCGOp { |
| 311 | TCGOpcode opc : 8; |
| 312 | unsigned nargs : 8; |
| 313 | |
| 314 | /* Parameters for this opcode. See below. */ |
| 315 | unsigned param1 : 8; |
| 316 | unsigned param2 : 8; |
| 317 | |
| 318 | /* Lifetime data of the operands. */ |
| 319 | TCGLifeData life; |
| 320 | |
| 321 | /* Next and previous opcodes. */ |
| 322 | QTAILQ_ENTRY(TCGOp) link; |
| 323 | |
| 324 | /* Register preferences for the output(s). */ |
| 325 | TCGRegSet output_pref[2]; |
| 326 | |
| 327 | /* Arguments for the opcode. */ |
| 328 | TCGArg args[]; |
| 329 | }; |
| 330 | |
| 331 | #define TCGOP_CALLI(X) (X)->param1 |
| 332 | #define TCGOP_CALLO(X) (X)->param2 |
| 333 | |
| 334 | #define TCGOP_TYPE(X) (X)->param1 |
| 335 | #define TCGOP_FLAGS(X) (X)->param2 |
| 336 | #define TCGOP_VECE(X) (X)->param2 |
| 337 | |
| 338 | /* Make sure operands fit in the bitfields above. */ |
| 339 | QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8)); |
| 340 | |
| 341 | static inline TCGRegSet output_pref(const TCGOp *op, unsigned i) |
| 342 | { |
| 343 | return i < ARRAY_SIZE(op->output_pref) ? op->output_pref[i] : 0; |
| 344 | } |
| 345 | |
| 346 | struct TCGContext { |
| 347 | uintptr_t pool_cur, pool_end; |
| 348 | TCGPool *pool_first, *pool_current, *pool_first_large; |
| 349 | int nb_labels; |
| 350 | int nb_globals; |
| 351 | int nb_temps; |
| 352 | int nb_indirects; |
| 353 | int nb_ops; |
| 354 | TCGType addr_type; /* TCG_TYPE_I32 or TCG_TYPE_I64 */ |
| 355 | TCGBar guest_mo; |
| 356 | |
| 357 | TCGRegSet reserved_regs; |
| 358 | intptr_t current_frame_offset; |
| 359 | intptr_t frame_start; |
| 360 | intptr_t frame_end; |
| 361 | TCGTemp *frame_temp; |
| 362 | |
| 363 | TranslationBlock *gen_tb; /* tb for which code is being generated */ |
| 364 | tcg_insn_unit *code_buf; /* pointer for start of tb */ |
| 365 | tcg_insn_unit *code_ptr; /* pointer for running end of tb */ |
| 366 | |
| 367 | #ifdef CONFIG_DEBUG_TCG |
| 368 | int goto_tb_issue_mask; |
| 369 | const TCGOpcode *vecop_list; |
| 370 | #endif |
| 371 | |
| 372 | /* Code generation. Note that we specifically do not use tcg_insn_unit |
| 373 | here, because there's too much arithmetic throughout that relies |
| 374 | on addition and subtraction working on bytes. Rely on the GCC |
| 375 | extension that allows arithmetic on void*. */ |
| 376 | void *code_gen_buffer; |
| 377 | size_t code_gen_buffer_size; |
| 378 | void *code_gen_ptr; |
| 379 | void *data_gen_ptr; |
| 380 | |
| 381 | /* Threshold to flush the translated code buffer. */ |
| 382 | void *code_gen_highwater; |
| 383 | |
| 384 | /* Track which vCPU triggers events */ |
| 385 | CPUState *cpu; /* *_trans */ |
| 386 | |
| 387 | /* These structures are private to tcg-target.c.inc. */ |
| 388 | QSIMPLEQ_HEAD(, TCGLabelQemuLdst) ldst_labels; |
| 389 | struct TCGLabelPoolData *pool_labels; |
| 390 | |
| 391 | TCGLabel *exitreq_label; |
| 392 | |
| 393 | #ifdef CONFIG_PLUGIN |
| 394 | /* |
| 395 | * We keep one plugin_tb struct per TCGContext. Note that on every TB |
| 396 | * translation we clear but do not free its contents; this way we |
| 397 | * avoid a lot of malloc/free churn, since after a few TB's it's |
| 398 | * unlikely that we'll need to allocate either more instructions or more |
| 399 | * space for instructions (for variable-instruction-length ISAs). |
| 400 | */ |
| 401 | struct qemu_plugin_tb *plugin_tb; |
| 402 | const struct DisasContextBase *plugin_db; |
| 403 | |
| 404 | /* descriptor of the instruction being translated */ |
| 405 | struct qemu_plugin_insn *plugin_insn; |
| 406 | #endif |
| 407 | |
| 408 | /* For host-specific values. */ |
| 409 | #ifdef __riscv |
| 410 | MemOp riscv_cur_vsew; |
| 411 | TCGType riscv_cur_type; |
| 412 | #endif |
| 413 | /* |
| 414 | * During the tcg_reg_alloc_op loop, we are within a sequence of |
| 415 | * carry-using opcodes like addco+addci. |
| 416 | */ |
| 417 | bool carry_live; |
| 418 | |
| 419 | GHashTable *const_table[TCG_TYPE_COUNT]; |
| 420 | TCGTempSet free_temps[TCG_TYPE_COUNT]; |
| 421 | TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */ |
| 422 | |
| 423 | QTAILQ_HEAD(, TCGOp) ops, free_ops; |
| 424 | QSIMPLEQ_HEAD(, TCGLabel) labels; |
| 425 | |
| 426 | /* |
| 427 | * When clear, new ops are added to the tail of @ops. |
| 428 | * When set, new ops are added in front of @emit_before_op. |
| 429 | */ |
| 430 | TCGOp *emit_before_op; |
| 431 | |
| 432 | /* Tells which temporary holds a given register. |
| 433 | It does not take into account fixed registers */ |
| 434 | TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS]; |
| 435 | |
| 436 | uint16_t gen_insn_end_off[TCG_MAX_INSNS]; |
| 437 | uint64_t *gen_insn_data; |
| 438 | |
| 439 | /* Exit to translator on overflow. */ |
| 440 | sigjmp_buf jmp_trans; |
| 441 | }; |
| 442 | |
| 443 | static inline bool temp_readonly(TCGTemp *ts) |
| 444 | { |
| 445 | return ts->kind >= TEMP_FIXED; |
| 446 | } |
| 447 | |
| 448 | extern __thread TCGContext *tcg_ctx; |
| 449 | extern const void *tcg_code_gen_epilogue; |
| 450 | extern ptrdiff_t tcg_splitwx_diff; |
| 451 | extern TCGv_env tcg_env; |
| 452 | |
| 453 | bool in_code_gen_buffer(const void *p); |
| 454 | |
| 455 | #ifdef CONFIG_DEBUG_TCG |
| 456 | const void *tcg_splitwx_to_rx(void *rw); |
| 457 | void *tcg_splitwx_to_rw(const void *rx); |
| 458 | #else |
| 459 | static inline const void *tcg_splitwx_to_rx(void *rw) |
| 460 | { |
| 461 | return rw ? rw + tcg_splitwx_diff : NULL; |
| 462 | } |
| 463 | |
| 464 | static inline void *tcg_splitwx_to_rw(const void *rx) |
| 465 | { |
| 466 | return rx ? (void *)rx - tcg_splitwx_diff : NULL; |
| 467 | } |
| 468 | #endif |
| 469 | |
| 470 | static inline TCGArg temp_arg(TCGTemp *ts) |
| 471 | { |
| 472 | return (uintptr_t)ts; |
| 473 | } |
| 474 | |
| 475 | static inline TCGTemp *arg_temp(TCGArg a) |
| 476 | { |
| 477 | return (TCGTemp *)(uintptr_t)a; |
| 478 | } |
| 479 | |
| 480 | #ifdef CONFIG_DEBUG_TCG |
| 481 | size_t temp_idx(TCGTemp *ts); |
| 482 | TCGTemp *tcgv_i32_temp(TCGv_i32 v); |
| 483 | #else |
| 484 | static inline size_t temp_idx(TCGTemp *ts) |
| 485 | { |
| 486 | return ts - tcg_ctx->temps; |
| 487 | } |
| 488 | |
| 489 | /* |
| 490 | * Using the offset of a temporary, relative to TCGContext, rather than |
| 491 | * its index means that we don't use 0. That leaves offset 0 free for |
| 492 | * a NULL representation without having to leave index 0 unused. |
| 493 | */ |
| 494 | static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v) |
| 495 | { |
| 496 | return (void *)tcg_ctx + (uintptr_t)v; |
| 497 | } |
| 498 | #endif |
| 499 | |
| 500 | static inline TCGTemp *tcgv_i64_temp(TCGv_i64 v) |
| 501 | { |
| 502 | return tcgv_i32_temp((TCGv_i32)v); |
| 503 | } |
| 504 | |
| 505 | static inline TCGTemp *tcgv_i128_temp(TCGv_i128 v) |
| 506 | { |
| 507 | return tcgv_i32_temp((TCGv_i32)v); |
| 508 | } |
| 509 | |
| 510 | static inline TCGTemp *tcgv_ptr_temp(TCGv_ptr v) |
| 511 | { |
| 512 | return tcgv_i32_temp((TCGv_i32)v); |
| 513 | } |
| 514 | |
| 515 | static inline TCGTemp *tcgv_vec_temp(TCGv_vec v) |
| 516 | { |
| 517 | return tcgv_i32_temp((TCGv_i32)v); |
| 518 | } |
| 519 | |
| 520 | static inline TCGArg tcgv_i32_arg(TCGv_i32 v) |
| 521 | { |
| 522 | return temp_arg(tcgv_i32_temp(v)); |
| 523 | } |
| 524 | |
| 525 | static inline TCGArg tcgv_i64_arg(TCGv_i64 v) |
| 526 | { |
| 527 | return temp_arg(tcgv_i64_temp(v)); |
| 528 | } |
| 529 | |
| 530 | static inline TCGArg tcgv_i128_arg(TCGv_i128 v) |
| 531 | { |
| 532 | return temp_arg(tcgv_i128_temp(v)); |
| 533 | } |
| 534 | |
| 535 | static inline TCGArg tcgv_ptr_arg(TCGv_ptr v) |
| 536 | { |
| 537 | return temp_arg(tcgv_ptr_temp(v)); |
| 538 | } |
| 539 | |
| 540 | static inline TCGArg tcgv_vec_arg(TCGv_vec v) |
| 541 | { |
| 542 | return temp_arg(tcgv_vec_temp(v)); |
| 543 | } |
| 544 | |
| 545 | static inline TCGv_i32 temp_tcgv_i32(TCGTemp *t) |
| 546 | { |
| 547 | (void)temp_idx(t); /* trigger embedded assert */ |
| 548 | return (TCGv_i32)((void *)t - (void *)tcg_ctx); |
| 549 | } |
| 550 | |
| 551 | static inline TCGv_i64 temp_tcgv_i64(TCGTemp *t) |
| 552 | { |
| 553 | return (TCGv_i64)temp_tcgv_i32(t); |
| 554 | } |
| 555 | |
| 556 | static inline TCGv_i128 temp_tcgv_i128(TCGTemp *t) |
| 557 | { |
| 558 | return (TCGv_i128)temp_tcgv_i32(t); |
| 559 | } |
| 560 | |
| 561 | static inline TCGv_ptr temp_tcgv_ptr(TCGTemp *t) |
| 562 | { |
| 563 | return (TCGv_ptr)temp_tcgv_i32(t); |
| 564 | } |
| 565 | |
| 566 | static inline TCGv_vaddr temp_tcgv_vaddr(TCGTemp *t) |
| 567 | { |
| 568 | return (TCGv_vaddr)temp_tcgv_i32(t); |
| 569 | } |
| 570 | |
| 571 | static inline TCGv_vec temp_tcgv_vec(TCGTemp *t) |
| 572 | { |
| 573 | return (TCGv_vec)temp_tcgv_i32(t); |
| 574 | } |
| 575 | |
| 576 | static inline TCGArg tcg_get_insn_param(TCGOp *op, unsigned arg) |
| 577 | { |
| 578 | return op->args[arg]; |
| 579 | } |
| 580 | |
| 581 | static inline void tcg_set_insn_param(TCGOp *op, unsigned arg, TCGArg v) |
| 582 | { |
| 583 | op->args[arg] = v; |
| 584 | } |
| 585 | |
| 586 | static inline uint64_t tcg_get_insn_start_param(TCGOp *op, unsigned arg) |
| 587 | { |
| 588 | tcg_debug_assert(arg < INSN_START_WORDS); |
| 589 | return tcg_get_insn_param(op, arg); |
| 590 | } |
| 591 | |
| 592 | static inline void tcg_set_insn_start_param(TCGOp *op, unsigned arg, uint64_t v) |
| 593 | { |
| 594 | tcg_debug_assert(arg < INSN_START_WORDS); |
| 595 | tcg_set_insn_param(op, arg, v); |
| 596 | } |
| 597 | |
| 598 | /* The last op that was emitted. */ |
| 599 | static inline TCGOp *tcg_last_op(void) |
| 600 | { |
| 601 | return QTAILQ_LAST(&tcg_ctx->ops); |
| 602 | } |
| 603 | |
| 604 | /* Test for whether to terminate the TB for using too many opcodes. */ |
| 605 | static inline bool tcg_op_buf_full(void) |
| 606 | { |
| 607 | /* This is not a hard limit, it merely stops translation when |
| 608 | * we have produced "enough" opcodes. We want to limit TB size |
| 609 | * such that a RISC host can reasonably use a 16-bit signed |
| 610 | * branch within the TB. We also need to be mindful of the |
| 611 | * 16-bit unsigned offsets, TranslationBlock.jmp_reset_offset[] |
| 612 | * and TCGContext.gen_insn_end_off[]. |
| 613 | */ |
| 614 | return tcg_ctx->nb_ops >= 4000; |
| 615 | } |
| 616 | |
| 617 | /* pool based memory allocation */ |
| 618 | |
| 619 | /* user-mode: mmap_lock must be held for tcg_malloc_internal. */ |
| 620 | void *tcg_malloc_internal(TCGContext *s, int size); |
| 621 | void tcg_pool_reset(TCGContext *s); |
| 622 | TranslationBlock *tcg_tb_alloc(TCGContext *s); |
| 623 | |
| 624 | void tcg_region_reset_all(void); |
| 625 | |
| 626 | size_t tcg_code_size(void); |
| 627 | size_t tcg_code_capacity(void); |
| 628 | |
| 629 | /** |
| 630 | * tcg_tb_insert: |
| 631 | * @tb: translation block to insert |
| 632 | * |
| 633 | * Insert @tb into the region trees. |
| 634 | */ |
| 635 | void tcg_tb_insert(TranslationBlock *tb); |
| 636 | |
| 637 | /** |
| 638 | * tcg_tb_remove: |
| 639 | * @tb: translation block to remove |
| 640 | * |
| 641 | * Remove @tb from the region trees. |
| 642 | */ |
| 643 | void tcg_tb_remove(TranslationBlock *tb); |
| 644 | |
| 645 | /** |
| 646 | * tcg_tb_lookup: |
| 647 | * @tc_ptr: host PC to look up |
| 648 | * |
| 649 | * Look up a translation block inside the region trees by @tc_ptr. This is |
| 650 | * useful for exception handling, but must not be used for the purposes of |
| 651 | * executing the returned translation block. See struct tb_tc for more |
| 652 | * information. |
| 653 | * |
| 654 | * Returns: a translation block previously inserted into the region trees, |
| 655 | * such that @tc_ptr points anywhere inside the code generated for it, or |
| 656 | * NULL. |
| 657 | */ |
| 658 | TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr); |
| 659 | |
| 660 | /** |
| 661 | * tcg_tb_foreach: |
| 662 | * @func: callback |
| 663 | * @user_data: opaque value to pass to @callback |
| 664 | * |
| 665 | * Call @func for each translation block inserted into the region trees. |
| 666 | */ |
| 667 | void tcg_tb_foreach(GTraverseFunc func, gpointer user_data); |
| 668 | |
| 669 | /** |
| 670 | * tcg_nb_tbs: |
| 671 | * |
| 672 | * Returns: the number of translation blocks inserted into the region trees. |
| 673 | */ |
| 674 | size_t tcg_nb_tbs(void); |
| 675 | |
| 676 | /* user-mode: Called with mmap_lock held. */ |
| 677 | static inline void *tcg_malloc(int size) |
| 678 | { |
| 679 | TCGContext *s = tcg_ctx; |
| 680 | uintptr_t ptr, ptr_end; |
| 681 | |
| 682 | /* ??? This is a weak placeholder for minimum malloc alignment. */ |
| 683 | size = QEMU_ALIGN_UP(size, 8); |
| 684 | |
| 685 | ptr = s->pool_cur; |
| 686 | ptr_end = ptr + size; |
| 687 | if (unlikely(ptr_end > s->pool_end)) { |
| 688 | return tcg_malloc_internal(tcg_ctx, size); |
| 689 | } else { |
| 690 | s->pool_cur = ptr_end; |
| 691 | return (void *)ptr; |
| 692 | } |
| 693 | } |
| 694 | |
| 695 | void tcg_func_start(TCGContext *s); |
| 696 | |
| 697 | int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start); |
| 698 | |
| 699 | void tb_target_set_jmp_target(const TranslationBlock *, int, |
| 700 | uintptr_t, uintptr_t); |
| 701 | |
| 702 | void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t size); |
| 703 | |
| 704 | #define TCG_CT_CONST 1 /* any constant of register size */ |
| 705 | #define TCG_CT_REG_ZERO 2 /* zero, in TCG_REG_ZERO */ |
| 706 | |
| 707 | typedef struct TCGArgConstraint { |
| 708 | unsigned ct : 16; |
| 709 | unsigned alias_index : 4; |
| 710 | unsigned sort_index : 4; |
| 711 | unsigned pair_index : 4; |
| 712 | unsigned pair : 2; /* 0: none, 1: first, 2: second, 3: second alias */ |
| 713 | bool oalias : 1; |
| 714 | bool ialias : 1; |
| 715 | bool newreg : 1; |
| 716 | TCGRegSet regs; |
| 717 | } TCGArgConstraint; |
| 718 | |
| 719 | #define TCG_MAX_OP_ARGS 16 |
| 720 | |
| 721 | /* Bits for TCGOpDef->flags, 8 bits available, all used. */ |
| 722 | enum { |
| 723 | /* Instruction exits the translation block. */ |
| 724 | TCG_OPF_BB_EXIT = 0x01, |
| 725 | /* Instruction defines the end of a basic block. */ |
| 726 | TCG_OPF_BB_END = 0x02, |
| 727 | /* Instruction clobbers call registers and potentially update globals. */ |
| 728 | TCG_OPF_CALL_CLOBBER = 0x04, |
| 729 | /* Instruction has side effects: it cannot be removed if its outputs |
| 730 | are not used, and might trigger exceptions. */ |
| 731 | TCG_OPF_SIDE_EFFECTS = 0x08, |
| 732 | /* Instruction operands may be I32 or I64 */ |
| 733 | TCG_OPF_INT = 0x10, |
| 734 | /* Instruction is optional and not implemented by the host, or insn |
| 735 | is generic and should not be implemented by the host. */ |
| 736 | TCG_OPF_NOT_PRESENT = 0x20, |
| 737 | /* Instruction operands are vectors. */ |
| 738 | TCG_OPF_VECTOR = 0x40, |
| 739 | /* Instruction is a conditional branch. */ |
| 740 | TCG_OPF_COND_BRANCH = 0x80, |
| 741 | /* Instruction produces carry out. */ |
| 742 | TCG_OPF_CARRY_OUT = 0x100, |
| 743 | /* Instruction consumes carry in. */ |
| 744 | TCG_OPF_CARRY_IN = 0x200, |
| 745 | }; |
| 746 | |
| 747 | typedef struct TCGOpDef { |
| 748 | const char *name; |
| 749 | uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args; |
| 750 | uint16_t flags; |
| 751 | } TCGOpDef; |
| 752 | |
| 753 | extern const TCGOpDef tcg_op_defs[]; |
| 754 | extern const size_t tcg_op_defs_max; |
| 755 | |
| 756 | /* |
| 757 | * tcg_op_supported: |
| 758 | * Query if @op, for @type and @flags, is supported by the host |
| 759 | * on which we are currently executing. |
| 760 | */ |
| 761 | bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags); |
| 762 | /* |
| 763 | * tcg_op_deposit_valid: |
| 764 | * Query if a deposit into (ofs, len) is supported for @type by |
| 765 | * the host on which we are currently executing. |
| 766 | */ |
| 767 | bool tcg_op_deposit_valid(TCGType type, unsigned ofs, unsigned len); |
| 768 | |
| 769 | void tcg_gen_call0(void *func, TCGHelperInfo *, TCGTemp *ret); |
| 770 | void tcg_gen_call1(void *func, TCGHelperInfo *, TCGTemp *ret, TCGTemp *); |
| 771 | void tcg_gen_call2(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 772 | TCGTemp *, TCGTemp *); |
| 773 | void tcg_gen_call3(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 774 | TCGTemp *, TCGTemp *, TCGTemp *); |
| 775 | void tcg_gen_call4(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 776 | TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *); |
| 777 | void tcg_gen_call5(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 778 | TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *); |
| 779 | void tcg_gen_call6(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 780 | TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *, |
| 781 | TCGTemp *, TCGTemp *); |
| 782 | void tcg_gen_call7(void *func, TCGHelperInfo *, TCGTemp *ret, |
| 783 | TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *, |
| 784 | TCGTemp *, TCGTemp *, TCGTemp *); |
| 785 | |
| 786 | TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs); |
| 787 | void tcg_op_remove(TCGContext *s, TCGOp *op); |
| 788 | |
| 789 | /** |
| 790 | * tcg_remove_ops_after: |
| 791 | * @op: target operation |
| 792 | * |
| 793 | * Discard any opcodes emitted since @op. Expected usage is to save |
| 794 | * a starting point with tcg_last_op(), speculatively emit opcodes, |
| 795 | * then decide whether or not to keep those opcodes after the fact. |
| 796 | */ |
| 797 | void tcg_remove_ops_after(TCGOp *op); |
| 798 | |
| 799 | void tcg_optimize(TCGContext *s); |
| 800 | |
| 801 | TCGLabel *gen_new_label(void); |
| 802 | |
| 803 | /** |
| 804 | * label_arg |
| 805 | * @l: label |
| 806 | * |
| 807 | * Encode a label for storage in the TCG opcode stream. |
| 808 | */ |
| 809 | |
| 810 | static inline TCGArg label_arg(TCGLabel *l) |
| 811 | { |
| 812 | return (uintptr_t)l; |
| 813 | } |
| 814 | |
| 815 | /** |
| 816 | * arg_label |
| 817 | * @i: value |
| 818 | * |
| 819 | * The opposite of label_arg. Retrieve a label from the |
| 820 | * encoding of the TCG opcode stream. |
| 821 | */ |
| 822 | |
| 823 | static inline TCGLabel *arg_label(TCGArg i) |
| 824 | { |
| 825 | return (TCGLabel *)(uintptr_t)i; |
| 826 | } |
| 827 | |
| 828 | /** |
| 829 | * tcg_ptr_byte_diff |
| 830 | * @a, @b: addresses to be differenced |
| 831 | * |
| 832 | * There are many places within the TCG backends where we need a byte |
| 833 | * difference between two pointers. While this can be accomplished |
| 834 | * with local casting, it's easy to get wrong -- especially if one is |
| 835 | * concerned with the signedness of the result. |
| 836 | * |
| 837 | * This version relies on GCC's void pointer arithmetic to get the |
| 838 | * correct result. |
| 839 | */ |
| 840 | |
| 841 | static inline ptrdiff_t tcg_ptr_byte_diff(const void *a, const void *b) |
| 842 | { |
| 843 | return a - b; |
| 844 | } |
| 845 | |
| 846 | /** |
| 847 | * tcg_pcrel_diff |
| 848 | * @s: the tcg context |
| 849 | * @target: address of the target |
| 850 | * |
| 851 | * Produce a pc-relative difference, from the current code_ptr |
| 852 | * to the destination address. |
| 853 | */ |
| 854 | |
| 855 | static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, const void *target) |
| 856 | { |
| 857 | return tcg_ptr_byte_diff(target, tcg_splitwx_to_rx(s->code_ptr)); |
| 858 | } |
| 859 | |
| 860 | /** |
| 861 | * tcg_tbrel_diff |
| 862 | * @s: the tcg context |
| 863 | * @target: address of the target |
| 864 | * |
| 865 | * Produce a difference, from the beginning of the current TB code |
| 866 | * to the destination address. |
| 867 | */ |
| 868 | static inline ptrdiff_t tcg_tbrel_diff(TCGContext *s, const void *target) |
| 869 | { |
| 870 | return tcg_ptr_byte_diff(target, tcg_splitwx_to_rx(s->code_buf)); |
| 871 | } |
| 872 | |
| 873 | /** |
| 874 | * tcg_current_code_size |
| 875 | * @s: the tcg context |
| 876 | * |
| 877 | * Compute the current code size within the translation block. |
| 878 | * This is used to fill in qemu's data structures for goto_tb. |
| 879 | */ |
| 880 | |
| 881 | static inline size_t tcg_current_code_size(TCGContext *s) |
| 882 | { |
| 883 | return tcg_ptr_byte_diff(s->code_ptr, s->code_buf); |
| 884 | } |
| 885 | |
| 886 | /** |
| 887 | * tcg_qemu_tb_exec: |
| 888 | * @env: pointer to CPUArchState for the CPU |
| 889 | * @tb_ptr: address of generated code for the TB to execute |
| 890 | * |
| 891 | * Start executing code from a given translation block. |
| 892 | * Where translation blocks have been linked, execution |
| 893 | * may proceed from the given TB into successive ones. |
| 894 | * Control eventually returns only when some action is needed |
| 895 | * from the top-level loop: either control must pass to a TB |
| 896 | * which has not yet been directly linked, or an asynchronous |
| 897 | * event such as an interrupt needs handling. |
| 898 | * |
| 899 | * Return: The return value is the value passed to the corresponding |
| 900 | * tcg_gen_exit_tb() at translation time of the last TB attempted to execute. |
| 901 | * The value is either zero or a 4-byte aligned pointer to that TB combined |
| 902 | * with additional information in its two least significant bits. The |
| 903 | * additional information is encoded as follows: |
| 904 | * 0, 1: the link between this TB and the next is via the specified |
| 905 | * TB index (0 or 1). That is, we left the TB via (the equivalent |
| 906 | * of) "goto_tb <index>". The main loop uses this to determine |
| 907 | * how to link the TB just executed to the next. |
| 908 | * 2: we are using instruction counting code generation, and we |
| 909 | * did not start executing this TB because the instruction counter |
| 910 | * would hit zero midway through it. In this case the pointer |
| 911 | * returned is the TB we were about to execute, and the caller must |
| 912 | * arrange to execute the remaining count of instructions. |
| 913 | * 3: we stopped because the CPU's exit_request flag was set |
| 914 | * (usually meaning that there is an interrupt that needs to be |
| 915 | * handled). The pointer returned is the TB we were about to execute |
| 916 | * when we noticed the pending exit request. |
| 917 | * |
| 918 | * If the bottom two bits indicate an exit-via-index then the CPU |
| 919 | * state is correctly synchronised and ready for execution of the next |
| 920 | * TB (and in particular the guest PC is the address to execute next). |
| 921 | * Otherwise, we gave up on execution of this TB before it started, and |
| 922 | * the caller must fix up the CPU state by calling the CPU's |
| 923 | * synchronize_from_tb() method with the TB pointer we return (falling |
| 924 | * back to calling the CPU's set_pc method with tb->pb if no |
| 925 | * synchronize_from_tb() method exists). |
| 926 | * |
| 927 | * Note that TCG targets may use a different definition of tcg_qemu_tb_exec |
| 928 | * to this default (which just calls the prologue.code emitted by |
| 929 | * tcg_target_qemu_prologue()). |
| 930 | */ |
| 931 | #define TB_EXIT_MASK 3 |
| 932 | #define TB_EXIT_IDX0 0 |
| 933 | #define TB_EXIT_IDX1 1 |
| 934 | #define TB_EXIT_IDXMAX 1 |
| 935 | #define TB_EXIT_REQUESTED 3 |
| 936 | |
| 937 | #ifdef CONFIG_TCG_INTERPRETER |
| 938 | uintptr_t tcg_qemu_tb_exec(CPUArchState *env, const void *tb_ptr); |
| 939 | #else |
| 940 | typedef uintptr_t tcg_prologue_fn(CPUArchState *env, const void *tb_ptr); |
| 941 | extern tcg_prologue_fn *tcg_qemu_tb_exec; |
| 942 | #endif |
| 943 | |
| 944 | void tcg_register_jit(const void *buf, size_t buf_size); |
| 945 | |
| 946 | /* Return zero if the tuple (opc, type, vece) is unsupportable; |
| 947 | return > 0 if it is directly supportable; |
| 948 | return < 0 if we must call tcg_expand_vec_op. */ |
| 949 | int tcg_can_emit_vec_op(TCGOpcode, TCGType, unsigned); |
| 950 | |
| 951 | /* Expand the tuple (opc, type, vece) on the given arguments. */ |
| 952 | void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...); |
| 953 | |
| 954 | /* Replicate a constant C according to the log2 of the element size. */ |
| 955 | uint64_t dup_const(unsigned vece, uint64_t c); |
| 956 | |
| 957 | #define dup_const(VECE, C) \ |
| 958 | (__builtin_constant_p(VECE) \ |
| 959 | ? ( (VECE) == MO_8 ? 0x0101010101010101ull * (uint8_t)(C) \ |
| 960 | : (VECE) == MO_16 ? 0x0001000100010001ull * (uint16_t)(C) \ |
| 961 | : (VECE) == MO_32 ? 0x0000000100000001ull * (uint32_t)(C) \ |
| 962 | : (VECE) == MO_64 ? (uint64_t)(C) \ |
| 963 | : (qemu_build_not_reached_always(), 0)) \ |
| 964 | : dup_const(VECE, C)) |
| 965 | |
| 966 | static inline const TCGOpcode *tcg_swap_vecop_list(const TCGOpcode *n) |
| 967 | { |
| 968 | #ifdef CONFIG_DEBUG_TCG |
| 969 | const TCGOpcode *o = tcg_ctx->vecop_list; |
| 970 | tcg_ctx->vecop_list = n; |
| 971 | return o; |
| 972 | #else |
| 973 | return NULL; |
| 974 | #endif |
| 975 | } |
| 976 | |
| 977 | bool tcg_can_emit_vecop_list(const TCGOpcode *, TCGType, unsigned); |
| 978 | void tcg_dump_ops(TCGContext *s, FILE *f, bool have_prefs); |
| 979 | /* tcg_dump_stats: Append TCG statistics to @buf */ |
| 980 | void tcg_dump_stats(GString *buf); |
| 981 | |
| 982 | #endif /* TCG_H */ |