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1 /*
2 * qemu user cpu loop
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include "qemu/osdep.h"
21 #include "qemu.h"
22 #include "user-internals.h"
23 #include "user/cpu_loop.h"
24 #include "signal-common.h"
25
26 static abi_ulong hppa_lws(CPUHPPAState *env)
27 {
28 CPUState *cs = env_cpu(env);
29 uint32_t which = env->gr[20];
30 abi_ulong addr = env->gr[26];
31 abi_ulong old = env->gr[25];
32 abi_ulong new = env->gr[24];
33 abi_ulong size, ret;
34
35 switch (which) {
36 default:
37 return -TARGET_ENOSYS;
38
39 case 0: /* elf32 atomic 32bit cmpxchg */
40 if ((addr & 3) || !access_ok(cs, VERIFY_WRITE, addr, 4)) {
41 return -TARGET_EFAULT;
42 }
43 old = tswap32(old);
44 new = tswap32(new);
45 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new);
46 ret = tswap32(ret);
47 break;
48
49 case 2: /* elf32 atomic "new" cmpxchg */
50 size = env->gr[23];
51 if (size >= 4) {
52 return -TARGET_ENOSYS;
53 }
54 if (((addr | old | new) & ((1 << size) - 1))
55 || !access_ok(cs, VERIFY_WRITE, addr, 1 << size)
56 || !access_ok(cs, VERIFY_READ, old, 1 << size)
57 || !access_ok(cs, VERIFY_READ, new, 1 << size)) {
58 return -TARGET_EFAULT;
59 }
60 /* Note that below we use host-endian loads so that the cmpxchg
61 can be host-endian as well. */
62 switch (size) {
63 case 0:
64 old = *(uint8_t *)g2h(cs, old);
65 new = *(uint8_t *)g2h(cs, new);
66 ret = qatomic_cmpxchg((uint8_t *)g2h(cs, addr), old, new);
67 ret = ret != old;
68 break;
69 case 1:
70 old = *(uint16_t *)g2h(cs, old);
71 new = *(uint16_t *)g2h(cs, new);
72 ret = qatomic_cmpxchg((uint16_t *)g2h(cs, addr), old, new);
73 ret = ret != old;
74 break;
75 case 2:
76 old = *(uint32_t *)g2h(cs, old);
77 new = *(uint32_t *)g2h(cs, new);
78 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new);
79 ret = ret != old;
80 break;
81 case 3:
82 {
83 uint64_t o64, n64, r64;
84 o64 = *(uint64_t *)g2h(cs, old);
85 n64 = *(uint64_t *)g2h(cs, new);
86 r64 = qatomic_cmpxchg((uint64_t *)g2h(cs, addr), o64, n64);
87 ret = r64 != o64;
88 }
89 break;
90 default:
91 g_assert_not_reached();
92 }
93 break;
94 }
95
96 env->gr[28] = ret;
97 return 0;
98 }
99
100 void cpu_loop(CPUHPPAState *env)
101 {
102 CPUState *cs = env_cpu(env);
103 abi_ulong ret, si_code = 0;
104 int trapnr;
105
106 while (1) {
107 cpu_exec_start(cs);
108 trapnr = cpu_exec(cs);
109 cpu_exec_end(cs);
110 qemu_process_cpu_events(cs);
111
112 switch (trapnr) {
113 case EXCP_SYSCALL:
114 ret = do_syscall(env, env->gr[20],
115 env->gr[26], env->gr[25],
116 env->gr[24], env->gr[23],
117 env->gr[22], env->gr[21], 0, 0);
118 switch (ret) {
119 default:
120 env->gr[28] = ret;
121 /* We arrived here by faking the gateway page. Return. */
122 env->iaoq_f = env->gr[31] | PRIV_USER;
123 env->iaoq_b = env->iaoq_f + 4;
124 break;
125 case -QEMU_ERESTARTSYS:
126 case -QEMU_ESIGRETURN:
127 case -QEMU_ESETPC:
128 break;
129 }
130 break;
131 case EXCP_SYSCALL_LWS:
132 env->gr[21] = hppa_lws(env);
133 /* We arrived here by faking the gateway page. Return. */
134 env->iaoq_f = env->gr[31] | PRIV_USER;
135 env->iaoq_b = env->iaoq_f + 4;
136 break;
137 case EXCP_IMP:
138 force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, env->iaoq_f);
139 break;
140 case EXCP_ILL:
141 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f);
142 break;
143 case EXCP_PRIV_OPR:
144 /* check for glibc ABORT_INSTRUCTION "iitlbp %r0,(%sr0, %r0)" */
145 if (env->cr[CR_IIR] == 0x04000000) {
146 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f);
147 } else {
148 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->iaoq_f);
149 }
150 break;
151 case EXCP_PRIV_REG:
152 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVREG, env->iaoq_f);
153 break;
154 case EXCP_OVERFLOW:
155 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->iaoq_f);
156 break;
157 case EXCP_COND:
158 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_CONDTRAP, env->iaoq_f);
159 break;
160 case EXCP_ASSIST:
161 #define set_si_code(mask, val) \
162 if (env->fr[0] & mask) { si_code = val; }
163 set_si_code(R_FPSR_FLG_I_MASK, TARGET_FPE_FLTRES);
164 set_si_code(R_FPSR_FLG_U_MASK, TARGET_FPE_FLTUND);
165 set_si_code(R_FPSR_FLG_O_MASK, TARGET_FPE_FLTOVF);
166 set_si_code(R_FPSR_FLG_Z_MASK, TARGET_FPE_FLTDIV);
167 set_si_code(R_FPSR_FLG_V_MASK, TARGET_FPE_FLTINV);
168 #undef set_si_code
169 force_sig_fault(TARGET_SIGFPE, si_code, env->iaoq_f);
170 break;
171 case EXCP_BREAK:
172 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f);
173 break;
174 case EXCP_DEBUG:
175 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f);
176 break;
177 case EXCP_INTERRUPT:
178 /* just indicate that signals should be handled asap */
179 break;
180 default:
181 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
182 abort();
183 }
184 process_pending_signals(env);
185 }
186 }
187
188 void init_main_thread(CPUState *cs, struct image_info *info)
189 {
190 CPUArchState *env = cpu_env(cs);
191
192 env->iaoq_f = info->entry | PRIV_USER;
193 env->iaoq_b = env->iaoq_f + 4;
194 env->gr[23] = 0;
195 env->gr[24] = info->argv;
196 env->gr[25] = info->argc;
197 /* The top-of-stack contains a linkage buffer. */
198 env->gr[30] = info->start_stack + 64;
199 env->gr[31] = info->entry;
200 }