| 1 | /* |
| 2 | * qemu user cpu loop |
| 3 | * |
| 4 | * Copyright (c) 2003-2008 Fabrice Bellard |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include "qemu/osdep.h" |
| 21 | #include "qemu.h" |
| 22 | #include "user-internals.h" |
| 23 | #include "user/cpu_loop.h" |
| 24 | #include "signal-common.h" |
| 25 | #include "sparc/cpu_loop.h" |
| 26 | |
| 27 | #define SPARC64_STACK_BIAS 2047 |
| 28 | |
| 29 | //#define DEBUG_WIN |
| 30 | |
| 31 | /* WARNING: dealing with register windows _is_ complicated. More info |
| 32 | can be found at http://www.sics.se/~psm/sparcstack.html */ |
| 33 | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
| 34 | { |
| 35 | index = (index + cwp * 16) % (16 * env->nwindows); |
| 36 | /* wrap handling : if cwp is on the last window, then we use the |
| 37 | registers 'after' the end */ |
| 38 | if (index < 8 && env->cwp == env->nwindows - 1) |
| 39 | index += 16 * env->nwindows; |
| 40 | return index; |
| 41 | } |
| 42 | |
| 43 | /* save the register window 'cwp1' */ |
| 44 | static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
| 45 | { |
| 46 | unsigned int i; |
| 47 | abi_ulong sp_ptr; |
| 48 | |
| 49 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
| 50 | #ifdef TARGET_SPARC64 |
| 51 | if (sp_ptr & 3) |
| 52 | sp_ptr += SPARC64_STACK_BIAS; |
| 53 | #endif |
| 54 | #if defined(DEBUG_WIN) |
| 55 | printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n", |
| 56 | sp_ptr, cwp1); |
| 57 | #endif |
| 58 | for(i = 0; i < 16; i++) { |
| 59 | /* FIXME - what to do if put_user() fails? */ |
| 60 | put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr); |
| 61 | sp_ptr += sizeof(abi_ulong); |
| 62 | } |
| 63 | } |
| 64 | |
| 65 | static void save_window(CPUSPARCState *env) |
| 66 | { |
| 67 | #ifndef TARGET_SPARC64 |
| 68 | unsigned int new_wim; |
| 69 | new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) & |
| 70 | ((1LL << env->nwindows) - 1); |
| 71 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2)); |
| 72 | env->wim = new_wim; |
| 73 | #else |
| 74 | /* |
| 75 | * cansave is zero if the spill trap handler is triggered by `save` and |
| 76 | * nonzero if triggered by a `flushw` |
| 77 | */ |
| 78 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2)); |
| 79 | env->cansave++; |
| 80 | env->canrestore--; |
| 81 | #endif |
| 82 | } |
| 83 | |
| 84 | static void restore_window(CPUSPARCState *env) |
| 85 | { |
| 86 | #ifndef TARGET_SPARC64 |
| 87 | unsigned int new_wim; |
| 88 | #endif |
| 89 | unsigned int i, cwp1; |
| 90 | abi_ulong sp_ptr; |
| 91 | |
| 92 | #ifndef TARGET_SPARC64 |
| 93 | new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) & |
| 94 | ((1LL << env->nwindows) - 1); |
| 95 | #endif |
| 96 | |
| 97 | /* restore the invalid window */ |
| 98 | cwp1 = cpu_cwp_inc(env, env->cwp + 1); |
| 99 | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)]; |
| 100 | #ifdef TARGET_SPARC64 |
| 101 | if (sp_ptr & 3) |
| 102 | sp_ptr += SPARC64_STACK_BIAS; |
| 103 | #endif |
| 104 | #if defined(DEBUG_WIN) |
| 105 | printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n", |
| 106 | sp_ptr, cwp1); |
| 107 | #endif |
| 108 | for(i = 0; i < 16; i++) { |
| 109 | /* FIXME - what to do if get_user() fails? */ |
| 110 | get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr); |
| 111 | sp_ptr += sizeof(abi_ulong); |
| 112 | } |
| 113 | #ifdef TARGET_SPARC64 |
| 114 | env->canrestore++; |
| 115 | if (env->cleanwin < env->nwindows - 1) |
| 116 | env->cleanwin++; |
| 117 | env->cansave--; |
| 118 | #else |
| 119 | env->wim = new_wim; |
| 120 | #endif |
| 121 | } |
| 122 | |
| 123 | void flush_windows(CPUSPARCState *env) |
| 124 | { |
| 125 | int offset, cwp1; |
| 126 | |
| 127 | offset = 1; |
| 128 | for(;;) { |
| 129 | /* if restore would invoke restore_window(), then we can stop */ |
| 130 | cwp1 = cpu_cwp_inc(env, env->cwp + offset); |
| 131 | #ifndef TARGET_SPARC64 |
| 132 | if (env->wim & (1 << cwp1)) |
| 133 | break; |
| 134 | #else |
| 135 | if (env->canrestore == 0) |
| 136 | break; |
| 137 | env->cansave++; |
| 138 | env->canrestore--; |
| 139 | #endif |
| 140 | save_window_offset(env, cwp1); |
| 141 | offset++; |
| 142 | } |
| 143 | cwp1 = cpu_cwp_inc(env, env->cwp + 1); |
| 144 | #ifndef TARGET_SPARC64 |
| 145 | /* set wim so that restore will reload the registers */ |
| 146 | env->wim = 1 << cwp1; |
| 147 | #endif |
| 148 | #if defined(DEBUG_WIN) |
| 149 | printf("flush_windows: nb=%d\n", offset - 1); |
| 150 | #endif |
| 151 | } |
| 152 | |
| 153 | static void next_instruction(CPUSPARCState *env) |
| 154 | { |
| 155 | env->pc = env->npc; |
| 156 | env->npc = env->npc + 4; |
| 157 | } |
| 158 | |
| 159 | static uint32_t do_getcc(CPUSPARCState *env) |
| 160 | { |
| 161 | #ifdef TARGET_SPARC64 |
| 162 | return cpu_get_ccr(env) & 0xf; |
| 163 | #else |
| 164 | return extract32(cpu_get_psr(env), 20, 4); |
| 165 | #endif |
| 166 | } |
| 167 | |
| 168 | static void do_setcc(CPUSPARCState *env, uint32_t icc) |
| 169 | { |
| 170 | #ifdef TARGET_SPARC64 |
| 171 | cpu_put_ccr(env, (cpu_get_ccr(env) & 0xf0) | (icc & 0xf)); |
| 172 | #else |
| 173 | cpu_put_psr(env, deposit32(cpu_get_psr(env), 20, 4, icc)); |
| 174 | #endif |
| 175 | } |
| 176 | |
| 177 | static uint32_t do_getpsr(CPUSPARCState *env) |
| 178 | { |
| 179 | #ifdef TARGET_SPARC64 |
| 180 | const uint64_t TSTATE_CWP = 0x1f; |
| 181 | const uint64_t TSTATE_ICC = 0xfull << 32; |
| 182 | const uint64_t TSTATE_XCC = 0xfull << 36; |
| 183 | const uint32_t PSR_S = 0x00000080u; |
| 184 | const uint32_t PSR_V8PLUS = 0xff000000u; |
| 185 | uint64_t tstate = sparc64_tstate(env); |
| 186 | |
| 187 | /* See <asm/psrcompat.h>, tstate_to_psr. */ |
| 188 | return ((tstate & TSTATE_CWP) | |
| 189 | PSR_S | |
| 190 | ((tstate & TSTATE_ICC) >> 12) | |
| 191 | ((tstate & TSTATE_XCC) >> 20) | |
| 192 | PSR_V8PLUS); |
| 193 | #else |
| 194 | return (cpu_get_psr(env) & (PSR_ICC | PSR_CWP)) | PSR_S; |
| 195 | #endif |
| 196 | } |
| 197 | |
| 198 | /* Avoid ifdefs below for the abi32 and abi64 paths. */ |
| 199 | #ifdef TARGET_ABI32 |
| 200 | #define TARGET_TT_SYSCALL (TT_TRAP + 0x10) /* t_linux */ |
| 201 | #else |
| 202 | #define TARGET_TT_SYSCALL (TT_TRAP + 0x6d) /* tl0_linux64 */ |
| 203 | #endif |
| 204 | |
| 205 | /* Avoid ifdefs below for the v9 and pre-v9 hw traps. */ |
| 206 | #ifdef TARGET_SPARC64 |
| 207 | #define TARGET_TT_SPILL TT_SPILL |
| 208 | #define TARGET_TT_FILL TT_FILL |
| 209 | #else |
| 210 | #define TARGET_TT_SPILL TT_WIN_OVF |
| 211 | #define TARGET_TT_FILL TT_WIN_UNF |
| 212 | #endif |
| 213 | |
| 214 | void cpu_loop (CPUSPARCState *env) |
| 215 | { |
| 216 | CPUState *cs = env_cpu(env); |
| 217 | int trapnr; |
| 218 | abi_long ret; |
| 219 | |
| 220 | while (1) { |
| 221 | cpu_exec_start(cs); |
| 222 | trapnr = cpu_exec(cs); |
| 223 | cpu_exec_end(cs); |
| 224 | qemu_process_cpu_events(cs); |
| 225 | |
| 226 | switch (trapnr) { |
| 227 | case TARGET_TT_SYSCALL: |
| 228 | ret = do_syscall (env, env->gregs[1], |
| 229 | env->regwptr[0], env->regwptr[1], |
| 230 | env->regwptr[2], env->regwptr[3], |
| 231 | env->regwptr[4], env->regwptr[5], |
| 232 | 0, 0); |
| 233 | if (ret == -QEMU_ERESTARTSYS || |
| 234 | ret == -QEMU_ESIGRETURN || |
| 235 | ret == -QEMU_ESETPC) { |
| 236 | break; |
| 237 | } |
| 238 | if ((abi_ulong)ret >= (abi_ulong)(-515)) { |
| 239 | set_syscall_C(env, 1); |
| 240 | ret = -ret; |
| 241 | } else { |
| 242 | set_syscall_C(env, 0); |
| 243 | } |
| 244 | env->regwptr[0] = ret; |
| 245 | /* next instruction */ |
| 246 | env->pc = env->npc; |
| 247 | env->npc = env->npc + 4; |
| 248 | break; |
| 249 | |
| 250 | case TT_TRAP + 0x01: /* breakpoint */ |
| 251 | case EXCP_DEBUG: |
| 252 | force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc); |
| 253 | break; |
| 254 | |
| 255 | case TT_TRAP + 0x02: /* div0 */ |
| 256 | case TT_DIV_ZERO: |
| 257 | force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); |
| 258 | break; |
| 259 | |
| 260 | case TT_TRAP + 0x03: /* flush windows */ |
| 261 | flush_windows(env); |
| 262 | next_instruction(env); |
| 263 | break; |
| 264 | |
| 265 | case TT_TRAP + 0x20: /* getcc */ |
| 266 | env->gregs[1] = do_getcc(env); |
| 267 | next_instruction(env); |
| 268 | break; |
| 269 | case TT_TRAP + 0x21: /* setcc */ |
| 270 | do_setcc(env, env->gregs[1]); |
| 271 | next_instruction(env); |
| 272 | break; |
| 273 | case TT_TRAP + 0x22: /* getpsr */ |
| 274 | env->gregs[1] = do_getpsr(env); |
| 275 | next_instruction(env); |
| 276 | break; |
| 277 | |
| 278 | #ifdef TARGET_SPARC64 |
| 279 | case TT_TRAP + 0x6e: |
| 280 | flush_windows(env); |
| 281 | sparc64_get_context(env); |
| 282 | break; |
| 283 | case TT_TRAP + 0x6f: |
| 284 | flush_windows(env); |
| 285 | /* |
| 286 | * If we have a pending signal, sparc64_set_context() may |
| 287 | * return early without changing register state (like a |
| 288 | * syscall that returns -QEMU_ERESTARTSYS). We will then |
| 289 | * take the pending signal via process_pending_signals() |
| 290 | * below and eventually re-execute the trap. We don't need |
| 291 | * the function to return a different value for the |
| 292 | * "restart" case because this main loop code does the |
| 293 | * same thing in both cases. |
| 294 | */ |
| 295 | sparc64_set_context(env); |
| 296 | break; |
| 297 | #endif |
| 298 | |
| 299 | case TARGET_TT_SPILL: /* window overflow */ |
| 300 | save_window(env); |
| 301 | break; |
| 302 | case TARGET_TT_FILL: /* window underflow */ |
| 303 | restore_window(env); |
| 304 | break; |
| 305 | |
| 306 | case TT_FP_EXCP: |
| 307 | { |
| 308 | int code = TARGET_FPE_FLTUNK; |
| 309 | target_ulong fsr = cpu_get_fsr(env); |
| 310 | |
| 311 | if ((fsr & FSR_FTT_MASK) == FSR_FTT_IEEE_EXCP) { |
| 312 | if (fsr & FSR_NVC) { |
| 313 | code = TARGET_FPE_FLTINV; |
| 314 | } else if (fsr & FSR_OFC) { |
| 315 | code = TARGET_FPE_FLTOVF; |
| 316 | } else if (fsr & FSR_UFC) { |
| 317 | code = TARGET_FPE_FLTUND; |
| 318 | } else if (fsr & FSR_DZC) { |
| 319 | code = TARGET_FPE_FLTDIV; |
| 320 | } else if (fsr & FSR_NXC) { |
| 321 | code = TARGET_FPE_FLTRES; |
| 322 | } |
| 323 | } |
| 324 | force_sig_fault(TARGET_SIGFPE, code, env->pc); |
| 325 | } |
| 326 | break; |
| 327 | |
| 328 | case EXCP_INTERRUPT: |
| 329 | /* just indicate that signals should be handled asap */ |
| 330 | break; |
| 331 | case TT_ILL_INSN: |
| 332 | force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->pc); |
| 333 | break; |
| 334 | case TT_PRIV_INSN: |
| 335 | force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc); |
| 336 | break; |
| 337 | case TT_TOVF: |
| 338 | force_sig_fault(TARGET_SIGEMT, TARGET_EMT_TAGOVF, env->pc); |
| 339 | break; |
| 340 | #ifdef TARGET_SPARC64 |
| 341 | case TT_PRIV_ACT: |
| 342 | /* Note do_privact defers to do_privop. */ |
| 343 | force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc); |
| 344 | break; |
| 345 | #else |
| 346 | case TT_NCP_INSN: |
| 347 | force_sig_fault(TARGET_SIGILL, TARGET_ILL_COPROC, env->pc); |
| 348 | break; |
| 349 | case TT_UNIMP_FLUSH: |
| 350 | next_instruction(env); |
| 351 | break; |
| 352 | #endif |
| 353 | case EXCP_ATOMIC: |
| 354 | cpu_exec_step_atomic(cs); |
| 355 | break; |
| 356 | default: |
| 357 | /* |
| 358 | * Most software trap numbers vector to BAD_TRAP. |
| 359 | * Handle anything not explicitly matched above. |
| 360 | */ |
| 361 | if (trapnr >= TT_TRAP && trapnr <= TT_TRAP + 0x7f) { |
| 362 | force_sig_fault(TARGET_SIGILL, ILL_ILLTRP, env->pc); |
| 363 | break; |
| 364 | } |
| 365 | fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); |
| 366 | cpu_dump_state(cs, stderr, 0); |
| 367 | exit(EXIT_FAILURE); |
| 368 | } |
| 369 | process_pending_signals (env); |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | void init_main_thread(CPUState *cs, struct image_info *info) |
| 374 | { |
| 375 | CPUArchState *env = cpu_env(cs); |
| 376 | |
| 377 | env->pc = info->entry; |
| 378 | env->npc = env->pc + 4; |
| 379 | env->regwptr[WREG_SP] = (info->start_stack - 16 * sizeof(abi_ulong) |
| 380 | - TARGET_STACK_BIAS); |
| 381 | } |