| 1 | /* |
| 2 | * Emulation of Linux signals |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | #include "qemu/osdep.h" |
| 20 | #include "qemu.h" |
| 21 | #include "user-internals.h" |
| 22 | #include "signal-common.h" |
| 23 | #include "linux-user/trace.h" |
| 24 | #include "target_ptrace.h" |
| 25 | |
| 26 | |
| 27 | /* A Sparc register window */ |
| 28 | struct target_reg_window { |
| 29 | abi_ulong locals[8]; |
| 30 | abi_ulong ins[8]; |
| 31 | }; |
| 32 | |
| 33 | /* A Sparc stack frame. */ |
| 34 | struct target_stackf { |
| 35 | /* |
| 36 | * Since qemu does not reference fp or callers_pc directly, |
| 37 | * it's simpler to treat fp and callers_pc as elements of ins[], |
| 38 | * and then bundle locals[] and ins[] into reg_window. |
| 39 | */ |
| 40 | struct target_reg_window win; |
| 41 | /* |
| 42 | * Similarly, bundle structptr and xxargs into xargs[]. |
| 43 | * This portion of the struct is part of the function call abi, |
| 44 | * and belongs to the callee for spilling argument registers. |
| 45 | */ |
| 46 | abi_ulong xargs[8]; |
| 47 | }; |
| 48 | |
| 49 | struct target_siginfo_fpu { |
| 50 | #ifdef TARGET_SPARC64 |
| 51 | uint64_t si_double_regs[32]; |
| 52 | uint64_t si_fsr; |
| 53 | uint64_t si_gsr; |
| 54 | uint64_t si_fprs; |
| 55 | #else |
| 56 | /* It is more convenient for qemu to move doubles, not singles. */ |
| 57 | uint64_t si_double_regs[16]; |
| 58 | uint32_t si_fsr; |
| 59 | uint32_t si_fpqdepth; |
| 60 | struct { |
| 61 | uint32_t insn_addr; |
| 62 | uint32_t insn; |
| 63 | } si_fpqueue [16]; |
| 64 | #endif |
| 65 | }; |
| 66 | |
| 67 | #ifdef TARGET_ARCH_HAS_SETUP_FRAME |
| 68 | struct target_signal_frame { |
| 69 | struct target_stackf ss; |
| 70 | struct target_pt_regs regs; |
| 71 | uint32_t si_mask; |
| 72 | abi_ulong fpu_save; |
| 73 | uint32_t insns[2] QEMU_ALIGNED(8); |
| 74 | abi_ulong extramask[TARGET_NSIG_WORDS - 1]; |
| 75 | abi_ulong extra_size; /* Should be 0 */ |
| 76 | abi_ulong rwin_save; |
| 77 | }; |
| 78 | #endif |
| 79 | |
| 80 | struct target_rt_signal_frame { |
| 81 | struct target_stackf ss; |
| 82 | target_siginfo_t info; |
| 83 | struct target_pt_regs regs; |
| 84 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
| 85 | abi_ulong fpu_save; |
| 86 | target_stack_t stack; |
| 87 | target_sigset_t mask; |
| 88 | #else |
| 89 | target_sigset_t mask; |
| 90 | abi_ulong fpu_save; |
| 91 | uint32_t insns[2]; |
| 92 | target_stack_t stack; |
| 93 | abi_ulong extra_size; /* Should be 0 */ |
| 94 | #endif |
| 95 | abi_ulong rwin_save; |
| 96 | }; |
| 97 | |
| 98 | static abi_ulong get_sigframe(struct target_sigaction *sa, |
| 99 | CPUSPARCState *env, |
| 100 | size_t framesize) |
| 101 | { |
| 102 | abi_ulong sp = get_sp_from_cpustate(env); |
| 103 | |
| 104 | /* |
| 105 | * If we are on the alternate signal stack and would overflow it, don't. |
| 106 | * Return an always-bogus address instead so we will die with SIGSEGV. |
| 107 | */ |
| 108 | if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize))) { |
| 109 | return -1; |
| 110 | } |
| 111 | |
| 112 | /* This is the X/Open sanctioned signal stack switching. */ |
| 113 | sp = target_sigsp(sp, sa) - framesize; |
| 114 | |
| 115 | /* |
| 116 | * Always align the stack frame. This handles two cases. First, |
| 117 | * sigaltstack need not be mindful of platform specific stack |
| 118 | * alignment. Second, if we took this signal because the stack |
| 119 | * is not aligned properly, we'd like to take the signal cleanly |
| 120 | * and report that. |
| 121 | */ |
| 122 | sp &= ~15UL; |
| 123 | |
| 124 | return sp; |
| 125 | } |
| 126 | |
| 127 | static void save_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env) |
| 128 | { |
| 129 | int i; |
| 130 | |
| 131 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
| 132 | __put_user(sparc64_tstate(env), ®s->tstate); |
| 133 | /* TODO: magic should contain PT_REG_MAGIC + %tt. */ |
| 134 | __put_user(0, ®s->magic); |
| 135 | #else |
| 136 | __put_user(cpu_get_psr(env), ®s->psr); |
| 137 | #endif |
| 138 | |
| 139 | __put_user(env->pc, ®s->pc); |
| 140 | __put_user(env->npc, ®s->npc); |
| 141 | __put_user(env->y, ®s->y); |
| 142 | |
| 143 | for (i = 0; i < 8; i++) { |
| 144 | __put_user(env->gregs[i], ®s->u_regs[i]); |
| 145 | } |
| 146 | for (i = 0; i < 8; i++) { |
| 147 | __put_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]); |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | static void restore_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env) |
| 152 | { |
| 153 | int i; |
| 154 | |
| 155 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) |
| 156 | /* User can only change condition codes and %asi in %tstate. */ |
| 157 | uint64_t tstate; |
| 158 | __get_user(tstate, ®s->tstate); |
| 159 | cpu_put_ccr(env, tstate >> 32); |
| 160 | env->asi = extract64(tstate, 24, 8); |
| 161 | #else |
| 162 | /* |
| 163 | * User can only change condition codes and FPU enabling in %psr. |
| 164 | * But don't bother with FPU enabling, since a real kernel would |
| 165 | * just re-enable the FPU upon the next fpu trap. |
| 166 | */ |
| 167 | uint32_t psr; |
| 168 | __get_user(psr, ®s->psr); |
| 169 | cpu_put_psr_icc(env, psr); |
| 170 | #endif |
| 171 | |
| 172 | /* Note that pc and npc are handled in the caller. */ |
| 173 | |
| 174 | __get_user(env->y, ®s->y); |
| 175 | |
| 176 | for (i = 0; i < 8; i++) { |
| 177 | __get_user(env->gregs[i], ®s->u_regs[i]); |
| 178 | } |
| 179 | for (i = 0; i < 8; i++) { |
| 180 | __get_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]); |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | static void save_reg_win(struct target_reg_window *win, CPUSPARCState *env) |
| 185 | { |
| 186 | int i; |
| 187 | |
| 188 | for (i = 0; i < 8; i++) { |
| 189 | __put_user(env->regwptr[i + WREG_L0], &win->locals[i]); |
| 190 | } |
| 191 | for (i = 0; i < 8; i++) { |
| 192 | __put_user(env->regwptr[i + WREG_I0], &win->ins[i]); |
| 193 | } |
| 194 | } |
| 195 | |
| 196 | static void save_fpu(struct target_siginfo_fpu *fpu, CPUSPARCState *env) |
| 197 | { |
| 198 | int i; |
| 199 | |
| 200 | #ifdef TARGET_SPARC64 |
| 201 | for (i = 0; i < 32; ++i) { |
| 202 | __put_user(env->fpr[i].ll, &fpu->si_double_regs[i]); |
| 203 | } |
| 204 | __put_user(cpu_get_fsr(env), &fpu->si_fsr); |
| 205 | __put_user(env->gsr, &fpu->si_gsr); |
| 206 | __put_user(env->fprs, &fpu->si_fprs); |
| 207 | #else |
| 208 | for (i = 0; i < 16; ++i) { |
| 209 | __put_user(env->fpr[i].ll, &fpu->si_double_regs[i]); |
| 210 | } |
| 211 | __put_user(cpu_get_fsr(env), &fpu->si_fsr); |
| 212 | __put_user(0, &fpu->si_fpqdepth); |
| 213 | #endif |
| 214 | } |
| 215 | |
| 216 | static void restore_fpu(struct target_siginfo_fpu *fpu, CPUSPARCState *env) |
| 217 | { |
| 218 | target_ulong fsr; |
| 219 | int i; |
| 220 | |
| 221 | #ifdef TARGET_SPARC64 |
| 222 | uint64_t fprs; |
| 223 | __get_user(fprs, &fpu->si_fprs); |
| 224 | |
| 225 | /* In case the user mucks about with FPRS, restore as directed. */ |
| 226 | if (fprs & FPRS_DL) { |
| 227 | for (i = 0; i < 16; ++i) { |
| 228 | __get_user(env->fpr[i].ll, &fpu->si_double_regs[i]); |
| 229 | } |
| 230 | } |
| 231 | if (fprs & FPRS_DU) { |
| 232 | for (i = 16; i < 32; ++i) { |
| 233 | __get_user(env->fpr[i].ll, &fpu->si_double_regs[i]); |
| 234 | } |
| 235 | } |
| 236 | __get_user(env->gsr, &fpu->si_gsr); |
| 237 | env->fprs |= fprs; |
| 238 | #else |
| 239 | for (i = 0; i < 16; ++i) { |
| 240 | __get_user(env->fpr[i].ll, &fpu->si_double_regs[i]); |
| 241 | } |
| 242 | #endif |
| 243 | |
| 244 | __get_user(fsr, &fpu->si_fsr); |
| 245 | cpu_put_fsr(env, fsr); |
| 246 | } |
| 247 | |
| 248 | #ifdef TARGET_ARCH_HAS_SETUP_FRAME |
| 249 | static void install_sigtramp(uint32_t *tramp, int syscall) |
| 250 | { |
| 251 | __put_user(0x82102000u + syscall, &tramp[0]); /* mov syscall, %g1 */ |
| 252 | __put_user(0x91d02010u, &tramp[1]); /* t 0x10 */ |
| 253 | } |
| 254 | |
| 255 | void setup_frame(int sig, struct target_sigaction *ka, |
| 256 | target_sigset_t *set, CPUSPARCState *env) |
| 257 | { |
| 258 | abi_ulong sf_addr; |
| 259 | struct target_signal_frame *sf; |
| 260 | size_t sf_size = sizeof(*sf) + sizeof(struct target_siginfo_fpu); |
| 261 | int i; |
| 262 | |
| 263 | sf_addr = get_sigframe(ka, env, sf_size); |
| 264 | trace_user_setup_frame(env, sf_addr); |
| 265 | |
| 266 | sf = lock_user(VERIFY_WRITE, sf_addr, sf_size, 0); |
| 267 | if (!sf) { |
| 268 | force_sigsegv(sig); |
| 269 | return; |
| 270 | } |
| 271 | |
| 272 | /* 2. Save the current process state */ |
| 273 | save_pt_regs(&sf->regs, env); |
| 274 | __put_user(0, &sf->extra_size); |
| 275 | |
| 276 | save_fpu((struct target_siginfo_fpu *)(sf + 1), env); |
| 277 | __put_user(sf_addr + sizeof(*sf), &sf->fpu_save); |
| 278 | |
| 279 | __put_user(0, &sf->rwin_save); /* TODO: save_rwin_state */ |
| 280 | |
| 281 | __put_user(set->sig[0], &sf->si_mask); |
| 282 | for (i = 0; i < TARGET_NSIG_WORDS - 1; i++) { |
| 283 | __put_user(set->sig[i + 1], &sf->extramask[i]); |
| 284 | } |
| 285 | |
| 286 | save_reg_win(&sf->ss.win, env); |
| 287 | |
| 288 | /* 3. signal handler back-trampoline and parameters */ |
| 289 | env->regwptr[WREG_SP] = sf_addr; |
| 290 | env->regwptr[WREG_O0] = sig; |
| 291 | env->regwptr[WREG_O1] = sf_addr + |
| 292 | offsetof(struct target_signal_frame, regs); |
| 293 | env->regwptr[WREG_O2] = sf_addr + |
| 294 | offsetof(struct target_signal_frame, regs); |
| 295 | |
| 296 | /* 4. signal handler */ |
| 297 | env->pc = ka->_sa_handler; |
| 298 | env->npc = env->pc + 4; |
| 299 | |
| 300 | /* 5. return to kernel instructions */ |
| 301 | if (ka->ka_restorer) { |
| 302 | env->regwptr[WREG_O7] = ka->ka_restorer; |
| 303 | } else { |
| 304 | /* Not used, but retain for ABI compatibility. */ |
| 305 | install_sigtramp(sf->insns, TARGET_NR_sigreturn); |
| 306 | env->regwptr[WREG_O7] = default_sigreturn; |
| 307 | } |
| 308 | unlock_user(sf, sf_addr, sf_size); |
| 309 | } |
| 310 | #endif /* TARGET_ARCH_HAS_SETUP_FRAME */ |
| 311 | |
| 312 | void setup_rt_frame(int sig, struct target_sigaction *ka, |
| 313 | target_siginfo_t *info, |
| 314 | target_sigset_t *set, CPUSPARCState *env) |
| 315 | { |
| 316 | abi_ulong sf_addr; |
| 317 | struct target_rt_signal_frame *sf; |
| 318 | size_t sf_size = sizeof(*sf) + sizeof(struct target_siginfo_fpu); |
| 319 | |
| 320 | sf_addr = get_sigframe(ka, env, sf_size); |
| 321 | trace_user_setup_rt_frame(env, sf_addr); |
| 322 | |
| 323 | sf = lock_user(VERIFY_WRITE, sf_addr, sf_size, 0); |
| 324 | if (!sf) { |
| 325 | force_sigsegv(sig); |
| 326 | return; |
| 327 | } |
| 328 | |
| 329 | /* 2. Save the current process state */ |
| 330 | save_reg_win(&sf->ss.win, env); |
| 331 | save_pt_regs(&sf->regs, env); |
| 332 | |
| 333 | save_fpu((struct target_siginfo_fpu *)(sf + 1), env); |
| 334 | __put_user(sf_addr + sizeof(*sf), &sf->fpu_save); |
| 335 | |
| 336 | __put_user(0, &sf->rwin_save); /* TODO: save_rwin_state */ |
| 337 | |
| 338 | sf->info = *info; |
| 339 | tswap_sigset(&sf->mask, set); |
| 340 | target_save_altstack(&sf->stack, env); |
| 341 | |
| 342 | #ifdef TARGET_ABI32 |
| 343 | __put_user(0, &sf->extra_size); |
| 344 | #endif |
| 345 | |
| 346 | /* 3. signal handler back-trampoline and parameters */ |
| 347 | env->regwptr[WREG_SP] = sf_addr - TARGET_STACK_BIAS; |
| 348 | env->regwptr[WREG_O0] = sig; |
| 349 | env->regwptr[WREG_O1] = |
| 350 | sf_addr + offsetof(struct target_rt_signal_frame, info); |
| 351 | #ifdef TARGET_ABI32 |
| 352 | env->regwptr[WREG_O2] = |
| 353 | sf_addr + offsetof(struct target_rt_signal_frame, regs); |
| 354 | #else |
| 355 | env->regwptr[WREG_O2] = env->regwptr[WREG_O1]; |
| 356 | #endif |
| 357 | |
| 358 | /* 4. signal handler */ |
| 359 | env->pc = ka->_sa_handler; |
| 360 | env->npc = env->pc + 4; |
| 361 | |
| 362 | /* 5. return to kernel instructions */ |
| 363 | #ifdef TARGET_ABI32 |
| 364 | if (ka->ka_restorer) { |
| 365 | env->regwptr[WREG_O7] = ka->ka_restorer; |
| 366 | } else { |
| 367 | /* Not used, but retain for ABI compatibility. */ |
| 368 | install_sigtramp(sf->insns, TARGET_NR_rt_sigreturn); |
| 369 | env->regwptr[WREG_O7] = default_rt_sigreturn; |
| 370 | } |
| 371 | #else |
| 372 | env->regwptr[WREG_O7] = ka->ka_restorer; |
| 373 | #endif |
| 374 | |
| 375 | unlock_user(sf, sf_addr, sf_size); |
| 376 | } |
| 377 | |
| 378 | long do_sigreturn(CPUSPARCState *env) |
| 379 | { |
| 380 | #ifdef TARGET_ARCH_HAS_SETUP_FRAME |
| 381 | abi_ulong sf_addr; |
| 382 | struct target_signal_frame *sf = NULL; |
| 383 | abi_ulong pc, npc, ptr; |
| 384 | target_sigset_t set; |
| 385 | sigset_t host_set; |
| 386 | int i; |
| 387 | |
| 388 | sf_addr = env->regwptr[WREG_SP]; |
| 389 | trace_user_do_sigreturn(env, sf_addr); |
| 390 | |
| 391 | /* 1. Make sure we are not getting garbage from the user */ |
| 392 | if ((sf_addr & 15) || !lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { |
| 393 | goto segv_and_exit; |
| 394 | } |
| 395 | |
| 396 | /* Make sure stack pointer is aligned. */ |
| 397 | __get_user(ptr, &sf->regs.u_regs[14]); |
| 398 | if (ptr & 7) { |
| 399 | goto segv_and_exit; |
| 400 | } |
| 401 | |
| 402 | /* Make sure instruction pointers are aligned. */ |
| 403 | __get_user(pc, &sf->regs.pc); |
| 404 | __get_user(npc, &sf->regs.npc); |
| 405 | if ((pc | npc) & 3) { |
| 406 | goto segv_and_exit; |
| 407 | } |
| 408 | |
| 409 | /* 2. Restore the state */ |
| 410 | restore_pt_regs(&sf->regs, env); |
| 411 | env->pc = pc; |
| 412 | env->npc = npc; |
| 413 | |
| 414 | __get_user(ptr, &sf->fpu_save); |
| 415 | if (ptr) { |
| 416 | struct target_siginfo_fpu *fpu; |
| 417 | if ((ptr & 3) || !lock_user_struct(VERIFY_READ, fpu, ptr, 1)) { |
| 418 | goto segv_and_exit; |
| 419 | } |
| 420 | restore_fpu(fpu, env); |
| 421 | unlock_user_struct(fpu, ptr, 0); |
| 422 | } |
| 423 | |
| 424 | __get_user(ptr, &sf->rwin_save); |
| 425 | if (ptr) { |
| 426 | goto segv_and_exit; /* TODO: restore_rwin */ |
| 427 | } |
| 428 | |
| 429 | __get_user(set.sig[0], &sf->si_mask); |
| 430 | for (i = 1; i < TARGET_NSIG_WORDS; i++) { |
| 431 | __get_user(set.sig[i], &sf->extramask[i - 1]); |
| 432 | } |
| 433 | |
| 434 | target_to_host_sigset_internal(&host_set, &set); |
| 435 | set_sigmask(&host_set); |
| 436 | |
| 437 | unlock_user_struct(sf, sf_addr, 0); |
| 438 | return -QEMU_ESIGRETURN; |
| 439 | |
| 440 | segv_and_exit: |
| 441 | unlock_user_struct(sf, sf_addr, 0); |
| 442 | force_sig(TARGET_SIGSEGV); |
| 443 | return -QEMU_ESIGRETURN; |
| 444 | #else |
| 445 | return -TARGET_ENOSYS; |
| 446 | #endif |
| 447 | } |
| 448 | |
| 449 | long do_rt_sigreturn(CPUSPARCState *env) |
| 450 | { |
| 451 | abi_ulong sf_addr, tpc, tnpc, ptr; |
| 452 | struct target_rt_signal_frame *sf = NULL; |
| 453 | sigset_t set; |
| 454 | |
| 455 | sf_addr = get_sp_from_cpustate(env); |
| 456 | trace_user_do_rt_sigreturn(env, sf_addr); |
| 457 | |
| 458 | /* 1. Make sure we are not getting garbage from the user */ |
| 459 | if ((sf_addr & 15) || !lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) { |
| 460 | goto segv_and_exit; |
| 461 | } |
| 462 | |
| 463 | /* Validate SP alignment. */ |
| 464 | __get_user(ptr, &sf->regs.u_regs[8 + WREG_SP]); |
| 465 | if ((ptr + TARGET_STACK_BIAS) & 7) { |
| 466 | goto segv_and_exit; |
| 467 | } |
| 468 | |
| 469 | /* Validate PC and NPC alignment. */ |
| 470 | __get_user(tpc, &sf->regs.pc); |
| 471 | __get_user(tnpc, &sf->regs.npc); |
| 472 | if ((tpc | tnpc) & 3) { |
| 473 | goto segv_and_exit; |
| 474 | } |
| 475 | |
| 476 | /* 2. Restore the state */ |
| 477 | restore_pt_regs(&sf->regs, env); |
| 478 | |
| 479 | __get_user(ptr, &sf->fpu_save); |
| 480 | if (ptr) { |
| 481 | struct target_siginfo_fpu *fpu; |
| 482 | if ((ptr & 7) || !lock_user_struct(VERIFY_READ, fpu, ptr, 1)) { |
| 483 | goto segv_and_exit; |
| 484 | } |
| 485 | restore_fpu(fpu, env); |
| 486 | unlock_user_struct(fpu, ptr, 0); |
| 487 | } |
| 488 | |
| 489 | __get_user(ptr, &sf->rwin_save); |
| 490 | if (ptr) { |
| 491 | goto segv_and_exit; /* TODO: restore_rwin_state */ |
| 492 | } |
| 493 | |
| 494 | target_restore_altstack(&sf->stack, env); |
| 495 | target_to_host_sigset(&set, &sf->mask); |
| 496 | set_sigmask(&set); |
| 497 | |
| 498 | env->pc = tpc; |
| 499 | env->npc = tnpc; |
| 500 | |
| 501 | unlock_user_struct(sf, sf_addr, 0); |
| 502 | return -QEMU_ESIGRETURN; |
| 503 | |
| 504 | segv_and_exit: |
| 505 | unlock_user_struct(sf, sf_addr, 0); |
| 506 | force_sig(TARGET_SIGSEGV); |
| 507 | return -QEMU_ESIGRETURN; |
| 508 | } |
| 509 | |
| 510 | #ifdef TARGET_ABI32 |
| 511 | void setup_sigtramp(abi_ulong sigtramp_page) |
| 512 | { |
| 513 | uint32_t *tramp = lock_user(VERIFY_WRITE, sigtramp_page, 2 * 8, 0); |
| 514 | assert(tramp != NULL); |
| 515 | |
| 516 | default_sigreturn = sigtramp_page; |
| 517 | install_sigtramp(tramp, TARGET_NR_sigreturn); |
| 518 | |
| 519 | default_rt_sigreturn = sigtramp_page + 8; |
| 520 | install_sigtramp(tramp + 2, TARGET_NR_rt_sigreturn); |
| 521 | |
| 522 | unlock_user(tramp, sigtramp_page, 2 * 8); |
| 523 | } |
| 524 | #endif |
| 525 | |
| 526 | #ifdef TARGET_SPARC64 |
| 527 | #define SPARC_MC_TSTATE 0 |
| 528 | #define SPARC_MC_PC 1 |
| 529 | #define SPARC_MC_NPC 2 |
| 530 | #define SPARC_MC_Y 3 |
| 531 | #define SPARC_MC_G1 4 |
| 532 | #define SPARC_MC_G2 5 |
| 533 | #define SPARC_MC_G3 6 |
| 534 | #define SPARC_MC_G4 7 |
| 535 | #define SPARC_MC_G5 8 |
| 536 | #define SPARC_MC_G6 9 |
| 537 | #define SPARC_MC_G7 10 |
| 538 | #define SPARC_MC_O0 11 |
| 539 | #define SPARC_MC_O1 12 |
| 540 | #define SPARC_MC_O2 13 |
| 541 | #define SPARC_MC_O3 14 |
| 542 | #define SPARC_MC_O4 15 |
| 543 | #define SPARC_MC_O5 16 |
| 544 | #define SPARC_MC_O6 17 |
| 545 | #define SPARC_MC_O7 18 |
| 546 | #define SPARC_MC_NGREG 19 |
| 547 | |
| 548 | typedef abi_ulong target_mc_greg_t; |
| 549 | typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; |
| 550 | |
| 551 | /* |
| 552 | * Note the manual 16-alignment; the kernel gets this because it |
| 553 | * includes a "long double qregs[16]" in the mcpu_fregs union, |
| 554 | * which we can't do. |
| 555 | */ |
| 556 | struct target_mc_fpu { |
| 557 | union { |
| 558 | uint32_t sregs[32]; |
| 559 | uint64_t dregs[32]; |
| 560 | //uint128_t qregs[16]; |
| 561 | } mcfpu_fregs; |
| 562 | abi_ulong mcfpu_fsr; |
| 563 | abi_ulong mcfpu_fprs; |
| 564 | abi_ulong mcfpu_gsr; |
| 565 | abi_ulong mcfpu_fq; |
| 566 | unsigned char mcfpu_qcnt; |
| 567 | unsigned char mcfpu_qentsz; |
| 568 | unsigned char mcfpu_enab; |
| 569 | } __attribute__((aligned(16))); |
| 570 | typedef struct target_mc_fpu target_mc_fpu_t; |
| 571 | |
| 572 | typedef struct { |
| 573 | target_mc_gregset_t mc_gregs; |
| 574 | target_mc_greg_t mc_fp; |
| 575 | target_mc_greg_t mc_i7; |
| 576 | target_mc_fpu_t mc_fpregs; |
| 577 | } target_mcontext_t; |
| 578 | |
| 579 | struct target_ucontext { |
| 580 | abi_ulong tuc_link; |
| 581 | abi_ulong tuc_flags; |
| 582 | target_sigset_t tuc_sigmask; |
| 583 | target_mcontext_t tuc_mcontext; |
| 584 | }; |
| 585 | |
| 586 | /* {set, get}context() needed for 64-bit SparcLinux userland. */ |
| 587 | void sparc64_set_context(CPUSPARCState *env) |
| 588 | { |
| 589 | abi_ulong ucp_addr; |
| 590 | struct target_ucontext *ucp; |
| 591 | target_mc_gregset_t *grp; |
| 592 | target_mc_fpu_t *fpup; |
| 593 | target_ulong pc, npc, tstate; |
| 594 | unsigned int i; |
| 595 | unsigned char fenab; |
| 596 | |
| 597 | if (env->regwptr[WREG_O1]) { |
| 598 | /* |
| 599 | * We're going to set the signal mask; we need to call |
| 600 | * block_signals() first, so that process_pending_signals() is |
| 601 | * guaranteed to run after the mask change. Without this, a |
| 602 | * guest signal that is pending-and-blocked at setcontext time |
| 603 | * is left undelivered even after its mask bit is cleared, |
| 604 | * because signal_pending stays 0 and the post-trap |
| 605 | * process_pending_signals() loop never enters. |
| 606 | * |
| 607 | * If block_signals() returns true, this means we have a |
| 608 | * pending signal that we could take now; we return early so |
| 609 | * the cpu_loop takes that signal. Eventually the guest will |
| 610 | * re-execute the trap insn and we'll come back here to have |
| 611 | * another go at set_context. This is the same way that |
| 612 | * do_sigprocmask() handles setting the signal mask. |
| 613 | */ |
| 614 | if (block_signals()) { |
| 615 | return; |
| 616 | } |
| 617 | } |
| 618 | ucp_addr = env->regwptr[WREG_O0]; |
| 619 | if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) { |
| 620 | goto do_sigsegv; |
| 621 | } |
| 622 | grp = &ucp->tuc_mcontext.mc_gregs; |
| 623 | __get_user(pc, &((*grp)[SPARC_MC_PC])); |
| 624 | __get_user(npc, &((*grp)[SPARC_MC_NPC])); |
| 625 | if ((pc | npc) & 3) { |
| 626 | goto do_sigsegv; |
| 627 | } |
| 628 | if (env->regwptr[WREG_O1]) { |
| 629 | target_sigset_t target_set; |
| 630 | sigset_t set; |
| 631 | |
| 632 | if (TARGET_NSIG_WORDS == 1) { |
| 633 | __get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]); |
| 634 | } else { |
| 635 | abi_ulong *src, *dst; |
| 636 | src = ucp->tuc_sigmask.sig; |
| 637 | dst = target_set.sig; |
| 638 | for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { |
| 639 | __get_user(*dst, src); |
| 640 | } |
| 641 | } |
| 642 | target_to_host_sigset_internal(&set, &target_set); |
| 643 | set_sigmask(&set); |
| 644 | } |
| 645 | env->pc = pc; |
| 646 | env->npc = npc; |
| 647 | __get_user(env->y, &((*grp)[SPARC_MC_Y])); |
| 648 | __get_user(tstate, &((*grp)[SPARC_MC_TSTATE])); |
| 649 | /* Honour TSTATE_ASI, TSTATE_ICC and TSTATE_XCC only */ |
| 650 | env->asi = (tstate >> 24) & 0xff; |
| 651 | cpu_put_ccr(env, (tstate >> 32) & 0xff); |
| 652 | __get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1])); |
| 653 | __get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2])); |
| 654 | __get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3])); |
| 655 | __get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4])); |
| 656 | __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); |
| 657 | __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); |
| 658 | /* Skip g7 as that's the thread register in userspace */ |
| 659 | |
| 660 | /* |
| 661 | * Note that unlike the kernel, we didn't need to mess with the |
| 662 | * guest register window state to save it into a pt_regs to run |
| 663 | * the kernel. So for us the guest's O regs are still in WREG_O* |
| 664 | * (unlike the kernel which has put them in UREG_I* in a pt_regs) |
| 665 | * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't |
| 666 | * need to be written back to userspace memory. |
| 667 | */ |
| 668 | __get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0])); |
| 669 | __get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1])); |
| 670 | __get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2])); |
| 671 | __get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3])); |
| 672 | __get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4])); |
| 673 | __get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5])); |
| 674 | __get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6])); |
| 675 | __get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7])); |
| 676 | |
| 677 | __get_user(env->regwptr[WREG_FP], &(ucp->tuc_mcontext.mc_fp)); |
| 678 | __get_user(env->regwptr[WREG_I7], &(ucp->tuc_mcontext.mc_i7)); |
| 679 | |
| 680 | /* |
| 681 | * The kernel's do_rt_sigreturn loads L and I registers from the |
| 682 | * register save area (RSA) at the new O6+STACK_BIAS. Unlike the |
| 683 | * kernel, QEMU has no kernel-mode path that triggers a window fill, |
| 684 | * so we must do it explicitly here. I6 and I7 are already restored |
| 685 | * from mc_fp and mc_i7 above; restore L0-L7 and I0-I5 from the RSA. |
| 686 | */ |
| 687 | { |
| 688 | abi_ulong sp_ptr = env->regwptr[WREG_O6]; |
| 689 | /* LP64 O6 is biased (8-byte-aligned - 2047); low bit set. ILP32 O6 is 4-byte-aligned. */ |
| 690 | if (sp_ptr & 3) |
| 691 | sp_ptr += TARGET_STACK_BIAS; |
| 692 | for (i = 0; i < 8; i++) |
| 693 | get_user_ual(env->regwptr[WREG_L0 + i], sp_ptr + i * 8); |
| 694 | for (i = 0; i < 6; i++) /* I0-I5; I6=FP and I7 already restored */ |
| 695 | get_user_ual(env->regwptr[WREG_I0 + i], sp_ptr + 64 + i * 8); |
| 696 | } |
| 697 | |
| 698 | fpup = &ucp->tuc_mcontext.mc_fpregs; |
| 699 | |
| 700 | __get_user(fenab, &(fpup->mcfpu_enab)); |
| 701 | if (fenab) { |
| 702 | abi_ulong fprs; |
| 703 | abi_ulong fsr; |
| 704 | |
| 705 | /* |
| 706 | * We use the FPRS from the guest only in deciding whether |
| 707 | * to restore the upper, lower, or both banks of the FPU regs. |
| 708 | * The kernel here writes the FPU register data into the |
| 709 | * process's current_thread_info state and unconditionally |
| 710 | * clears FPRS and TSTATE_PEF: this disables the FPU so that the |
| 711 | * next FPU-disabled trap will copy the data out of |
| 712 | * current_thread_info and into the real FPU registers. |
| 713 | * QEMU doesn't need to handle lazy-FPU-state-restoring like that, |
| 714 | * so we always load the data directly into the FPU registers |
| 715 | * and leave FPRS and TSTATE_PEF alone (so the FPU stays enabled). |
| 716 | * Note that because we (and the kernel) always write zeroes for |
| 717 | * the fenab and fprs in sparc64_get_context() none of this code |
| 718 | * will execute unless the guest manually constructed or changed |
| 719 | * the context structure. |
| 720 | */ |
| 721 | __get_user(fprs, &(fpup->mcfpu_fprs)); |
| 722 | if (fprs & FPRS_DL) { |
| 723 | for (i = 0; i < 16; i++) { |
| 724 | __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); |
| 725 | } |
| 726 | } |
| 727 | if (fprs & FPRS_DU) { |
| 728 | for (i = 16; i < 32; i++) { |
| 729 | __get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i])); |
| 730 | } |
| 731 | } |
| 732 | __get_user(fsr, &(fpup->mcfpu_fsr)); |
| 733 | cpu_put_fsr(env, fsr); |
| 734 | __get_user(env->gsr, &(fpup->mcfpu_gsr)); |
| 735 | } |
| 736 | unlock_user_struct(ucp, ucp_addr, 0); |
| 737 | return; |
| 738 | do_sigsegv: |
| 739 | unlock_user_struct(ucp, ucp_addr, 0); |
| 740 | force_sig(TARGET_SIGSEGV); |
| 741 | } |
| 742 | |
| 743 | void sparc64_get_context(CPUSPARCState *env) |
| 744 | { |
| 745 | abi_ulong ucp_addr; |
| 746 | struct target_ucontext *ucp; |
| 747 | target_mc_gregset_t *grp; |
| 748 | target_mcontext_t *mcp; |
| 749 | int err; |
| 750 | unsigned int i; |
| 751 | target_sigset_t target_set; |
| 752 | sigset_t set; |
| 753 | |
| 754 | ucp_addr = env->regwptr[WREG_O0]; |
| 755 | if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) { |
| 756 | goto do_sigsegv; |
| 757 | } |
| 758 | |
| 759 | memset(ucp, 0, sizeof(*ucp)); |
| 760 | |
| 761 | mcp = &ucp->tuc_mcontext; |
| 762 | grp = &mcp->mc_gregs; |
| 763 | |
| 764 | /* Skip over the trap instruction, first. */ |
| 765 | env->pc = env->npc; |
| 766 | env->npc += 4; |
| 767 | |
| 768 | /* If we're only reading the signal mask then do_sigprocmask() |
| 769 | * is guaranteed not to fail, which is important because we don't |
| 770 | * have any way to signal a failure or restart this operation since |
| 771 | * this is not a normal syscall. |
| 772 | */ |
| 773 | err = do_sigprocmask(0, NULL, &set); |
| 774 | assert(err == 0); |
| 775 | host_to_target_sigset_internal(&target_set, &set); |
| 776 | if (TARGET_NSIG_WORDS == 1) { |
| 777 | __put_user(target_set.sig[0], |
| 778 | (abi_ulong *)&ucp->tuc_sigmask); |
| 779 | } else { |
| 780 | abi_ulong *src, *dst; |
| 781 | src = target_set.sig; |
| 782 | dst = ucp->tuc_sigmask.sig; |
| 783 | for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) { |
| 784 | __put_user(*src, dst); |
| 785 | } |
| 786 | } |
| 787 | |
| 788 | __put_user(sparc64_tstate(env), &((*grp)[SPARC_MC_TSTATE])); |
| 789 | __put_user(env->pc, &((*grp)[SPARC_MC_PC])); |
| 790 | __put_user(env->npc, &((*grp)[SPARC_MC_NPC])); |
| 791 | __put_user(env->y, &((*grp)[SPARC_MC_Y])); |
| 792 | __put_user(env->gregs[1], &((*grp)[SPARC_MC_G1])); |
| 793 | __put_user(env->gregs[2], &((*grp)[SPARC_MC_G2])); |
| 794 | __put_user(env->gregs[3], &((*grp)[SPARC_MC_G3])); |
| 795 | __put_user(env->gregs[4], &((*grp)[SPARC_MC_G4])); |
| 796 | __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); |
| 797 | __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); |
| 798 | __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); |
| 799 | |
| 800 | /* |
| 801 | * Note that unlike the kernel, we didn't need to mess with the |
| 802 | * guest register window state to save it into a pt_regs to run |
| 803 | * the kernel. So for us the guest's O regs are still in WREG_O* |
| 804 | * (unlike the kernel which has put them in UREG_I* in a pt_regs) |
| 805 | * and the fp and i7 are still in WREG_I6 and WREG_I7 and don't |
| 806 | * need to be fished out of userspace memory. |
| 807 | */ |
| 808 | __put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0])); |
| 809 | __put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1])); |
| 810 | __put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2])); |
| 811 | __put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3])); |
| 812 | __put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4])); |
| 813 | __put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5])); |
| 814 | __put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6])); |
| 815 | __put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7])); |
| 816 | |
| 817 | __put_user(env->regwptr[WREG_FP], &(mcp->mc_fp)); |
| 818 | __put_user(env->regwptr[WREG_I7], &(mcp->mc_i7)); |
| 819 | |
| 820 | /* |
| 821 | * We don't write out the FPU state. This matches the kernel's |
| 822 | * implementation (which has the code for doing this but |
| 823 | * hidden behind an "if (fenab)" where fenab is always 0). |
| 824 | */ |
| 825 | |
| 826 | unlock_user_struct(ucp, ucp_addr, 1); |
| 827 | return; |
| 828 | do_sigsegv: |
| 829 | unlock_user_struct(ucp, ucp_addr, 1); |
| 830 | force_sig(TARGET_SIGSEGV); |
| 831 | } |
| 832 | #endif /* TARGET_SPARC64 */ |