| 1 | /* |
| 2 | * s390x PCI definitions |
| 3 | * |
| 4 | * Copyright 2025 IBM Corp. |
| 5 | * Author(s): Jared Rossi <jrossi@linux.ibm.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 8 | */ |
| 9 | |
| 10 | #ifndef PCI_H |
| 11 | #define PCI_H |
| 12 | |
| 13 | #include <stdint.h> |
| 14 | #include <stdbool.h> |
| 15 | #include "clp.h" |
| 16 | |
| 17 | #define ZPCI_CREATE_REQ(handle, space, len) \ |
| 18 | ((uint64_t) handle << 32 | space << 16 | len) |
| 19 | |
| 20 | union register_pair { |
| 21 | unsigned __int128 pair; |
| 22 | struct { |
| 23 | unsigned long even; |
| 24 | unsigned long odd; |
| 25 | }; |
| 26 | }; |
| 27 | |
| 28 | #define PCI_CFGBAR 0xF /* Base Address Register for config space */ |
| 29 | #define PCI_CMD_REG 0x4 /* Offset of command register */ |
| 30 | #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ |
| 31 | |
| 32 | #define PCI_BUS_MASTER_MASK 0x0020 /* LE bit 3 of 16 bit register */ |
| 33 | |
| 34 | int pci_write(uint32_t fhandle, uint64_t offset, uint8_t pcias, uint64_t data, |
| 35 | uint8_t len); |
| 36 | int pci_read(uint32_t fhandle, uint64_t offset, uint8_t pcias, void *buf, |
| 37 | uint8_t len); |
| 38 | |
| 39 | #endif |