| 1 | /* |
| 2 | * Definitions for virtio-pci |
| 3 | * |
| 4 | * Copyright 2025 IBM Corp. |
| 5 | * Author(s): Jared Rossi <jrossi@linux.ibm.com> |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 8 | */ |
| 9 | |
| 10 | #ifndef VIRTIO_PCI_H |
| 11 | #define VIRTIO_PCI_H |
| 12 | |
| 13 | /* Common configuration */ |
| 14 | #define VPCI_CAP_COMMON_CFG 1 |
| 15 | /* Notifications */ |
| 16 | #define VPCI_CAP_NOTIFY_CFG 2 |
| 17 | /* ISR access */ |
| 18 | #define VPCI_CAP_ISR_CFG 3 |
| 19 | /* Device specific configuration */ |
| 20 | #define VPCI_CAP_DEVICE_CFG 4 |
| 21 | /* PCI configuration access */ |
| 22 | #define VPCI_CAP_PCI_CFG 5 |
| 23 | /* Additional shared memory capability */ |
| 24 | #define VPCI_CAP_SHARED_MEMORY_CFG 8 |
| 25 | /* PCI vendor data configuration */ |
| 26 | #define VPCI_CAP_VENDOR_CFG 9 |
| 27 | |
| 28 | /* Offsets within capability header */ |
| 29 | #define VPCI_CAP_VNDR 0 |
| 30 | #define VPCI_CAP_NEXT 1 |
| 31 | #define VPCI_CAP_LEN 2 |
| 32 | #define VPCI_CAP_CFG_TYPE 3 |
| 33 | #define VPCI_CAP_BAR 4 |
| 34 | #define VPCI_CAP_OFFSET 8 |
| 35 | #define VPCI_CAP_LENGTH 12 |
| 36 | |
| 37 | #define VPCI_N_CAP_MULT 16 /* Notify multiplier, VPCI_CAP_NOTIFY_CFG only */ |
| 38 | |
| 39 | /* Common Area Offsets for virtio-pci queue */ |
| 40 | #define VPCI_C_OFFSET_DFSELECT 0 |
| 41 | #define VPCI_C_OFFSET_DF 4 |
| 42 | #define VPCI_C_OFFSET_GFSELECT 8 |
| 43 | #define VPCI_C_OFFSET_GF 12 |
| 44 | #define VPCI_C_COMMON_NUMQ 18 |
| 45 | #define VPCI_C_OFFSET_STATUS 20 |
| 46 | #define VPCI_C_OFFSET_Q_SELECT 22 |
| 47 | #define VPCI_C_OFFSET_Q_SIZE 24 |
| 48 | #define VPCI_C_OFFSET_Q_ENABLE 28 |
| 49 | #define VPCI_C_OFFSET_Q_NOFF 30 |
| 50 | #define VPCI_C_OFFSET_Q_DESCLO 32 |
| 51 | #define VPCI_C_OFFSET_Q_DESCHI 36 |
| 52 | #define VPCI_C_OFFSET_Q_AVAILLO 40 |
| 53 | #define VPCI_C_OFFSET_Q_AVAILHI 44 |
| 54 | #define VPCI_C_OFFSET_Q_USEDLO 48 |
| 55 | #define VPCI_C_OFFSET_Q_USEDHI 52 |
| 56 | |
| 57 | #define VIRTIO_F_VERSION_1 1 /* Feature bit 32 */ |
| 58 | |
| 59 | #define PCI_VENDOR_VIRTIO 0x1af4 |
| 60 | |
| 61 | struct VirtioPciCap { |
| 62 | uint8_t bar; /* Which PCIAS it's in */ |
| 63 | uint32_t off; /* Offset within bar */ |
| 64 | }; |
| 65 | typedef struct VirtioPciCap VirtioPciCap; |
| 66 | |
| 67 | void virtio_pci_id2type(VDev *vdev, uint16_t device_id); |
| 68 | int virtio_pci_reset(VDev *vdev); |
| 69 | long virtio_pci_notify(VRing *vr); |
| 70 | bool virtio_pci_is_supported(VDev *vdev); |
| 71 | int virtio_pci_setup(VDev *vdev); |
| 72 | int virtio_pci_setup_device(void); |
| 73 | |
| 74 | int vpci_read_flex(uint64_t offset, uint8_t pcias, void *buf, int len); |
| 75 | int vpci_read_bswap64(uint64_t offset, uint8_t pcias, uint64_t *buf); |
| 76 | int vpci_read_bswap32(uint64_t offset, uint8_t pcias, uint32_t *buf); |
| 77 | int vpci_read_bswap16(uint64_t offset, uint8_t pcias, uint16_t *buf); |
| 78 | int vpci_read_byte(uint64_t offset, uint8_t pcias, uint8_t *buf); |
| 79 | |
| 80 | int vpci_bswap64_write(uint64_t offset, uint8_t pcias, uint64_t data); |
| 81 | int vpci_bswap32_write(uint64_t offset, uint8_t pcias, uint32_t data); |
| 82 | int vpci_bswap16_write(uint64_t offset, uint8_t pcias, uint16_t data); |
| 83 | int vpci_write_byte(uint64_t offset, uint8_t pcias, uint8_t data); |
| 84 | |
| 85 | #endif |