| 1 | /* |
| 2 | * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | /****************************************************************************** |
| 19 | * |
| 20 | * HOYA: MULTI MEDIA INSTRUCTIONS |
| 21 | * |
| 22 | ******************************************************************************/ |
| 23 | |
| 24 | #ifndef EXTINSN |
| 25 | #define EXTINSN Q6INSN |
| 26 | #define __SELF_DEF_EXTINSN 1 |
| 27 | #endif |
| 28 | |
| 29 | #ifndef NO_MMVEC |
| 30 | |
| 31 | #define DO_FOR_EACH_CODE(WIDTH, CODE) \ |
| 32 | { \ |
| 33 | fHIDE(int i;) \ |
| 34 | fVFOREACH(WIDTH, i) {\ |
| 35 | CODE ;\ |
| 36 | } \ |
| 37 | } |
| 38 | |
| 39 | |
| 40 | |
| 41 | |
| 42 | #define ITERATOR_INSN_ANY_SLOT(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 43 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), \ |
| 44 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 45 | |
| 46 | #define ITERATOR_INSN_ANY_SLOT_2SRC(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 47 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 48 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 49 | |
| 50 | #define ITERATOR_INSN2_ANY_SLOT(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 51 | ITERATOR_INSN_ANY_SLOT(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 52 | |
| 53 | #define ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 54 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA_DV), \ |
| 55 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 56 | |
| 57 | |
| 58 | #define ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 59 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 60 | |
| 61 | |
| 62 | #define ITERATOR_INSN_SHIFT_SLOT(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 63 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), \ |
| 64 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 65 | |
| 66 | #define ITERATOR_INSN_SHIFT_SLOT_FLT(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 67 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS,A_HVX_FLT), \ |
| 68 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 69 | |
| 70 | #define ITERATOR_INSN_SHIFT3_SLOT(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 71 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS,A_CVI_VS_3SRC,A_NOTE_SHIFT_RESOURCE,A_NOTE_NOVP,A_NOTE_VA_UNARY), \ |
| 72 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 73 | |
| 74 | #define ITERATOR_INSN_SHIFT_SLOT_VV_LATE(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 75 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), \ |
| 76 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 77 | |
| 78 | #define ITERATOR_INSN2_SHIFT_SLOT(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 79 | ITERATOR_INSN_SHIFT_SLOT(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 80 | |
| 81 | #define ITERATOR_INSN_PERMUTE_SLOT(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 82 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), \ |
| 83 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 84 | |
| 85 | #define ITERATOR_INSN2_PERMUTE_SLOT(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 86 | ITERATOR_INSN_PERMUTE_SLOT(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 87 | |
| 88 | #define ITERATOR_INSN_PERMUTE_SLOT_DEP(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 89 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), |
| 90 | |
| 91 | |
| 92 | #define ITERATOR_INSN2_PERMUTE_SLOT_DEP(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 93 | ITERATOR_INSN_PERMUTE_SLOT_DEP(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 94 | |
| 95 | #define ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 96 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), \ |
| 97 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 98 | |
| 99 | #define ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC_DEP(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 100 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), \ |
| 101 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 102 | |
| 103 | #define ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 104 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 105 | |
| 106 | #define ITERATOR_INSN_MPY_SLOT(WIDTH,TAG, SYNTAX,DESCR,CODE) \ |
| 107 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 108 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX), \ |
| 109 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 110 | |
| 111 | #define ITERATOR_INSN_MPY_SLOT_LATE(WIDTH,TAG, SYNTAX,DESCR,CODE) \ |
| 112 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 113 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX), \ |
| 114 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 115 | |
| 116 | #define ITERATOR_INSN2_MPY_SLOT(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 117 | ITERATOR_INSN_MPY_SLOT(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 118 | |
| 119 | #define ITERATOR_INSN2_MPY_SLOT_LATE(WIDTH,TAG, SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 120 | ITERATOR_INSN_MPY_SLOT_LATE(WIDTH,TAG, SYNTAX2,DESCR,CODE) |
| 121 | |
| 122 | |
| 123 | #define ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 124 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX_DV), \ |
| 125 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 126 | |
| 127 | #define ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC_VX_FWD(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 128 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX_DV), \ |
| 129 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 130 | |
| 131 | #define ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 132 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 133 | |
| 134 | |
| 135 | |
| 136 | |
| 137 | #define ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC2(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 138 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX_DV,A_CVI_VX_VSRC0_IS_DST), DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 139 | |
| 140 | #define ITERATOR_INSN_SLOT2_DOUBLE_VEC(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 141 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX_DV,A_RESTRICT_SLOT2ONLY), DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 142 | |
| 143 | #define ITERATOR_INSN_VHISTLIKE(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 144 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_4SLOT), \ |
| 145 | DESCR, fHIDE(mmvector_t input;) input = fTMPVDATA(); DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 146 | |
| 147 | |
| 148 | |
| 149 | |
| 150 | |
| 151 | /****************************************************************************************** |
| 152 | * |
| 153 | * MMVECTOR MEMORY OPERATIONS - NO NAPALI V1 |
| 154 | * |
| 155 | *******************************************************************************************/ |
| 156 | |
| 157 | |
| 158 | |
| 159 | #define ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 160 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX_DV), \ |
| 161 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 162 | |
| 163 | #define ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 164 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 165 | |
| 166 | |
| 167 | |
| 168 | #define ITERATOR_INSN_SHIFT_SLOT_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 169 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), \ |
| 170 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 171 | |
| 172 | #define ITERATOR_INSN2_SHIFT_SLOT_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 173 | ITERATOR_INSN_SHIFT_SLOT_NOV1(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 174 | |
| 175 | |
| 176 | #define ITERATOR_INSN_ANY_SLOT_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 177 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), \ |
| 178 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 179 | |
| 180 | #define ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 181 | ITERATOR_INSN_ANY_SLOT_NOV1(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 182 | |
| 183 | |
| 184 | #define ITERATOR_INSN_MPY_SLOT_NOV1(WIDTH,TAG, SYNTAX,DESCR,CODE) \ |
| 185 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 186 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX), \ |
| 187 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 188 | |
| 189 | #define ITERATOR_INSN_PERMUTE_SLOT_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 190 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), \ |
| 191 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 192 | |
| 193 | #define ITERATOR_INSN2_PERMUTE_SLOTT_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 194 | ITERATOR_INSN_PERMUTE_SLOT(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 195 | |
| 196 | #define ITERATOR_INSN_PERMUTE_SLOT_DEPT_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 197 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), |
| 198 | |
| 199 | |
| 200 | #define ITERATOR_INSN2_PERMUTE_SLOT_DEPT_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 201 | ITERATOR_INSN_PERMUTE_SLOT_DEP_NOV1(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 202 | |
| 203 | #define ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 204 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), \ |
| 205 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 206 | |
| 207 | #define ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC_DEPT_NOV1(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 208 | EXTINSN(V6_##TAG, SYNTAX, ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), \ |
| 209 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 210 | |
| 211 | #define ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX,SYNTAX2,DESCR,CODE) \ |
| 212 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC_NOV1(WIDTH,TAG,SYNTAX2,DESCR,CODE) |
| 213 | |
| 214 | #define NARROWING_SHIFT_NOV1(ITERSIZE,TAG,DSTM,DSTTYPE,SRCTYPE,SYNOPTS,SATFUNC,RNDFUNC,SHAMTMASK) \ |
| 215 | ITERATOR_INSN_SHIFT_SLOT_NOV1(ITERSIZE,TAG, \ |
| 216 | "Vd32." #DSTTYPE "=vasr(Vu32." #SRCTYPE ",Vv32." #SRCTYPE ",Rt8)" #SYNOPTS, \ |
| 217 | "Vector shift right and shuffle", \ |
| 218 | fHIDE(int )shamt = RtV & SHAMTMASK; \ |
| 219 | DSTM(0,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VvV.SRCTYPE[i],shamt) >> shamt)); \ |
| 220 | DSTM(1,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VuV.SRCTYPE[i],shamt) >> shamt))) |
| 221 | |
| 222 | #define MMVEC_AVGS_NOV1(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 223 | ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,vavg##TYPE, "Vd32=vavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC")", "Vector Average "DESCR, VdV.DEST[i] = fVAVGS( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 224 | ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,vavg##TYPE##rnd, "Vd32=vavg"TYPE2"(Vu32,Vv32):rnd", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC"):rnd", "Vector Average % Round"DESCR, VdV.DEST[i] = fVAVGSRND( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 225 | ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,vnavg##TYPE, "Vd32=vnavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vnavg(Vu32."#SRC",Vv32."#SRC")", "Vector Negative Average "DESCR, VdV.DEST[i] = fVNAVGS( WIDTH, VuV.SRC[i], VvV.SRC[i])) |
| 226 | |
| 227 | #define MMVEC_AVGU_NOV1(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 228 | ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,vavg##TYPE, "Vd32=vavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC")", "Vector Average "DESCR, VdV.DEST[i] = fVAVGU( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 229 | ITERATOR_INSN2_ANY_SLOT_NOV1(WIDTH,vavg##TYPE##rnd, "Vd32=vavg"TYPE2"(Vu32,Vv32):rnd", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC"):rnd", "Vector Average % Round"DESCR, VdV.DEST[i] = fVAVGURND(WIDTH, VuV.SRC[i], VvV.SRC[i])) |
| 230 | |
| 231 | |
| 232 | |
| 233 | /****************************************************************************************** |
| 234 | * |
| 235 | * MMVECTOR MEMORY OPERATIONS |
| 236 | * |
| 237 | *******************************************************************************************/ |
| 238 | |
| 239 | #define MMVEC_EACH_EA(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,BEH) \ |
| 240 | EXTINSN(V6_##TAG##_pi, SYNTAXA "(Rx32++#s3)" NT SYNTAXB,ATTRIB,DESCR,{ fEA_REG(RxV); BEH; fPM_I(RxV,VEC_SCALE(siV)); }) \ |
| 241 | EXTINSN(V6_##TAG##_ai, SYNTAXA "(Rt32+#s4)" NT SYNTAXB,ATTRIB,DESCR,{ fEA_RI(RtV,VEC_SCALE(siV)); BEH;}) \ |
| 242 | EXTINSN(V6_##TAG##_ppu, SYNTAXA "(Rx32++Mu2)" NT SYNTAXB,ATTRIB,DESCR,{ fEA_REG(RxV); BEH; fPM_M(RxV,MuV); }) \ |
| 243 | |
| 244 | |
| 245 | #define MMVEC_COND_EACH_EA_TRUE(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,SYNTAXP,BEH) \ |
| 246 | EXTINSN(V6_##TAG##_pred_pi, "if (" #SYNTAXP "4) " SYNTAXA "(Rx32++#s3)" NT SYNTAXB, ATTRIB,DESCR, { if (fLSBOLD(SYNTAXP##V)) { fEA_REG(RxV); BEH; fPM_I(RxV,siV*fVECSIZE()); } else {CANCEL;}}) \ |
| 247 | EXTINSN(V6_##TAG##_pred_ai, "if (" #SYNTAXP "4) " SYNTAXA "(Rt32+#s4)" NT SYNTAXB, ATTRIB,DESCR, { if (fLSBOLD(SYNTAXP##V)) { fEA_RI(RtV,siV*fVECSIZE()); BEH;} else {CANCEL;}}) \ |
| 248 | EXTINSN(V6_##TAG##_pred_ppu, "if (" #SYNTAXP "4) " SYNTAXA "(Rx32++Mu2)" NT SYNTAXB,ATTRIB,DESCR, { if (fLSBOLD(SYNTAXP##V)) { fEA_REG(RxV); BEH; fPM_M(RxV,MuV); } else {CANCEL;}}) \ |
| 249 | |
| 250 | #define MMVEC_COND_EACH_EA_FALSE(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,SYNTAXP,BEH) \ |
| 251 | EXTINSN(V6_##TAG##_npred_pi, "if (!" #SYNTAXP "4) " SYNTAXA "(Rx32++#s3)" NT SYNTAXB,ATTRIB,DESCR,{ if (fLSBOLDNOT(SYNTAXP##V)) { fEA_REG(RxV); BEH; fPM_I(RxV,siV*fVECSIZE()); } else {CANCEL;}}) \ |
| 252 | EXTINSN(V6_##TAG##_npred_ai, "if (!" #SYNTAXP "4) " SYNTAXA "(Rt32+#s4)" NT SYNTAXB,ATTRIB,DESCR, { if (fLSBOLDNOT(SYNTAXP##V)) { fEA_RI(RtV,siV*fVECSIZE()); BEH;} else {CANCEL;}}) \ |
| 253 | EXTINSN(V6_##TAG##_npred_ppu, "if (!" #SYNTAXP "4) " SYNTAXA "(Rx32++Mu2)" NT SYNTAXB,ATTRIB,DESCR,{ if (fLSBOLDNOT(SYNTAXP##V)) { fEA_REG(RxV); BEH; fPM_M(RxV,MuV); } else {CANCEL;}}) |
| 254 | |
| 255 | #define MMVEC_COND_EACH_EA(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,SYNTAXP,BEH) \ |
| 256 | MMVEC_COND_EACH_EA_TRUE(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,SYNTAXP,BEH) \ |
| 257 | MMVEC_COND_EACH_EA_FALSE(TAG,DESCR,ATTRIB,NT,SYNTAXA,SYNTAXB,SYNTAXP,BEH) |
| 258 | |
| 259 | |
| 260 | #define VEC_SCALE(X) X*fVECSIZE() |
| 261 | |
| 262 | |
| 263 | #define MMVEC_LD(TAG,DESCR,ATTRIB,NT) MMVEC_EACH_EA(TAG,DESCR,ATTRIB,NT,"Vd32=vmem","",fLOADMMV(EA,VdV)) |
| 264 | #define MMVEC_LDC(TAG,DESCR,ATTRIB,NT) MMVEC_EACH_EA(TAG##_cur,DESCR,ATTRIB,NT,"Vd32.cur=vmem","",fLOADMMV(EA,VdV)) |
| 265 | #define MMVEC_LDT(TAG,DESCR,ATTRIB,NT) MMVEC_EACH_EA(TAG##_tmp,DESCR,ATTRIB,NT,"Vd32.tmp=vmem","",fLOADMMV(EA,VdV)) |
| 266 | #define MMVEC_LDU(TAG,DESCR,ATTRIB,NT) MMVEC_EACH_EA(TAG,DESCR,ATTRIB,NT,"Vd32=vmemu","",fLOADMMVU(EA,VdV)) |
| 267 | |
| 268 | |
| 269 | #define MMVEC_STQ(TAG,DESCR,ATTRIB,NT) \ |
| 270 | MMVEC_EACH_EA(TAG##_qpred,DESCR,ATTRIB,NT,"if (Qv4) vmem","=Vs32",fSTOREMMVQ(EA,VsV,QvV)) \ |
| 271 | MMVEC_EACH_EA(TAG##_nqpred,DESCR,ATTRIB,NT,"if (!Qv4) vmem","=Vs32",fSTOREMMVNQ(EA,VsV,QvV)) |
| 272 | |
| 273 | /**************************************************************** |
| 274 | * MAPPING FOR VMEMs |
| 275 | ****************************************************************/ |
| 276 | |
| 277 | #define ATTR_VMEM A_EXTENSION,A_CVI,A_CVI_VM |
| 278 | #define ATTR_VMEMU A_EXTENSION,A_CVI,A_CVI_VM,A_CVI_VP |
| 279 | |
| 280 | |
| 281 | MMVEC_LD(vL32b, "Aligned Vector Load", ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_VA),) |
| 282 | MMVEC_LDC(vL32b, "Aligned Vector Load Cur", ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_NEW,A_CVI_VA),) |
| 283 | MMVEC_LDT(vL32b, "Aligned Vector Load Tmp", ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_TMP),) |
| 284 | |
| 285 | MMVEC_COND_EACH_EA(vL32b,"Conditional Aligned Vector Load",ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_VA),,"Vd32=vmem",,Pv,fLOADMMV(EA,VdV);) |
| 286 | MMVEC_COND_EACH_EA(vL32b_cur,"Conditional Aligned Vector Load Cur",ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_VA,A_CVI_NEW),,"Vd32.cur=vmem",,Pv,fLOADMMV(EA,VdV);) |
| 287 | MMVEC_COND_EACH_EA(vL32b_tmp,"Conditional Aligned Vector Load Tmp",ATTRIBS(ATTR_VMEM,A_LOAD,A_CVI_TMP),,"Vd32.tmp=vmem",,Pv,fLOADMMV(EA,VdV);) |
| 288 | |
| 289 | MMVEC_EACH_EA(vS32b,"Aligned Vector Store",ATTRIBS(ATTR_VMEM,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),,"vmem","=Vs32",fSTOREMMV(EA,VsV)) |
| 290 | MMVEC_COND_EACH_EA(vS32b,"Aligned Vector Store",ATTRIBS(ATTR_VMEM,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),,"vmem","=Vs32",Pv,fSTOREMMV(EA,VsV)) |
| 291 | |
| 292 | |
| 293 | MMVEC_STQ(vS32b, "Aligned Vector Store", ATTRIBS(ATTR_VMEM,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),) |
| 294 | |
| 295 | MMVEC_LDU(vL32Ub, "Unaligned Vector Load", ATTRIBS(ATTR_VMEMU,A_LOAD,A_RESTRICT_NOSLOT1),) |
| 296 | |
| 297 | MMVEC_EACH_EA(vS32Ub,"Unaligned Vector Store",ATTRIBS(ATTR_VMEMU,A_STORE,A_RESTRICT_NOSLOT1),,"vmemu","=Vs32",fSTOREMMVU(EA,VsV)) |
| 298 | |
| 299 | MMVEC_COND_EACH_EA(vS32Ub,"Unaligned Vector Store",ATTRIBS(ATTR_VMEMU,A_STORE,A_RESTRICT_NOSLOT1),,"vmemu","=Vs32",Pv,fSTOREMMVU(EA,VsV)) |
| 300 | |
| 301 | MMVEC_EACH_EA(vS32b_new,"Aligned Vector Store New",ATTRIBS(ATTR_VMEM,A_STORE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),,"vmem","=Os8.new",fSTOREMMV(EA,fNEWVREG(OsN))) |
| 302 | |
| 303 | // V65 store release, zero byte store |
| 304 | MMVEC_EACH_EA(vS32b_srls,"Aligned Vector Scatter Release",ATTRIBS(ATTR_VMEM,A_STORE,A_CVI_SCATTER_RELEASE,A_CVI_NEW,A_RESTRICT_SLOT0ONLY),,"vmem",":scatter_release",fSTORERELEASE(EA,0)) |
| 305 | |
| 306 | |
| 307 | |
| 308 | MMVEC_COND_EACH_EA(vS32b_new,"Aligned Vector Store New",ATTRIBS(ATTR_VMEM,A_STORE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),,"vmem","=Os8.new",Pv,fSTOREMMV(EA,fNEWVREG(OsN))) |
| 309 | |
| 310 | |
| 311 | /****************************************************************************************** |
| 312 | * |
| 313 | * MMVECTOR MEMORY OPERATIONS - NON TEMPORAL |
| 314 | * |
| 315 | *******************************************************************************************/ |
| 316 | |
| 317 | #define ATTR_VMEM_NT A_EXTENSION,A_CVI,A_CVI_VM |
| 318 | |
| 319 | MMVEC_EACH_EA(vS32b_nt,"Aligned Vector Store - Non temporal",ATTRIBS(ATTR_VMEM_NT,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),":nt","vmem","=Vs32",fSTOREMMV(EA,VsV)) |
| 320 | MMVEC_COND_EACH_EA(vS32b_nt,"Aligned Vector Store - Non temporal",ATTRIBS(ATTR_VMEM_NT,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),":nt","vmem","=Vs32",Pv,fSTOREMMV(EA,VsV)) |
| 321 | |
| 322 | MMVEC_EACH_EA(vS32b_nt_new,"Aligned Vector Store New - Non temporal",ATTRIBS(ATTR_VMEM_NT,A_STORE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),":nt","vmem","=Os8.new",fSTOREMMV(EA,fNEWVREG(OsN))) |
| 323 | MMVEC_COND_EACH_EA(vS32b_nt_new,"Aligned Vector Store New - Non temporal",ATTRIBS(ATTR_VMEM_NT,A_STORE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),":nt","vmem","=Os8.new",Pv,fSTOREMMV(EA,fNEWVREG(OsN))) |
| 324 | |
| 325 | |
| 326 | MMVEC_STQ(vS32b_nt, "Aligned Vector Store - Non temporal", ATTRIBS(ATTR_VMEM_NT,A_STORE,A_RESTRICT_SLOT0ONLY,A_CVI_VA),":nt") |
| 327 | |
| 328 | MMVEC_LD(vL32b_nt, "Aligned Vector Load - Non temporal", ATTRIBS(ATTR_VMEM_NT,A_LOAD,A_CVI_VA),":nt") |
| 329 | MMVEC_LDC(vL32b_nt, "Aligned Vector Load Cur - Non temporal", ATTRIBS(ATTR_VMEM_NT,A_LOAD,A_CVI_NEW,A_CVI_VA),":nt") |
| 330 | MMVEC_LDT(vL32b_nt, "Aligned Vector Load Tmp - Non temporal", ATTRIBS(ATTR_VMEM_NT,A_LOAD,A_CVI_TMP),":nt") |
| 331 | |
| 332 | MMVEC_COND_EACH_EA(vL32b_nt,"Conditional Aligned Vector Load",ATTRIBS(ATTR_VMEM_NT,A_CVI_VA),,"Vd32=vmem",":nt",Pv,fLOADMMV(EA,VdV);) |
| 333 | MMVEC_COND_EACH_EA(vL32b_nt_cur,"Conditional Aligned Vector Load Cur",ATTRIBS(ATTR_VMEM_NT,A_CVI_VA,A_CVI_NEW),,"Vd32.cur=vmem",":nt",Pv,fLOADMMV(EA,VdV);) |
| 334 | MMVEC_COND_EACH_EA(vL32b_nt_tmp,"Conditional Aligned Vector Load Tmp",ATTRIBS(ATTR_VMEM_NT,A_CVI_TMP),,"Vd32.tmp=vmem",":nt",Pv,fLOADMMV(EA,VdV);) |
| 335 | |
| 336 | |
| 337 | #undef VEC_SCALE |
| 338 | |
| 339 | |
| 340 | /*************************************************** |
| 341 | * Vector Alignment |
| 342 | ************************************************/ |
| 343 | |
| 344 | #define VALIGNB(SHIFT) \ |
| 345 | fHIDE(int i;) \ |
| 346 | for(i = 0; i < fVBYTES(); i++) {\ |
| 347 | VdV.ub[i] = (i+SHIFT>=fVBYTES()) ? VuV.ub[i+SHIFT-fVBYTES()] : VvV.ub[i+SHIFT];\ |
| 348 | } |
| 349 | |
| 350 | EXTINSN(V6_valignb, "Vd32=valign(Vu32,Vv32,Rt8)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP),"Align Two vectors by Rt8 as control", |
| 351 | { |
| 352 | unsigned shift = RtV & (fVBYTES()-1); |
| 353 | VALIGNB(shift) |
| 354 | }) |
| 355 | EXTINSN(V6_vlalignb, "Vd32=vlalign(Vu32,Vv32,Rt8)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP),"Align Two vectors by Rt8 as control", |
| 356 | { |
| 357 | unsigned shift = fVBYTES() - (RtV & (fVBYTES()-1)); |
| 358 | VALIGNB(shift) |
| 359 | }) |
| 360 | EXTINSN(V6_valignbi, "Vd32=valign(Vu32,Vv32,#u3)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP),"Align Two vectors by #u3 as control", |
| 361 | { |
| 362 | VALIGNB(uiV) |
| 363 | }) |
| 364 | EXTINSN(V6_vlalignbi,"Vd32=vlalign(Vu32,Vv32,#u3)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP),"Align Two vectors by #u3 as control", |
| 365 | { |
| 366 | unsigned shift = fVBYTES() - uiV; |
| 367 | VALIGNB(shift) |
| 368 | }) |
| 369 | |
| 370 | EXTINSN(V6_vror, "Vd32=vror(Vu32,Rt32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), |
| 371 | "Align Two vectors by Rt32 as control", |
| 372 | { |
| 373 | fHIDE(int k;) |
| 374 | for (k=0;k<fVBYTES();k++) { |
| 375 | VdV.ub[k] = VuV.ub[(k+RtV)&(fVBYTES()-1)]; |
| 376 | } |
| 377 | }) |
| 378 | |
| 379 | |
| 380 | |
| 381 | |
| 382 | |
| 383 | |
| 384 | |
| 385 | /************************************************************** |
| 386 | * Unpack elements with zero/sign extend and cross lane permute |
| 387 | ***************************************************************/ |
| 388 | |
| 389 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(8,vunpackub, "Vdd32=vunpackub(Vu32)", "Vdd32.uh=vunpack(Vu32.ub)", "Unpack byte with zero-extend", fVARRAY_ELEMENT_ACCESS(VddV, uh, i) = fZE8_16( VuV.ub[i])) |
| 390 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(8,vunpackb, "Vdd32=vunpackb(Vu32)", "Vdd32.h=vunpack(Vu32.b)", "Unpack bytes with sign-extend", fVARRAY_ELEMENT_ACCESS(VddV, h, i) = fSE8_16( VuV.b[i] )) |
| 391 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(16,vunpackuh, "Vdd32=vunpackuh(Vu32)", "Vdd32.uw=vunpack(Vu32.uh)", "Unpack halves with zero-extend", fVARRAY_ELEMENT_ACCESS(VddV, uw, i) = fZE16_32(VuV.uh[i])) |
| 392 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(16,vunpackh, "Vdd32=vunpackh(Vu32)", "Vdd32.w=vunpack(Vu32.h)", "Unpack halves with sign-extend", fVARRAY_ELEMENT_ACCESS(VddV, w, i) = fSE16_32(VuV.h[i] )) |
| 393 | |
| 394 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(8, vunpackob, "Vxx32|=vunpackob(Vu32)", "Vxx32.h|=vunpacko(Vu32.b)", "Unpack byte to odd bytes ", fVARRAY_ELEMENT_ACCESS(VxxV, uh, i) |= fZE8_16( VuV.ub[i])<<8) |
| 395 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(16,vunpackoh, "Vxx32|=vunpackoh(Vu32)", "Vxx32.w|=vunpacko(Vu32.h)", "Unpack halves to odd halves", fVARRAY_ELEMENT_ACCESS(VxxV, uw, i) |= fZE16_32(VuV.uh[i])<<16) |
| 396 | |
| 397 | |
| 398 | /************************************************************** |
| 399 | * Pack elements and cross lane permute |
| 400 | ***************************************************************/ |
| 401 | |
| 402 | ITERATOR_INSN2_PERMUTE_SLOT(16, vpackeb, "Vd32=vpackeb(Vu32,Vv32)", "Vd32.b=vpacke(Vu32.h,Vv32.h)", |
| 403 | "Pack bytes", |
| 404 | VdV.ub[i] = fGETUBYTE(0, VvV.uh[i]); |
| 405 | VdV.ub[i+fVELEM(16)] = fGETUBYTE(0, VuV.uh[i])) |
| 406 | |
| 407 | ITERATOR_INSN2_PERMUTE_SLOT(32, vpackeh, "Vd32=vpackeh(Vu32,Vv32)", "Vd32.h=vpacke(Vu32.w,Vv32.w)", |
| 408 | "Pack halfwords", |
| 409 | VdV.uh[i] = fGETUHALF(0, VvV.uw[i]); |
| 410 | VdV.uh[i+fVELEM(32)] = fGETUHALF(0, VuV.uw[i])) |
| 411 | |
| 412 | ITERATOR_INSN2_PERMUTE_SLOT(16, vpackob, "Vd32=vpackob(Vu32,Vv32)", "Vd32.b=vpacko(Vu32.h,Vv32.h)", |
| 413 | "Pack bytes", |
| 414 | VdV.ub[i] = fGETUBYTE(1, VvV.uh[i]); |
| 415 | VdV.ub[i+fVELEM(16)] = fGETUBYTE(1, VuV.uh[i])) |
| 416 | |
| 417 | ITERATOR_INSN2_PERMUTE_SLOT(32, vpackoh, "Vd32=vpackoh(Vu32,Vv32)", "Vd32.h=vpacko(Vu32.w,Vv32.w)", |
| 418 | "Pack halfwords", |
| 419 | VdV.uh[i] = fGETUHALF(1, VvV.uw[i]); |
| 420 | VdV.uh[i+fVELEM(32)] = fGETUHALF(1, VuV.uw[i])) |
| 421 | |
| 422 | |
| 423 | |
| 424 | ITERATOR_INSN2_PERMUTE_SLOT(16, vpackhub_sat, "Vd32=vpackhub(Vu32,Vv32):sat", "Vd32.ub=vpack(Vu32.h,Vv32.h):sat", |
| 425 | "Pack ubytes with saturation", |
| 426 | VdV.ub[i] = fVSATUB(VvV.h[i]); |
| 427 | VdV.ub[i+fVELEM(16)] = fVSATUB(VuV.h[i])) |
| 428 | |
| 429 | |
| 430 | ITERATOR_INSN2_PERMUTE_SLOT(16, vpackhb_sat, "Vd32=vpackhb(Vu32,Vv32):sat", "Vd32.b=vpack(Vu32.h,Vv32.h):sat", |
| 431 | "Pack bytes with saturation", |
| 432 | VdV.b[i] = fVSATB(VvV.h[i]); |
| 433 | VdV.b[i+fVELEM(16)] = fVSATB(VuV.h[i])) |
| 434 | |
| 435 | |
| 436 | ITERATOR_INSN2_PERMUTE_SLOT(32, vpackwuh_sat, "Vd32=vpackwuh(Vu32,Vv32):sat", "Vd32.uh=vpack(Vu32.w,Vv32.w):sat", |
| 437 | "Pack ubytes with saturation", |
| 438 | VdV.uh[i] = fVSATUH(VvV.w[i]); |
| 439 | VdV.uh[i+fVELEM(32)] = fVSATUH(VuV.w[i])) |
| 440 | |
| 441 | ITERATOR_INSN2_PERMUTE_SLOT(32, vpackwh_sat, "Vd32=vpackwh(Vu32,Vv32):sat", "Vd32.h=vpack(Vu32.w,Vv32.w):sat", |
| 442 | "Pack bytes with saturation", |
| 443 | VdV.h[i] = fVSATH(VvV.w[i]); |
| 444 | VdV.h[i+fVELEM(32)] = fVSATH(VuV.w[i])) |
| 445 | |
| 446 | |
| 447 | |
| 448 | |
| 449 | |
| 450 | /************************************************************** |
| 451 | * Zero/Sign Extend with in-lane permute |
| 452 | ***************************************************************/ |
| 453 | |
| 454 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(16,vzb,"Vdd32=vzxtb(Vu32)","Vdd32.uh=vzxt(Vu32.ub)", |
| 455 | "Vector Zero Extend Bytes", |
| 456 | VddV.v[0].uh[i] = fZE8_16(fGETUBYTE(0, VuV.uh[i])); |
| 457 | VddV.v[1].uh[i] = fZE8_16(fGETUBYTE(1, VuV.uh[i]))) |
| 458 | |
| 459 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(16,vsb,"Vdd32=vsxtb(Vu32)","Vdd32.h=vsxt(Vu32.b)", |
| 460 | "Vector Sign Extend Bytes", |
| 461 | VddV.v[0].h[i] = fSE8_16(fGETBYTE(0, VuV.h[i])); |
| 462 | VddV.v[1].h[i] = fSE8_16(fGETBYTE(1, VuV.h[i]))) |
| 463 | |
| 464 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(32,vzh,"Vdd32=vzxth(Vu32)","Vdd32.uw=vzxt(Vu32.uh)", |
| 465 | "Vector Zero Extend halfwords", |
| 466 | VddV.v[0].uw[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])); |
| 467 | VddV.v[1].uw[i] = fZE16_32(fGETUHALF(1, VuV.uw[i]))) |
| 468 | |
| 469 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(32,vsh,"Vdd32=vsxth(Vu32)","Vdd32.w=vsxt(Vu32.h)", |
| 470 | "Vector Sign Extend halfwords", |
| 471 | VddV.v[0].w[i] = fSE16_32(fGETHALF(0, VuV.w[i])); |
| 472 | VddV.v[1].w[i] = fSE16_32(fGETHALF(1, VuV.w[i]))) |
| 473 | |
| 474 | |
| 475 | /********************************************************************** |
| 476 | * |
| 477 | * |
| 478 | * |
| 479 | * MMVECTOR REDUCTION |
| 480 | * |
| 481 | * |
| 482 | * |
| 483 | **********************************************************************/ |
| 484 | |
| 485 | /******************************************** |
| 486 | * 2-WAY REDUCTION - UNSIGNED BYTE BY BYTE |
| 487 | ********************************************/ |
| 488 | |
| 489 | |
| 490 | ITERATOR_INSN2_MPY_SLOT(16,vdmpybus,"Vd32=vdmpybus(Vu32,Rt32)","Vd32.h=vdmpy(Vu32.ub,Rt32.b)", |
| 491 | "Vector Dual Multiply-Accumulates unsigned bytes by bytes", |
| 492 | VdV.h[i] = fMPY8US( fGETUBYTE(0, VuV.uh[i]), fGETBYTE((2*i) % 4, RtV)); |
| 493 | VdV.h[i] += fMPY8US( fGETUBYTE(1, VuV.uh[i]), fGETBYTE((2*i+1)%4, RtV))) |
| 494 | |
| 495 | ITERATOR_INSN2_MPY_SLOT(16,vdmpybus_acc,"Vx32+=vdmpybus(Vu32,Rt32)","Vx32.h+=vdmpy(Vu32.ub,Rt32.b)", |
| 496 | "Vector Dual Multiply-Accumulates unsigned bytes by bytes, and accumulate", |
| 497 | VxV.h[i] += fMPY8US( fGETUBYTE(0, VuV.uh[i]), fGETBYTE((2*i) % 4, RtV)); |
| 498 | VxV.h[i] += fMPY8US( fGETUBYTE(1, VuV.uh[i]), fGETBYTE((2*i+1)%4, RtV))) |
| 499 | |
| 500 | |
| 501 | |
| 502 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vdmpybus_dv,"Vdd32=vdmpybus(Vuu32,Rt32)","Vdd32.h=vdmpy(Vuu32.ub,Rt32.b)", |
| 503 | "Vector Dual Multiply-Accumulates unsigned bytes by bytes, and accumulate Sliding Window Reduction", |
| 504 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0, VuuV.v[0].uh[i]),fGETBYTE((2*i) % 4, RtV)); |
| 505 | VddV.v[0].h[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]),fGETBYTE((2*i+1)%4, RtV)); |
| 506 | |
| 507 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]),fGETBYTE((2*i) % 4, RtV)); |
| 508 | VddV.v[1].h[i] += fMPY8US(fGETUBYTE(0, VuuV.v[1].uh[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 509 | |
| 510 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vdmpybus_dv_acc,"Vxx32+=vdmpybus(Vuu32,Rt32)","Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b)", |
| 511 | "Vector Dual Multiply-Accumulates unsigned bytes by bytes, and accumulate Sliding Window Reduction", |
| 512 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(0, VuuV.v[0].uh[i]),fGETBYTE((2*i) % 4, RtV)); |
| 513 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]),fGETBYTE((2*i+1)%4, RtV)); |
| 514 | |
| 515 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]),fGETBYTE((2*i) % 4, RtV)); |
| 516 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(0, VuuV.v[1].uh[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 517 | |
| 518 | |
| 519 | |
| 520 | /******************************************** |
| 521 | * 2-WAY REDUCTION - HALF BY BYTE |
| 522 | ********************************************/ |
| 523 | ITERATOR_INSN2_MPY_SLOT(32,vdmpyhb,"Vd32=vdmpyhb(Vu32,Rt32)","Vd32.w=vdmpy(Vu32.h,Rt32.b)", |
| 524 | "Dual-Vector 2-Element Half x Byte Reduction with Sliding Window Overlap", |
| 525 | VdV.w[i] = fMPY16SS(fGETHALF(0, VuV.w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 526 | VdV.w[i] += fMPY16SS(fGETHALF(1, VuV.w[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 527 | |
| 528 | ITERATOR_INSN2_MPY_SLOT(32,vdmpyhb_acc,"Vx32+=vdmpyhb(Vu32,Rt32)","Vx32.w+=vdmpy(Vu32.h,Rt32.b)", |
| 529 | "Dual-Vector 2-Element Half x Byte Reduction with Sliding Window Overlap", |
| 530 | VxV.w[i] += fMPY16SS(fGETHALF(0, VuV.w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 531 | VxV.w[i] += fMPY16SS(fGETHALF(1, VuV.w[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 532 | |
| 533 | |
| 534 | |
| 535 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhb_dv,"Vdd32=vdmpyhb(Vuu32,Rt32)","Vdd32.w=vdmpy(Vuu32.h,Rt32.b)", |
| 536 | "Dual-Vector 2-Element Half x Byte Reduction with Sliding Window Overlap", |
| 537 | VddV.v[0].w[i] = fMPY16SS(fGETHALF(0, VuuV.v[0].w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 538 | VddV.v[0].w[i] += fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]),fGETBYTE((2*i+1)%4, RtV)); |
| 539 | |
| 540 | VddV.v[1].w[i] = fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 541 | VddV.v[1].w[i] += fMPY16SS(fGETHALF(0, VuuV.v[1].w[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 542 | |
| 543 | |
| 544 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhb_dv_acc,"Vxx32+=vdmpyhb(Vuu32,Rt32)","Vxx32.w+=vdmpy(Vuu32.h,Rt32.b)", |
| 545 | "Dual-Vector 2-Element Half x Byte Reduction with Sliding Window Overlap", |
| 546 | VxxV.v[0].w[i] += fMPY16SS(fGETHALF(0, VuuV.v[0].w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 547 | VxxV.v[0].w[i] += fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]),fGETBYTE((2*i+1)%4, RtV)); |
| 548 | |
| 549 | VxxV.v[1].w[i] += fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]),fGETBYTE((2*i+0)%4, RtV)); |
| 550 | VxxV.v[1].w[i] += fMPY16SS(fGETHALF(0, VuuV.v[1].w[i]),fGETBYTE((2*i+1)%4, RtV))) |
| 551 | |
| 552 | |
| 553 | |
| 554 | |
| 555 | |
| 556 | /******************************************** |
| 557 | * 2-WAY REDUCTION - HALF BY HALF |
| 558 | ********************************************/ |
| 559 | |
| 560 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhvsat,"Vd32=vdmpyh(Vu32,Vv32):sat","Vd32.w=vdmpy(Vu32.h,Vv32.h):sat", |
| 561 | "Vector halfword multiply, accumulate pairs, sat to word", |
| 562 | fHIDE(size8s_t accum;) |
| 563 | accum = fMPY16SS(fGETHALF(0,VuV.w[i]),fGETHALF(0, VvV.w[i])); |
| 564 | accum += fMPY16SS(fGETHALF(1,VuV.w[i]),fGETHALF(1, VvV.w[i])); |
| 565 | VdV.w[i] = fVSATW(accum)) |
| 566 | |
| 567 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhvsat_acc,"Vx32+=vdmpyh(Vu32,Vv32):sat","Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat", |
| 568 | "Vector halfword multiply, accumulate pairs, sat to word", |
| 569 | fHIDE(size8s_t accum;) |
| 570 | accum = fMPY16SS(fGETHALF(0,VuV.w[i]),fGETHALF(0, VvV.w[i])); |
| 571 | accum += fMPY16SS(fGETHALF(1,VuV.w[i]),fGETHALF(1, VvV.w[i])); |
| 572 | VxV.w[i] = fVSATW(VxV.w[i]+accum)) |
| 573 | |
| 574 | |
| 575 | /* VDMPYH */ |
| 576 | |
| 577 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsat,"Vd32=vdmpyh(Vu32,Rt32):sat","Vd32.w=vdmpy(Vu32.h,Rt32.h):sat", |
| 578 | "Vector halfword multiply, accumulate pairs, saturate to word", |
| 579 | fHIDE(size8s_t accum;) |
| 580 | accum = fMPY16SS(fGETHALF(0, VuV.w[i]),fGETHALF(0, RtV)); |
| 581 | accum += fMPY16SS(fGETHALF(1, VuV.w[i]),fGETHALF(1, RtV)); |
| 582 | VdV.w[i] = fVSATW(accum)) |
| 583 | |
| 584 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsat_acc,"Vx32+=vdmpyh(Vu32,Rt32):sat","Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat", |
| 585 | "Vector halfword multiply, accumulate pairs, saturate to word", |
| 586 | fHIDE(size8s_t) accum = VxV.w[i]; |
| 587 | accum += fMPY16SS(fGETHALF(0, VuV.w[i]),fGETHALF(0, RtV)); |
| 588 | accum += fMPY16SS(fGETHALF(1, VuV.w[i]),fGETHALF(1, RtV)); |
| 589 | VxV.w[i] = fVSATW(accum)) |
| 590 | |
| 591 | |
| 592 | |
| 593 | |
| 594 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhisat,"Vd32=vdmpyh(Vuu32,Rt32):sat","Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat", |
| 595 | "Dual Vector Signed Halfword by Signed Halfword 2-Way Reduction to Halfword with saturation", |
| 596 | fHIDE(size8s_t accum;) |
| 597 | accum = fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]),fGETHALF(0,RtV)); |
| 598 | accum += fMPY16SS(fGETHALF(0,VuuV.v[1].w[i]),fGETHALF(1,RtV)); |
| 599 | VdV.w[i] = fVSATW(accum)) |
| 600 | |
| 601 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhisat_acc,"Vx32+=vdmpyh(Vuu32,Rt32):sat","Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat", |
| 602 | "Dual Vector Signed Halfword by Signed Halfword 2-Way Reduction to Halfword with accumulation and saturation", |
| 603 | fHIDE(size8s_t) accum = VxV.w[i]; |
| 604 | accum += fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]),fGETHALF(0,RtV)); |
| 605 | accum += fMPY16SS(fGETHALF(0,VuuV.v[1].w[i]),fGETHALF(1,RtV)); |
| 606 | VxV.w[i] = fVSATW(accum)) |
| 607 | |
| 608 | |
| 609 | |
| 610 | |
| 611 | |
| 612 | |
| 613 | |
| 614 | /* VDMPYHSU */ |
| 615 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsusat,"Vd32=vdmpyhsu(Vu32,Rt32):sat","Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat", |
| 616 | "Vector halfword multiply, accumulate pairs, saturate to word", |
| 617 | fHIDE(size8s_t accum;) |
| 618 | accum = fMPY16SU(fGETHALF(0, VuV.w[i]),fGETUHALF(0, RtV)); |
| 619 | accum += fMPY16SU(fGETHALF(1, VuV.w[i]),fGETUHALF(1, RtV)); |
| 620 | VdV.w[i] = fVSATW(accum)) |
| 621 | |
| 622 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsusat_acc,"Vx32+=vdmpyhsu(Vu32,Rt32):sat","Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat", |
| 623 | "Vector halfword multiply, accumulate pairs, saturate to word", |
| 624 | fHIDE(size8s_t) accum=VxV.w[i]; |
| 625 | accum += fMPY16SU(fGETHALF(0, VuV.w[i]),fGETUHALF(0, RtV)); |
| 626 | accum += fMPY16SU(fGETHALF(1, VuV.w[i]),fGETUHALF(1, RtV)); |
| 627 | VxV.w[i] = fVSATW(accum)) |
| 628 | |
| 629 | |
| 630 | |
| 631 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsuisat,"Vd32=vdmpyhsu(Vuu32,Rt32,#1):sat","Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat", |
| 632 | "Dual Vector Signed Halfword by Signed Halfword 2-Way Reduction to Halfword with saturation", |
| 633 | fHIDE(size8s_t accum;) |
| 634 | accum = fMPY16SU(fGETHALF(1,VuuV.v[0].w[i]),fGETUHALF(0,RtV)); |
| 635 | accum += fMPY16SU(fGETHALF(0,VuuV.v[1].w[i]),fGETUHALF(1,RtV)); |
| 636 | VdV.w[i] = fVSATW(accum)) |
| 637 | |
| 638 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdmpyhsuisat_acc,"Vx32+=vdmpyhsu(Vuu32,Rt32,#1):sat","Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat", |
| 639 | "Dual Vector Signed Halfword by Signed Halfword 2-Way Reduction to Halfword with accumulation and saturation", |
| 640 | fHIDE(size8s_t) accum=VxV.w[i]; |
| 641 | accum += fMPY16SU(fGETHALF(1, VuuV.v[0].w[i]),fGETUHALF(0,RtV)); |
| 642 | accum += fMPY16SU(fGETHALF(0, VuuV.v[1].w[i]),fGETUHALF(1,RtV)); |
| 643 | VxV.w[i] = fVSATW(accum)) |
| 644 | |
| 645 | |
| 646 | |
| 647 | /******************************************** |
| 648 | * 3-WAY REDUCTION - UNSIGNED BYTE BY BYTE |
| 649 | ********************************************/ |
| 650 | |
| 651 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vtmpyb, "Vdd32=vtmpyb(Vuu32,Rt32)", "Vdd32.h=vtmpy(Vuu32.b,Rt32.b)", |
| 652 | "Dual Vector 3x1 Reduction", |
| 653 | VddV.v[0].h[i] = fMPY8SS(fGETBYTE(0,VuuV.v[0].h[i]), fGETBYTE((2*i )%4, RtV)); |
| 654 | VddV.v[0].h[i] += fMPY8SS(fGETBYTE(1,VuuV.v[0].h[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 655 | VddV.v[0].h[i] += fGETBYTE(0,VuuV.v[1].h[i]); |
| 656 | |
| 657 | VddV.v[1].h[i] = fMPY8SS(fGETBYTE(1,VuuV.v[0].h[i]), fGETBYTE((2*i )%4, RtV)); |
| 658 | VddV.v[1].h[i] += fMPY8SS(fGETBYTE(0,VuuV.v[1].h[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 659 | VddV.v[1].h[i] += fGETBYTE(1,VuuV.v[1].h[i])) |
| 660 | |
| 661 | |
| 662 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vtmpyb_acc, "Vxx32+=vtmpyb(Vuu32,Rt32)", "Vxx32.h+=vtmpy(Vuu32.b,Rt32.b)", |
| 663 | "Dual Vector 3x1 Reduction", |
| 664 | VxxV.v[0].h[i] += fMPY8SS(fGETBYTE(0,VuuV.v[0].h[i]), fGETBYTE((2*i )%4, RtV)); |
| 665 | VxxV.v[0].h[i] += fMPY8SS(fGETBYTE(1,VuuV.v[0].h[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 666 | VxxV.v[0].h[i] += fGETBYTE(0,VuuV.v[1].h[i]); |
| 667 | |
| 668 | VxxV.v[1].h[i] += fMPY8SS(fGETBYTE(1,VuuV.v[0].h[i]), fGETBYTE((2*i )%4, RtV)); |
| 669 | VxxV.v[1].h[i] += fMPY8SS(fGETBYTE(0,VuuV.v[1].h[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 670 | VxxV.v[1].h[i] += fGETBYTE(1,VuuV.v[1].h[i])) |
| 671 | |
| 672 | |
| 673 | |
| 674 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vtmpybus, "Vdd32=vtmpybus(Vuu32,Rt32)", "Vdd32.h=vtmpy(Vuu32.ub,Rt32.b)", |
| 675 | "Dual Vector 3x1 Reduction", |
| 676 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0,VuuV.v[0].uh[i]), fGETBYTE((2*i )%4, RtV)); |
| 677 | VddV.v[0].h[i] += fMPY8US(fGETUBYTE(1,VuuV.v[0].uh[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 678 | VddV.v[0].h[i] += fGETUBYTE(0,VuuV.v[1].uh[i]); |
| 679 | |
| 680 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1,VuuV.v[0].uh[i]), fGETBYTE((2*i )%4, RtV)); |
| 681 | VddV.v[1].h[i] += fMPY8US(fGETUBYTE(0,VuuV.v[1].uh[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 682 | VddV.v[1].h[i] += fGETUBYTE(1,VuuV.v[1].uh[i])) |
| 683 | |
| 684 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vtmpybus_acc, "Vxx32+=vtmpybus(Vuu32,Rt32)", "Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b)", |
| 685 | "Dual Vector 3x1 Reduction", |
| 686 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(0,VuuV.v[0].uh[i]), fGETBYTE((2*i )%4, RtV)); |
| 687 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(1,VuuV.v[0].uh[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 688 | VxxV.v[0].h[i] += fGETUBYTE(0,VuuV.v[1].uh[i]); |
| 689 | |
| 690 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(1,VuuV.v[0].uh[i]), fGETBYTE((2*i )%4, RtV)); |
| 691 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(0,VuuV.v[1].uh[i]), fGETBYTE((2*i+1)%4, RtV)); |
| 692 | VxxV.v[1].h[i] += fGETUBYTE(1,VuuV.v[1].uh[i])) |
| 693 | |
| 694 | |
| 695 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vtmpyhb, "Vdd32=vtmpyhb(Vuu32,Rt32)", "Vdd32.w=vtmpy(Vuu32.h,Rt32.b)", |
| 696 | "Dual Vector 3x1 Reduction", |
| 697 | VddV.v[0].w[i] = fMPY16SS(fGETHALF(0,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+0)%4, RtV))); |
| 698 | VddV.v[0].w[i]+= fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+1)%4, RtV))); |
| 699 | VddV.v[0].w[i]+= fGETHALF(0,VuuV.v[1].w[i]); |
| 700 | |
| 701 | VddV.v[1].w[i] = fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+0)%4, RtV))); |
| 702 | VddV.v[1].w[i]+= fMPY16SS(fGETHALF(0,VuuV.v[1].w[i]), fSE8_16(fGETBYTE((2*i+1)%4, RtV))); |
| 703 | VddV.v[1].w[i]+= fGETHALF(1,VuuV.v[1].w[i])) |
| 704 | |
| 705 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vtmpyhb_acc, "Vxx32+=vtmpyhb(Vuu32,Rt32)", "Vxx32.w+=vtmpy(Vuu32.h,Rt32.b)", |
| 706 | "Dual Vector 3x1 Reduction", |
| 707 | VxxV.v[0].w[i]+= fMPY16SS(fGETHALF(0,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+0)%4, RtV))); |
| 708 | VxxV.v[0].w[i]+= fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+1)%4, RtV))); |
| 709 | VxxV.v[0].w[i]+= fGETHALF(0,VuuV.v[1].w[i]); |
| 710 | |
| 711 | VxxV.v[1].w[i]+= fMPY16SS(fGETHALF(1,VuuV.v[0].w[i]), fSE8_16(fGETBYTE((2*i+0)%4, RtV))); |
| 712 | VxxV.v[1].w[i]+= fMPY16SS(fGETHALF(0,VuuV.v[1].w[i]), fSE8_16(fGETBYTE((2*i+1)%4, RtV))); |
| 713 | VxxV.v[1].w[i]+= fGETHALF(1,VuuV.v[1].w[i])) |
| 714 | |
| 715 | |
| 716 | /******************************************** |
| 717 | * 4-WAY REDUCTION - UNSIGNED BYTE BY UNSIGNED BYTE |
| 718 | ********************************************/ |
| 719 | |
| 720 | |
| 721 | |
| 722 | ITERATOR_INSN2_MPY_SLOT(32,vrmpyub,"Vd32=vrmpyub(Vu32,Rt32)","Vd32.uw=vrmpy(Vu32.ub,Rt32.ub)", |
| 723 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 724 | VdV.uw[i] = fMPY8UU(fGETUBYTE(0,VuV.uw[i]), fGETUBYTE(0,RtV)); |
| 725 | VdV.uw[i] += fMPY8UU(fGETUBYTE(1,VuV.uw[i]), fGETUBYTE(1,RtV)); |
| 726 | VdV.uw[i] += fMPY8UU(fGETUBYTE(2,VuV.uw[i]), fGETUBYTE(2,RtV)); |
| 727 | VdV.uw[i] += fMPY8UU(fGETUBYTE(3,VuV.uw[i]), fGETUBYTE(3,RtV))) |
| 728 | |
| 729 | ITERATOR_INSN2_MPY_SLOT(32,vrmpyub_acc,"Vx32+=vrmpyub(Vu32,Rt32)","Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub)", |
| 730 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients Accumulate", |
| 731 | VxV.uw[i] += fMPY8UU(fGETUBYTE(0,VuV.uw[i]), fGETUBYTE(0,RtV)); |
| 732 | VxV.uw[i] += fMPY8UU(fGETUBYTE(1,VuV.uw[i]), fGETUBYTE(1,RtV)); |
| 733 | VxV.uw[i] += fMPY8UU(fGETUBYTE(2,VuV.uw[i]), fGETUBYTE(2,RtV)); |
| 734 | VxV.uw[i] += fMPY8UU(fGETUBYTE(3,VuV.uw[i]), fGETUBYTE(3,RtV))) |
| 735 | |
| 736 | |
| 737 | ITERATOR_INSN2_MPY_SLOT(32,vrmpyubv,"Vd32=vrmpyub(Vu32,Vv32)","Vd32.uw=vrmpy(Vu32.ub,Vv32.ub)", |
| 738 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 739 | VdV.uw[i] = fMPY8UU(fGETUBYTE(0,VuV.uw[i]), fGETUBYTE(0,VvV.uw[i])); |
| 740 | VdV.uw[i] += fMPY8UU(fGETUBYTE(1,VuV.uw[i]), fGETUBYTE(1,VvV.uw[i])); |
| 741 | VdV.uw[i] += fMPY8UU(fGETUBYTE(2,VuV.uw[i]), fGETUBYTE(2,VvV.uw[i])); |
| 742 | VdV.uw[i] += fMPY8UU(fGETUBYTE(3,VuV.uw[i]), fGETUBYTE(3,VvV.uw[i]))) |
| 743 | |
| 744 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpyubv_acc,"Vx32+=vrmpyub(Vu32,Vv32)","Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub)", |
| 745 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients Accumulate", |
| 746 | VxV.uw[i] += fMPY8UU(fGETUBYTE(0,VuV.uw[i]), fGETUBYTE(0,VvV.uw[i])); |
| 747 | VxV.uw[i] += fMPY8UU(fGETUBYTE(1,VuV.uw[i]), fGETUBYTE(1,VvV.uw[i])); |
| 748 | VxV.uw[i] += fMPY8UU(fGETUBYTE(2,VuV.uw[i]), fGETUBYTE(2,VvV.uw[i])); |
| 749 | VxV.uw[i] += fMPY8UU(fGETUBYTE(3,VuV.uw[i]), fGETUBYTE(3,VvV.uw[i]))) |
| 750 | |
| 751 | ITERATOR_INSN2_MPY_SLOT(32,vrmpybv,"Vd32=vrmpyb(Vu32,Vv32)","Vd32.w=vrmpy(Vu32.b,Vv32.b)", |
| 752 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 753 | VdV.w[i] = fMPY8SS(fGETBYTE(0, VuV.w[i]), fGETBYTE(0, VvV.w[i])); |
| 754 | VdV.w[i] += fMPY8SS(fGETBYTE(1, VuV.w[i]), fGETBYTE(1, VvV.w[i])); |
| 755 | VdV.w[i] += fMPY8SS(fGETBYTE(2, VuV.w[i]), fGETBYTE(2, VvV.w[i])); |
| 756 | VdV.w[i] += fMPY8SS(fGETBYTE(3, VuV.w[i]), fGETBYTE(3, VvV.w[i]))) |
| 757 | |
| 758 | |
| 759 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpybv_acc,"Vx32+=vrmpyb(Vu32,Vv32)","Vx32.w+=vrmpy(Vu32.b,Vv32.b)", |
| 760 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 761 | VxV.w[i] += fMPY8SS(fGETBYTE(0, VuV.w[i]), fGETBYTE(0, VvV.w[i])); |
| 762 | VxV.w[i] += fMPY8SS(fGETBYTE(1, VuV.w[i]), fGETBYTE(1, VvV.w[i])); |
| 763 | VxV.w[i] += fMPY8SS(fGETBYTE(2, VuV.w[i]), fGETBYTE(2, VvV.w[i])); |
| 764 | VxV.w[i] += fMPY8SS(fGETBYTE(3, VuV.w[i]), fGETBYTE(3, VvV.w[i]))) |
| 765 | |
| 766 | |
| 767 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpyubi,"Vdd32=vrmpyub(Vuu32,Rt32,#u1)","Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1)", |
| 768 | "Dual Vector Unsigned Byte By Signed Byte 4-way Reduction to Word", |
| 769 | VddV.v[0].uw[i] = fMPY8UU(fGETUBYTE(0, VuuV.v[uiV ? 1:0].uw[i]),fGETUBYTE((0-uiV) & 0x3,RtV)); |
| 770 | VddV.v[0].uw[i] += fMPY8UU(fGETUBYTE(1, VuuV.v[0 ].uw[i]),fGETUBYTE((1-uiV) & 0x3,RtV)); |
| 771 | VddV.v[0].uw[i] += fMPY8UU(fGETUBYTE(2, VuuV.v[0 ].uw[i]),fGETUBYTE((2-uiV) & 0x3,RtV)); |
| 772 | VddV.v[0].uw[i] += fMPY8UU(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETUBYTE((3-uiV) & 0x3,RtV)); |
| 773 | |
| 774 | VddV.v[1].uw[i] = fMPY8UU(fGETUBYTE(0, VuuV.v[1 ].uw[i]),fGETUBYTE((2-uiV) & 0x3,RtV)); |
| 775 | VddV.v[1].uw[i] += fMPY8UU(fGETUBYTE(1, VuuV.v[1 ].uw[i]),fGETUBYTE((3-uiV) & 0x3,RtV)); |
| 776 | VddV.v[1].uw[i] += fMPY8UU(fGETUBYTE(2, VuuV.v[uiV ? 1:0].uw[i]),fGETUBYTE((0-uiV) & 0x3,RtV)); |
| 777 | VddV.v[1].uw[i] += fMPY8UU(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETUBYTE((1-uiV) & 0x3,RtV))) |
| 778 | |
| 779 | |
| 780 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpyubi_acc,"Vxx32+=vrmpyub(Vuu32,Rt32,#u1)","Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1)", |
| 781 | "Dual Vector Unsigned Byte By Signed Byte 4-way Reduction with accumulate and saturation to Word", |
| 782 | VxxV.v[0].uw[i] += fMPY8UU(fGETUBYTE(0, VuuV.v[uiV ? 1:0].uw[i]),fGETUBYTE((0-uiV) & 0x3,RtV)); |
| 783 | VxxV.v[0].uw[i] += fMPY8UU(fGETUBYTE(1, VuuV.v[0 ].uw[i]),fGETUBYTE((1-uiV) & 0x3,RtV)); |
| 784 | VxxV.v[0].uw[i] += fMPY8UU(fGETUBYTE(2, VuuV.v[0 ].uw[i]),fGETUBYTE((2-uiV) & 0x3,RtV)); |
| 785 | VxxV.v[0].uw[i] += fMPY8UU(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETUBYTE((3-uiV) & 0x3,RtV)); |
| 786 | |
| 787 | VxxV.v[1].uw[i] += fMPY8UU(fGETUBYTE(0, VuuV.v[1 ].uw[i]),fGETUBYTE((2-uiV) & 0x3,RtV)); |
| 788 | VxxV.v[1].uw[i] += fMPY8UU(fGETUBYTE(1, VuuV.v[1 ].uw[i]),fGETUBYTE((3-uiV) & 0x3,RtV)); |
| 789 | VxxV.v[1].uw[i] += fMPY8UU(fGETUBYTE(2, VuuV.v[uiV ? 1:0].uw[i]),fGETUBYTE((0-uiV) & 0x3,RtV)); |
| 790 | VxxV.v[1].uw[i] += fMPY8UU(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETUBYTE((1-uiV) & 0x3,RtV))) |
| 791 | |
| 792 | |
| 793 | |
| 794 | |
| 795 | /******************************************** |
| 796 | * 4-WAY REDUCTION - UNSIGNED BYTE BY BYTE |
| 797 | ********************************************/ |
| 798 | |
| 799 | ITERATOR_INSN2_MPY_SLOT(32,vrmpybus,"Vd32=vrmpybus(Vu32,Rt32)","Vd32.w=vrmpy(Vu32.ub,Rt32.b)", |
| 800 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 801 | VdV.w[i] = fMPY8US(fGETUBYTE(0,VuV.uw[i]), fGETBYTE(0,RtV)); |
| 802 | VdV.w[i] += fMPY8US(fGETUBYTE(1,VuV.uw[i]), fGETBYTE(1,RtV)); |
| 803 | VdV.w[i] += fMPY8US(fGETUBYTE(2,VuV.uw[i]), fGETBYTE(2,RtV)); |
| 804 | VdV.w[i] += fMPY8US(fGETUBYTE(3,VuV.uw[i]), fGETBYTE(3,RtV))) |
| 805 | |
| 806 | |
| 807 | ITERATOR_INSN2_MPY_SLOT(32,vrmpybus_acc,"Vx32+=vrmpybus(Vu32,Rt32)","Vx32.w+=vrmpy(Vu32.ub,Rt32.b)", |
| 808 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 809 | VxV.w[i] += fMPY8US(fGETUBYTE(0,VuV.uw[i]), fGETBYTE(0,RtV)); |
| 810 | VxV.w[i] += fMPY8US(fGETUBYTE(1,VuV.uw[i]), fGETBYTE(1,RtV)); |
| 811 | VxV.w[i] += fMPY8US(fGETUBYTE(2,VuV.uw[i]), fGETBYTE(2,RtV)); |
| 812 | VxV.w[i] += fMPY8US(fGETUBYTE(3,VuV.uw[i]), fGETBYTE(3,RtV))) |
| 813 | |
| 814 | |
| 815 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpybusi,"Vdd32=vrmpybus(Vuu32,Rt32,#u1)","Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1)", |
| 816 | "Dual Vector Unsigned Byte By Signed Byte 4-way Reduction to Word", |
| 817 | VddV.v[0].w[i] = fMPY8US(fGETUBYTE(0, VuuV.v[uiV ? 1:0].uw[i]),fGETBYTE((0-uiV) & 0x3,RtV)); |
| 818 | VddV.v[0].w[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0 ].uw[i]),fGETBYTE((1-uiV) & 0x3,RtV)); |
| 819 | VddV.v[0].w[i] += fMPY8US(fGETUBYTE(2, VuuV.v[0 ].uw[i]),fGETBYTE((2-uiV) & 0x3,RtV)); |
| 820 | VddV.v[0].w[i] += fMPY8US(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETBYTE((3-uiV) & 0x3,RtV)); |
| 821 | |
| 822 | VddV.v[1].w[i] = fMPY8US(fGETUBYTE(0, VuuV.v[1 ].uw[i]),fGETBYTE((2-uiV) & 0x3,RtV)); |
| 823 | VddV.v[1].w[i] += fMPY8US(fGETUBYTE(1, VuuV.v[1 ].uw[i]),fGETBYTE((3-uiV) & 0x3,RtV)); |
| 824 | VddV.v[1].w[i] += fMPY8US(fGETUBYTE(2, VuuV.v[uiV ? 1:0].uw[i]),fGETBYTE((0-uiV) & 0x3,RtV)); |
| 825 | VddV.v[1].w[i] += fMPY8US(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETBYTE((1-uiV) & 0x3,RtV))) |
| 826 | |
| 827 | |
| 828 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpybusi_acc,"Vxx32+=vrmpybus(Vuu32,Rt32,#u1)","Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1)", |
| 829 | "Dual Vector Unsigned Byte By Signed Byte 4-way Reduction with accumulate and saturation to Word", |
| 830 | VxxV.v[0].w[i] += fMPY8US(fGETUBYTE(0, VuuV.v[uiV ? 1:0].uw[i]),fGETBYTE((0-uiV) & 0x3,RtV)); |
| 831 | VxxV.v[0].w[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0 ].uw[i]),fGETBYTE((1-uiV) & 0x3,RtV)); |
| 832 | VxxV.v[0].w[i] += fMPY8US(fGETUBYTE(2, VuuV.v[0 ].uw[i]),fGETBYTE((2-uiV) & 0x3,RtV)); |
| 833 | VxxV.v[0].w[i] += fMPY8US(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETBYTE((3-uiV) & 0x3,RtV)); |
| 834 | |
| 835 | VxxV.v[1].w[i] += fMPY8US(fGETUBYTE(0, VuuV.v[1 ].uw[i]),fGETBYTE((2-uiV) & 0x3,RtV)); |
| 836 | VxxV.v[1].w[i] += fMPY8US(fGETUBYTE(1, VuuV.v[1 ].uw[i]),fGETBYTE((3-uiV) & 0x3,RtV)); |
| 837 | VxxV.v[1].w[i] += fMPY8US(fGETUBYTE(2, VuuV.v[uiV ? 1:0].uw[i]),fGETBYTE((0-uiV) & 0x3,RtV)); |
| 838 | VxxV.v[1].w[i] += fMPY8US(fGETUBYTE(3, VuuV.v[0 ].uw[i]),fGETBYTE((1-uiV) & 0x3,RtV))) |
| 839 | |
| 840 | |
| 841 | |
| 842 | |
| 843 | ITERATOR_INSN2_MPY_SLOT(32,vrmpybusv,"Vd32=vrmpybus(Vu32,Vv32)","Vd32.w=vrmpy(Vu32.ub,Vv32.b)", |
| 844 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 845 | VdV.w[i] = fMPY8US(fGETUBYTE(0,VuV.uw[i]), fGETBYTE(0,VvV.w[i])); |
| 846 | VdV.w[i] += fMPY8US(fGETUBYTE(1,VuV.uw[i]), fGETBYTE(1,VvV.w[i])); |
| 847 | VdV.w[i] += fMPY8US(fGETUBYTE(2,VuV.uw[i]), fGETBYTE(2,VvV.w[i])); |
| 848 | VdV.w[i] += fMPY8US(fGETUBYTE(3,VuV.uw[i]), fGETBYTE(3,VvV.w[i]))) |
| 849 | |
| 850 | |
| 851 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrmpybusv_acc,"Vx32+=vrmpybus(Vu32,Vv32)","Vx32.w+=vrmpy(Vu32.ub,Vv32.b)", |
| 852 | "Vector Multiply-Accumulate Reduce with 4 byte coefficients", |
| 853 | VxV.w[i] += fMPY8US(fGETUBYTE(0,VuV.uw[i]), fGETBYTE(0,VvV.w[i])); |
| 854 | VxV.w[i] += fMPY8US(fGETUBYTE(1,VuV.uw[i]), fGETBYTE(1,VvV.w[i])); |
| 855 | VxV.w[i] += fMPY8US(fGETUBYTE(2,VuV.uw[i]), fGETBYTE(2,VvV.w[i])); |
| 856 | VxV.w[i] += fMPY8US(fGETUBYTE(3,VuV.uw[i]), fGETBYTE(3,VvV.w[i]))) |
| 857 | |
| 858 | |
| 859 | |
| 860 | |
| 861 | |
| 862 | |
| 863 | |
| 864 | |
| 865 | |
| 866 | |
| 867 | |
| 868 | /******************************************** |
| 869 | * 2-WAY REDUCTION - SAD |
| 870 | ********************************************/ |
| 871 | |
| 872 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdsaduh,"Vdd32=vdsaduh(Vuu32,Rt32)","Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh)", |
| 873 | "Dual Vector Halfword by Byte 4-Way Reduction to Word", |
| 874 | VddV.v[0].uw[i] = fABS(fGETUHALF(0, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV)); |
| 875 | VddV.v[0].uw[i] += fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(1,RtV)); |
| 876 | VddV.v[1].uw[i] = fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV)); |
| 877 | VddV.v[1].uw[i] += fABS(fGETUHALF(0, VuuV.v[1].uw[i]) - fGETUHALF(1,RtV))) |
| 878 | |
| 879 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vdsaduh_acc,"Vxx32+=vdsaduh(Vuu32,Rt32)","Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh)", |
| 880 | "Dual Vector Halfword by Byte 4-Way Reduction to Word", |
| 881 | VxxV.v[0].uw[i] += fABS(fGETUHALF(0, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV)); |
| 882 | VxxV.v[0].uw[i] += fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(1,RtV)); |
| 883 | VxxV.v[1].uw[i] += fABS(fGETUHALF(1, VuuV.v[0].uw[i]) - fGETUHALF(0,RtV)); |
| 884 | VxxV.v[1].uw[i] += fABS(fGETUHALF(0, VuuV.v[1].uw[i]) - fGETUHALF(1,RtV))) |
| 885 | |
| 886 | |
| 887 | |
| 888 | |
| 889 | /******************************************** |
| 890 | * 4-WAY REDUCTION - SAD |
| 891 | ********************************************/ |
| 892 | |
| 893 | |
| 894 | |
| 895 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrsadubi,"Vdd32=vrsadub(Vuu32,Rt32,#u1)","Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1)", |
| 896 | "Dual Vector Halfword by Byte 4-Way Reduction to Word", |
| 897 | VddV.v[0].uw[i] = fABS(fZE8_16(fGETUBYTE(0, VuuV.v[uiV?1:0].uw[i])) - fZE8_16(fGETUBYTE((0-uiV)&3,RtV))); |
| 898 | VddV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(1, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((1-uiV)&3,RtV))); |
| 899 | VddV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(2, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((2-uiV)&3,RtV))); |
| 900 | VddV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(3, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((3-uiV)&3,RtV))); |
| 901 | |
| 902 | VddV.v[1].uw[i] = fABS(fZE8_16(fGETUBYTE(0, VuuV.v[1 ].uw[i])) - fZE8_16(fGETUBYTE((2-uiV)&3,RtV))); |
| 903 | VddV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(1, VuuV.v[1 ].uw[i])) - fZE8_16(fGETUBYTE((3-uiV)&3,RtV))); |
| 904 | VddV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(2, VuuV.v[uiV?1:0].uw[i])) - fZE8_16(fGETUBYTE((0-uiV)&3,RtV))); |
| 905 | VddV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(3, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((1-uiV)&3,RtV)))) |
| 906 | |
| 907 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vrsadubi_acc,"Vxx32+=vrsadub(Vuu32,Rt32,#u1)","Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1)", |
| 908 | "Dual Vector Halfword by Byte 4-Way Reduction to Word", |
| 909 | VxxV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(0, VuuV.v[uiV?1:0].uw[i])) - fZE8_16(fGETUBYTE((0-uiV)&3,RtV))); |
| 910 | VxxV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(1, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((1-uiV)&3,RtV))); |
| 911 | VxxV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(2, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((2-uiV)&3,RtV))); |
| 912 | VxxV.v[0].uw[i] += fABS(fZE8_16(fGETUBYTE(3, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((3-uiV)&3,RtV))); |
| 913 | |
| 914 | VxxV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(0, VuuV.v[1 ].uw[i])) - fZE8_16(fGETUBYTE((2-uiV)&3,RtV))); |
| 915 | VxxV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(1, VuuV.v[1 ].uw[i])) - fZE8_16(fGETUBYTE((3-uiV)&3,RtV))); |
| 916 | VxxV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(2, VuuV.v[uiV?1:0].uw[i])) - fZE8_16(fGETUBYTE((0-uiV)&3,RtV))); |
| 917 | VxxV.v[1].uw[i] += fABS(fZE8_16(fGETUBYTE(3, VuuV.v[0 ].uw[i])) - fZE8_16(fGETUBYTE((1-uiV)&3,RtV)))) |
| 918 | |
| 919 | |
| 920 | |
| 921 | |
| 922 | |
| 923 | |
| 924 | |
| 925 | |
| 926 | |
| 927 | |
| 928 | /********************************************************************* |
| 929 | * MMVECTOR SHIFTING |
| 930 | * ******************************************************************/ |
| 931 | // Macro to shift arithmetically left/right and by either RT or Vv |
| 932 | |
| 933 | #define V_SHIFT(TYPE, DESC, SIZE, LOGSIZE, CASTTYPE) \ |
| 934 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vasr##TYPE, "Vd32=vasr" #TYPE "(Vu32,Rt32)","Vd32."#TYPE"=vasr(Vu32."#TYPE",Rt32)", "Vector arithmetic shift right " DESC, VdV.TYPE[i] = (VuV.TYPE[i] >> (RtV & (SIZE-1)))) \ |
| 935 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vasl##TYPE, "Vd32=vasl" #TYPE "(Vu32,Rt32)","Vd32."#TYPE"=vasl(Vu32."#TYPE",Rt32)", "Vector arithmetic shift left " DESC, VdV.TYPE[i] = (VuV.TYPE[i] << (RtV & (SIZE-1)))) \ |
| 936 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vlsr##TYPE, "Vd32=vlsr" #TYPE "(Vu32,Rt32)","Vd32.u"#TYPE"=vlsr(Vu32.u"#TYPE",Rt32)", "Vector logical shift right " DESC, VdV.u##TYPE[i] = (VuV.u##TYPE[i] >> (RtV & (SIZE-1)))) \ |
| 937 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vasr##TYPE##v,"Vd32=vasr" #TYPE "(Vu32,Vv32)","Vd32."#TYPE"=vasr(Vu32."#TYPE",Vv32."#TYPE")", "Vector arithmetic shift right " DESC, VdV.TYPE[i] = fBIDIR_ASHIFTR(VuV.TYPE[i], fSXTN((LOGSIZE+1),SIZE,VvV.TYPE[i]),CASTTYPE)) \ |
| 938 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vasl##TYPE##v,"Vd32=vasl" #TYPE "(Vu32,Vv32)","Vd32."#TYPE"=vasl(Vu32."#TYPE",Vv32."#TYPE")", "Vector arithmetic shift left " DESC, VdV.TYPE[i] = fBIDIR_ASHIFTL(VuV.TYPE[i], fSXTN((LOGSIZE+1),SIZE,VvV.TYPE[i]),CASTTYPE)) \ |
| 939 | ITERATOR_INSN2_SHIFT_SLOT(SIZE,vlsr##TYPE##v,"Vd32=vlsr" #TYPE "(Vu32,Vv32)","Vd32."#TYPE"=vlsr(Vu32."#TYPE",Vv32."#TYPE")", "Vector logical shift right " DESC, VdV.u##TYPE[i] = fBIDIR_LSHIFTR(VuV.u##TYPE[i], fSXTN((LOGSIZE+1),SIZE,VvV.TYPE[i]),CASTTYPE)) \ |
| 940 | |
| 941 | V_SHIFT(w, "word", 32,5,4_4) |
| 942 | V_SHIFT(h, "halfword", 16,4,2_2) |
| 943 | |
| 944 | ITERATOR_INSN_SHIFT_SLOT(8,vlsrb,"Vd32.ub=vlsr(Vu32.ub,Rt32)","vec log shift right bytes", VdV.b[i] = VuV.ub[i] >> (RtV & 0x7)) |
| 945 | |
| 946 | ITERATOR_INSN2_SHIFT_SLOT(32,vrotr,"Vd32=vrotr(Vu32,Vv32)","Vd32.uw=vrotr(Vu32.uw,Vv32.uw)","Vector word rotate right", VdV.uw[i] = ((VuV.uw[i] >> (VvV.uw[i] & 0x1f)) | (VuV.uw[i] << (32 - (VvV.uw[i] & 0x1f))))) |
| 947 | |
| 948 | /********************************************************************* |
| 949 | * MMVECTOR SHIFT AND PERMUTE |
| 950 | * ******************************************************************/ |
| 951 | |
| 952 | ITERATOR_INSN2_PERMUTE_SLOT_DOUBLE_VEC(32,vasr_into,"Vxx32=vasrinto(Vu32,Vv32)","Vxx32.w=vasrinto(Vu32.w,Vv32.w)","ASR vector 1 elements and overlay dropping bits to MSB of vector 2 elements", |
| 953 | fHIDE(int64_t ) shift = (fSE32_64(VuV.w[i]) << 32); |
| 954 | fHIDE(int64_t ) mask = (((fSE32_64(VxxV.v[0].w[i])) << 32) | fZE32_64(VxxV.v[0].w[i])); |
| 955 | fHIDE(int64_t) lomask = (((fSE32_64(1)) << 32) - 1); |
| 956 | fHIDE(int ) count = -(0x40 & VvV.w[i]) + (VvV.w[i] & 0x3f); |
| 957 | fHIDE(int64_t ) result = (count == -0x40) ? 0 : (((count < 0) ? ((shift << -(count)) | (mask & (lomask << -(count)))) : ((shift >> count) | (mask & (lomask >> count))))); |
| 958 | VxxV.v[1].w[i] = ((result >> 32) & 0xffffffff); |
| 959 | VxxV.v[0].w[i] = (result & 0xffffffff)) |
| 960 | |
| 961 | #define NEW_NARROWING_SHIFT 1 |
| 962 | |
| 963 | #if NEW_NARROWING_SHIFT |
| 964 | #define NARROWING_SHIFT(ITERSIZE,TAG,DSTM,DSTTYPE,SRCTYPE,SYNOPTS,SATFUNC,RNDFUNC,SHAMTMASK) \ |
| 965 | ITERATOR_INSN_SHIFT_SLOT(ITERSIZE,TAG, \ |
| 966 | "Vd32." #DSTTYPE "=vasr(Vu32." #SRCTYPE ",Vv32." #SRCTYPE ",Rt8)" #SYNOPTS, \ |
| 967 | "Vector shift right and shuffle", \ |
| 968 | fHIDE(int )shamt = RtV & SHAMTMASK; \ |
| 969 | DSTM(0,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VvV.SRCTYPE[i],shamt) >> shamt)); \ |
| 970 | DSTM(1,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VuV.SRCTYPE[i],shamt) >> shamt))) |
| 971 | |
| 972 | |
| 973 | |
| 974 | |
| 975 | |
| 976 | /* WORD TO HALF*/ |
| 977 | |
| 978 | NARROWING_SHIFT(32,vasrwh,fSETHALF,h,w,,fECHO,fVNOROUND,0xF) |
| 979 | NARROWING_SHIFT(32,vasrwhsat,fSETHALF,h,w,:sat,fVSATH,fVNOROUND,0xF) |
| 980 | NARROWING_SHIFT(32,vasrwhrndsat,fSETHALF,h,w,:rnd:sat,fVSATH,fVROUND,0xF) |
| 981 | NARROWING_SHIFT(32,vasrwuhrndsat,fSETHALF,uh,w,:rnd:sat,fVSATUH,fVROUND,0xF) |
| 982 | NARROWING_SHIFT(32,vasrwuhsat,fSETHALF,uh,w,:sat,fVSATUH,fVNOROUND,0xF) |
| 983 | NARROWING_SHIFT(32,vasruwuhrndsat,fSETHALF,uh,uw,:rnd:sat,fVSATUH,fVROUND,0xF) |
| 984 | |
| 985 | NARROWING_SHIFT_NOV1(32,vasruwuhsat,fSETHALF,uh,uw,:sat,fVSATUH,fVNOROUND,0xF) |
| 986 | NARROWING_SHIFT(16,vasrhubsat,fSETBYTE,ub,h,:sat,fVSATUB,fVNOROUND,0x7) |
| 987 | NARROWING_SHIFT(16,vasrhubrndsat,fSETBYTE,ub,h,:rnd:sat,fVSATUB,fVROUND,0x7) |
| 988 | NARROWING_SHIFT(16,vasrhbsat,fSETBYTE,b,h,:sat,fVSATB,fVNOROUND,0x7) |
| 989 | NARROWING_SHIFT(16,vasrhbrndsat,fSETBYTE,b,h,:rnd:sat,fVSATB,fVROUND,0x7) |
| 990 | |
| 991 | #define NARROWING_VECTOR_SHIFT(ITERSIZE,TAG,DSTM,DSTTYPE,SRCTYPE,SRCTYPE2,SYNOPTS,SATFUNC,RNDFUNC,SHAMTMASK) \ |
| 992 | ITERATOR_INSN_SHIFT3_SLOT(ITERSIZE,TAG, \ |
| 993 | "Vd32." #DSTTYPE "=vasr(Vuu32." #SRCTYPE ",Vv32." #SRCTYPE2 ")" #SYNOPTS, \ |
| 994 | "Vector shift by vector right and shuffle", \ |
| 995 | fHIDE(int )shamt = VvV.SRCTYPE2[2*i+0] & SHAMTMASK; \ |
| 996 | DSTM(0,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VuuV.v[0].SRCTYPE[i],shamt) >> shamt)); \ |
| 997 | shamt = VvV.SRCTYPE2[2*i+1] & SHAMTMASK; \ |
| 998 | DSTM(1,VdV.SRCTYPE[i],SATFUNC(RNDFUNC(VuuV.v[1].SRCTYPE[i],shamt) >> shamt))) |
| 999 | |
| 1000 | /* WORD TO HALF*/ |
| 1001 | NARROWING_VECTOR_SHIFT(32,vasrvwuhsat,fSETHALF,uh,w,uh,:sat,fVSATUH,fVNOROUND,0xF) |
| 1002 | NARROWING_VECTOR_SHIFT(32,vasrvwuhrndsat,fSETHALF,uh,w,uh,:rnd:sat,fVSATUH,fVROUND,0xF) |
| 1003 | /* HALF TO BYTE*/ |
| 1004 | NARROWING_VECTOR_SHIFT(16,vasrvuhubsat,fSETBYTE,ub,uh,ub,:sat,fVSATUB,fVNOROUND,0x7) |
| 1005 | NARROWING_VECTOR_SHIFT(16,vasrvuhubrndsat,fSETBYTE,ub,uh,ub,:rnd:sat,fVSATUB,fVROUND,0x7) |
| 1006 | |
| 1007 | NARROWING_SHIFT_NOV1(16,vasruhubsat,fSETBYTE,ub,uh,:sat,fVSATUB,fVNOROUND,0x7) |
| 1008 | NARROWING_SHIFT_NOV1(16,vasruhubrndsat,fSETBYTE,ub,uh,:rnd:sat,fVSATUB,fVROUND,0x7) |
| 1009 | |
| 1010 | #else |
| 1011 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrwh,"Vd32=vasrwh(Vu32,Vv32,Rt8)","Vd32.h=vasr(Vu32.w,Vv32.w,Rt8)", |
| 1012 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1013 | fSETHALF(0,VdV.w[i], (VvV.w[i] >> (RtV & 0xF))); |
| 1014 | fSETHALF(1,VdV.w[i], (VuV.w[i] >> (RtV & 0xF)))) |
| 1015 | |
| 1016 | |
| 1017 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrwhsat,"Vd32=vasrwh(Vu32,Vv32,Rt8):sat","Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat", |
| 1018 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1019 | fSETHALF(0,VdV.w[i], fVSATH(VvV.w[i] >> (RtV & 0xF))); |
| 1020 | fSETHALF(1,VdV.w[i], fVSATH(VuV.w[i] >> (RtV & 0xF)))) |
| 1021 | |
| 1022 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrwhrndsat,"Vd32=vasrwh(Vu32,Vv32,Rt8):rnd:sat","Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat", |
| 1023 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1024 | fHIDE(int ) shamt = RtV & 0xF; |
| 1025 | fSETHALF(0,VdV.w[i], fVSATH( (VvV.w[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt)); |
| 1026 | fSETHALF(1,VdV.w[i], fVSATH( (VuV.w[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt))) |
| 1027 | |
| 1028 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrwuhrndsat,"Vd32=vasrwuh(Vu32,Vv32,Rt8):rnd:sat","Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat", |
| 1029 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1030 | fHIDE(int ) shamt = RtV & 0xF; |
| 1031 | fSETHALF(0,VdV.w[i], fVSATUH( (VvV.w[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt)); |
| 1032 | fSETHALF(1,VdV.w[i], fVSATUH( (VuV.w[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt))) |
| 1033 | |
| 1034 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrwuhsat,"Vd32=vasrwuh(Vu32,Vv32,Rt8):sat","Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat", |
| 1035 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1036 | fSETHALF(0, VdV.uw[i], fVSATUH(VvV.w[i] >> (RtV & 0xF))); |
| 1037 | fSETHALF(1, VdV.uw[i], fVSATUH(VuV.w[i] >> (RtV & 0xF)))) |
| 1038 | |
| 1039 | ITERATOR_INSN2_SHIFT_SLOT(32,vasruwuhrndsat,"Vd32=vasruwuh(Vu32,Vv32,Rt8):rnd:sat","Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):rnd:sat", |
| 1040 | "Vector arithmetic shift right words, shuffle even halfwords", |
| 1041 | fHIDE(int ) shamt = RtV & 0xF; |
| 1042 | fSETHALF(0,VdV.w[i], fVSATUH( (VvV.uw[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt)); |
| 1043 | fSETHALF(1,VdV.w[i], fVSATUH( (VuV.uw[i] + fBIDIR_ASHIFTL(1,(shamt-1),4_8) ) >> shamt))) |
| 1044 | #endif |
| 1045 | |
| 1046 | |
| 1047 | |
| 1048 | ITERATOR_INSN2_SHIFT_SLOT(32,vroundwh,"Vd32=vroundwh(Vu32,Vv32):sat","Vd32.h=vround(Vu32.w,Vv32.w):sat", |
| 1049 | "Vector round words to halves, shuffle resultant halfwords", |
| 1050 | fSETHALF(0, VdV.uw[i], fVSATH((VvV.w[i] + fCONSTLL(0x8000)) >> 16)); |
| 1051 | fSETHALF(1, VdV.uw[i], fVSATH((VuV.w[i] + fCONSTLL(0x8000)) >> 16))) |
| 1052 | |
| 1053 | ITERATOR_INSN2_SHIFT_SLOT(32,vroundwuh,"Vd32=vroundwuh(Vu32,Vv32):sat","Vd32.uh=vround(Vu32.w,Vv32.w):sat", |
| 1054 | "Vector round words to halves, shuffle resultant halfwords", |
| 1055 | fSETHALF(0, VdV.uw[i], fVSATUH((VvV.w[i] + fCONSTLL(0x8000)) >> 16)); |
| 1056 | fSETHALF(1, VdV.uw[i], fVSATUH((VuV.w[i] + fCONSTLL(0x8000)) >> 16))) |
| 1057 | |
| 1058 | ITERATOR_INSN2_SHIFT_SLOT(32,vrounduwuh,"Vd32=vrounduwuh(Vu32,Vv32):sat","Vd32.uh=vround(Vu32.uw,Vv32.uw):sat", |
| 1059 | "Vector round words to halves, shuffle resultant halfwords", |
| 1060 | fSETHALF(0, VdV.uw[i], fVSATUH((VvV.uw[i] + fCONSTLL(0x8000)) >> 16)); |
| 1061 | fSETHALF(1, VdV.uw[i], fVSATUH((VuV.uw[i] + fCONSTLL(0x8000)) >> 16))) |
| 1062 | |
| 1063 | |
| 1064 | |
| 1065 | |
| 1066 | |
| 1067 | /* HALF TO BYTE*/ |
| 1068 | |
| 1069 | ITERATOR_INSN2_SHIFT_SLOT(16,vroundhb,"Vd32=vroundhb(Vu32,Vv32):sat","Vd32.b=vround(Vu32.h,Vv32.h):sat", |
| 1070 | "Vector round words to halves, shuffle resultant halfwords", |
| 1071 | fSETBYTE(0, VdV.uh[i], fVSATB((VvV.h[i] + 0x80) >> 8)); |
| 1072 | fSETBYTE(1, VdV.uh[i], fVSATB((VuV.h[i] + 0x80) >> 8))) |
| 1073 | |
| 1074 | ITERATOR_INSN2_SHIFT_SLOT(16,vroundhub,"Vd32=vroundhub(Vu32,Vv32):sat","Vd32.ub=vround(Vu32.h,Vv32.h):sat", |
| 1075 | "Vector round words to halves, shuffle resultant halfwords", |
| 1076 | fSETBYTE(0, VdV.uh[i], fVSATUB((VvV.h[i] + 0x80) >> 8)); |
| 1077 | fSETBYTE(1, VdV.uh[i], fVSATUB((VuV.h[i] + 0x80) >> 8))) |
| 1078 | |
| 1079 | ITERATOR_INSN2_SHIFT_SLOT(16,vrounduhub,"Vd32=vrounduhub(Vu32,Vv32):sat","Vd32.ub=vround(Vu32.uh,Vv32.uh):sat", |
| 1080 | "Vector round words to halves, shuffle resultant halfwords", |
| 1081 | fSETBYTE(0, VdV.uh[i], fVSATUB((VvV.uh[i] + 0x80) >> 8)); |
| 1082 | fSETBYTE(1, VdV.uh[i], fVSATUB((VuV.uh[i] + 0x80) >> 8))) |
| 1083 | |
| 1084 | |
| 1085 | ITERATOR_INSN2_SHIFT_SLOT(32,vaslw_acc,"Vx32+=vaslw(Vu32,Rt32)","Vx32.w+=vasl(Vu32.w,Rt32)", |
| 1086 | "Vector shift add word", |
| 1087 | VxV.w[i] += (VuV.w[i] << (RtV & (32-1)))) |
| 1088 | |
| 1089 | ITERATOR_INSN2_SHIFT_SLOT(32,vasrw_acc,"Vx32+=vasrw(Vu32,Rt32)","Vx32.w+=vasr(Vu32.w,Rt32)", |
| 1090 | "Vector shift add word", |
| 1091 | VxV.w[i] += (VuV.w[i] >> (RtV & (32-1)))) |
| 1092 | |
| 1093 | ITERATOR_INSN2_SHIFT_SLOT_NOV1(16,vaslh_acc,"Vx32+=vaslh(Vu32,Rt32)","Vx32.h+=vasl(Vu32.h,Rt32)", |
| 1094 | "Vector shift add halfword", |
| 1095 | VxV.h[i] += (VuV.h[i] << (RtV & (16-1)))) |
| 1096 | |
| 1097 | ITERATOR_INSN2_SHIFT_SLOT_NOV1(16,vasrh_acc,"Vx32+=vasrh(Vu32,Rt32)","Vx32.h+=vasr(Vu32.h,Rt32)", |
| 1098 | "Vector shift add halfword", |
| 1099 | VxV.h[i] += (VuV.h[i] >> (RtV & (16-1)))) |
| 1100 | |
| 1101 | /************************************************************************** |
| 1102 | * |
| 1103 | * MMVECTOR ELEMENT-WISE ARITHMETIC |
| 1104 | * |
| 1105 | **************************************************************************/ |
| 1106 | |
| 1107 | /************************************************************************** |
| 1108 | * MACROS GO IN MACROS.DEF NOT HERE!!! |
| 1109 | **************************************************************************/ |
| 1110 | |
| 1111 | |
| 1112 | #define MMVEC_ABSDIFF(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 1113 | ITERATOR_INSN2_MPY_SLOT(WIDTH, vabsdiff##TYPE, "Vd32=vabsdiff"TYPE2"(Vu32,Vv32)" ,"Vd32."#DEST"=vabsdiff(Vu32."#SRC",Vv32."#SRC")" , "Vector Absolute of Difference "DESCR, VdV.DEST[i] = (VuV.SRC[i] > VvV.SRC[i]) ? (VuV.SRC[i] - VvV.SRC[i]) : (VvV.SRC[i] - VuV.SRC[i])) |
| 1114 | |
| 1115 | #define MMVEC_ADDU_SAT(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 1116 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vadd##TYPE##sat, "Vd32=vadd"TYPE2"(Vu32,Vv32):sat" , "Vd32."#DEST"=vadd(Vu32."#SRC",Vv32."#SRC"):sat", "Vector Add & Saturate "DESCR, VdV.DEST[i] = fVUADDSAT(WIDTH, VuV.SRC[i], VvV.SRC[i]))\ |
| 1117 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vadd##TYPE##sat_dv, "Vdd32=vadd"TYPE2"(Vuu32,Vvv32):sat", "Vdd32."#DEST"=vadd(Vuu32."#SRC",Vvv32."#SRC"):sat", "Double Vector Add & Saturate "DESCR, VddV.v[0].DEST[i] = fVUADDSAT(WIDTH, VuuV.v[0].SRC[i],VvvV.v[0].SRC[i]); VddV.v[1].DEST[i] = fVUADDSAT(WIDTH, VuuV.v[1].SRC[i],VvvV.v[1].SRC[i]))\ |
| 1118 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vsub##TYPE##sat, "Vd32=vsub"TYPE2"(Vu32,Vv32):sat", "Vd32."#DEST"=vsub(Vu32."#SRC",Vv32."#SRC"):sat", "Vector Add & Saturate "DESCR, VdV.DEST[i] = fVUSUBSAT(WIDTH, VuV.SRC[i], VvV.SRC[i]))\ |
| 1119 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vsub##TYPE##sat_dv, "Vdd32=vsub"TYPE2"(Vuu32,Vvv32):sat", "Vdd32."#DEST"=vsub(Vuu32."#SRC",Vvv32."#SRC"):sat", "Double Vector Add & Saturate "DESCR, VddV.v[0].DEST[i] = fVUSUBSAT(WIDTH, VuuV.v[0].SRC[i],VvvV.v[0].SRC[i]); VddV.v[1].DEST[i] = fVUSUBSAT(WIDTH, VuuV.v[1].SRC[i],VvvV.v[1].SRC[i]))\ |
| 1120 | |
| 1121 | #define MMVEC_ADDS_SAT(TYPE,TYPE2,DESCR, WIDTH,DEST,SRC)\ |
| 1122 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vadd##TYPE##sat, "Vd32=vadd"TYPE2"(Vu32,Vv32):sat" , "Vd32."#DEST"=vadd(Vu32."#SRC",Vv32."#SRC"):sat", "Vector Add & Saturate "DESCR, VdV.DEST[i] = fVSADDSAT(WIDTH, VuV.SRC[i], VvV.SRC[i]))\ |
| 1123 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vadd##TYPE##sat_dv, "Vdd32=vadd"TYPE2"(Vuu32,Vvv32):sat", "Vdd32."#DEST"=vadd(Vuu32."#SRC",Vvv32."#SRC"):sat", "Double Vector Add & Saturate "DESCR, VddV.v[0].DEST[i] = fVSADDSAT(WIDTH, VuuV.v[0].SRC[i], VvvV.v[0].SRC[i]); VddV.v[1].DEST[i] = fVSADDSAT(WIDTH, VuuV.v[1].SRC[i], VvvV.v[1].SRC[i]))\ |
| 1124 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vsub##TYPE##sat, "Vd32=vsub"TYPE2"(Vu32,Vv32):sat", "Vd32."#DEST"=vsub(Vu32."#SRC",Vv32."#SRC"):sat", "Vector Add & Saturate "DESCR, VdV.DEST[i] = fVSSUBSAT(WIDTH, VuV.SRC[i], VvV.SRC[i]))\ |
| 1125 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vsub##TYPE##sat_dv, "Vdd32=vsub"TYPE2"(Vuu32,Vvv32):sat", "Vdd32."#DEST"=vsub(Vuu32."#SRC",Vvv32."#SRC"):sat", "Double Vector Add & Saturate "DESCR, VddV.v[0].DEST[i] = fVSSUBSAT(WIDTH, VuuV.v[0].SRC[i], VvvV.v[0].SRC[i]); VddV.v[1].DEST[i] = fVSSUBSAT(WIDTH, VuuV.v[1].SRC[i], VvvV.v[1].SRC[i]))\ |
| 1126 | |
| 1127 | #define MMVEC_AVGU(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 1128 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vavg##TYPE, "Vd32=vavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC")", "Vector Average "DESCR, VdV.DEST[i] = fVAVGU( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 1129 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vavg##TYPE##rnd, "Vd32=vavg"TYPE2"(Vu32,Vv32):rnd", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC"):rnd", "Vector Average % Round"DESCR, VdV.DEST[i] = fVAVGURND(WIDTH, VuV.SRC[i], VvV.SRC[i])) |
| 1130 | |
| 1131 | |
| 1132 | |
| 1133 | #define MMVEC_AVGS(TYPE,TYPE2,DESCR, WIDTH, DEST,SRC)\ |
| 1134 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vavg##TYPE, "Vd32=vavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC")", "Vector Average "DESCR, VdV.DEST[i] = fVAVGS( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 1135 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vavg##TYPE##rnd, "Vd32=vavg"TYPE2"(Vu32,Vv32):rnd", "Vd32."#DEST"=vavg(Vu32."#SRC",Vv32."#SRC"):rnd", "Vector Average % Round"DESCR, VdV.DEST[i] = fVAVGSRND( WIDTH, VuV.SRC[i], VvV.SRC[i])) \ |
| 1136 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vnavg##TYPE, "Vd32=vnavg"TYPE2"(Vu32,Vv32)", "Vd32."#DEST"=vnavg(Vu32."#SRC",Vv32."#SRC")", "Vector Negative Average "DESCR, VdV.DEST[i] = fVNAVGS( WIDTH, VuV.SRC[i], VvV.SRC[i])) |
| 1137 | |
| 1138 | |
| 1139 | |
| 1140 | |
| 1141 | |
| 1142 | |
| 1143 | |
| 1144 | #define MMVEC_ADDWRAP(TYPE,TYPE2, DESCR, WIDTH , DEST,SRC)\ |
| 1145 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vadd##TYPE, "Vd32=vadd"TYPE2"(Vu32,Vv32)" , "Vd32."#DEST"=vadd(Vu32."#SRC",Vv32."#SRC")", "Vector Add "DESCR, VdV.DEST[i] = VuV.SRC[i] + VvV.SRC[i])\ |
| 1146 | ITERATOR_INSN2_ANY_SLOT(WIDTH, vsub##TYPE, "Vd32=vsub"TYPE2"(Vu32,Vv32)" , "Vd32."#DEST"=vsub(Vu32."#SRC",Vv32."#SRC")", "Vector Sub "DESCR, VdV.DEST[i] = VuV.SRC[i] - VvV.SRC[i])\ |
| 1147 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vadd##TYPE##_dv, "Vdd32=vadd"TYPE2"(Vuu32,Vvv32)" , "Vdd32."#DEST"=vadd(Vuu32."#SRC",Vvv32."#SRC")", "Double Vector Add "DESCR, VddV.v[0].DEST[i] = VuuV.v[0].SRC[i] + VvvV.v[0].SRC[i]; VddV.v[1].DEST[i] = VuuV.v[1].SRC[i] + VvvV.v[1].SRC[i])\ |
| 1148 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(WIDTH, vsub##TYPE##_dv, "Vdd32=vsub"TYPE2"(Vuu32,Vvv32)" , "Vdd32."#DEST"=vsub(Vuu32."#SRC",Vvv32."#SRC")", "Double Vector Sub "DESCR, VddV.v[0].DEST[i] = VuuV.v[0].SRC[i] - VvvV.v[0].SRC[i]; VddV.v[1].DEST[i] = VuuV.v[1].SRC[i] - VvvV.v[1].SRC[i]) \ |
| 1149 | |
| 1150 | |
| 1151 | |
| 1152 | |
| 1153 | |
| 1154 | /* Wrapping Adds */ |
| 1155 | MMVEC_ADDWRAP(b, "b", "Byte", 8, b, b) |
| 1156 | MMVEC_ADDWRAP(h, "h", "Halfword", 16, h, h) |
| 1157 | MMVEC_ADDWRAP(w, "w", "Word", 32, w, w) |
| 1158 | |
| 1159 | /* Saturating Adds */ |
| 1160 | MMVEC_ADDU_SAT(ub, "ub", "Unsigned Byte", 8, ub, ub) |
| 1161 | MMVEC_ADDU_SAT(uh, "uh", "Unsigned Halfword", 16, uh, uh) |
| 1162 | MMVEC_ADDU_SAT(uw, "uw", "Unsigned word", 32, uw, uw) |
| 1163 | MMVEC_ADDS_SAT(b, "b", "byte", 8, b, b) |
| 1164 | MMVEC_ADDS_SAT(h, "h", "Halfword", 16, h, h) |
| 1165 | MMVEC_ADDS_SAT(w, "w", "Word", 32, w, w) |
| 1166 | |
| 1167 | |
| 1168 | /* Averaging Instructions */ |
| 1169 | MMVEC_AVGU(ub,"ub", "Unsigned Byte", 8, ub, ub) |
| 1170 | MMVEC_AVGU(uh,"uh", "Unsigned Halfword", 16, uh, uh) |
| 1171 | MMVEC_AVGU_NOV1(uw,"uw", "Unsigned Word", 32, uw, uw) |
| 1172 | MMVEC_AVGS_NOV1(b, "b", "Byte", 8, b, b) |
| 1173 | MMVEC_AVGS(h, "h", "Halfword", 16, h, h) |
| 1174 | MMVEC_AVGS(w, "w", "Word", 32, w, w) |
| 1175 | |
| 1176 | |
| 1177 | /* Absolute Difference */ |
| 1178 | MMVEC_ABSDIFF(ub,"ub", "Unsigned Byte", 8, ub, ub) |
| 1179 | MMVEC_ABSDIFF(uh,"uh", "Unsigned Halfword", 16, uh, uh) |
| 1180 | MMVEC_ABSDIFF(h,"h", "Halfword", 16, uh, h) |
| 1181 | MMVEC_ABSDIFF(w,"w", "Word", 32, uw, w) |
| 1182 | |
| 1183 | ITERATOR_INSN2_ANY_SLOT(8,vnavgub, "Vd32=vnavgub(Vu32,Vv32)", "Vd32.b=vnavg(Vu32.ub,Vv32.ub)", |
| 1184 | "Vector Negative Average Unsigned Byte", VdV.b[i] = fVNAVGU(8, VuV.ub[i], VvV.ub[i])) |
| 1185 | |
| 1186 | ITERATOR_INSN_ANY_SLOT(32,vaddcarrysat,"Vd32.w=vadd(Vu32.w,Vv32.w,Qs4):carry:sat","add w/carry and saturate", |
| 1187 | VdV.w[i] = fVSATW(VuV.w[i]+VvV.w[i]+fGETQBIT(QsV,i*4))) |
| 1188 | |
| 1189 | ITERATOR_INSN_ANY_SLOT(32,vaddcarry,"Vd32.w=vadd(Vu32.w,Vv32.w,Qx4):carry","add w/carry", |
| 1190 | VdV.w[i] = VuV.w[i]+VvV.w[i]+fGETQBIT(QxV,i*4); |
| 1191 | fSETQBITS(QxV,4,0xF,4*i,-fCARRY_FROM_ADD32(VuV.w[i],VvV.w[i],fGETQBIT(QxV,i*4)))) |
| 1192 | |
| 1193 | ITERATOR_INSN_ANY_SLOT(32,vsubcarry,"Vd32.w=vsub(Vu32.w,Vv32.w,Qx4):carry","add w/carry", |
| 1194 | VdV.w[i] = VuV.w[i]+~VvV.w[i]+fGETQBIT(QxV,i*4); |
| 1195 | fSETQBITS(QxV,4,0xF,4*i,-fCARRY_FROM_ADD32(VuV.w[i],~VvV.w[i],fGETQBIT(QxV,i*4)))) |
| 1196 | |
| 1197 | ITERATOR_INSN_ANY_SLOT(32,vaddcarryo,"Vd32.w,Qe4=vadd(Vu32.w,Vv32.w):carry","add w/carry out-only", |
| 1198 | VdV.w[i] = VuV.w[i]+VvV.w[i]; |
| 1199 | fSETQBITS(QeV,4,0xF,4*i,-fCARRY_FROM_ADD32(VuV.w[i],VvV.w[i],0))) |
| 1200 | |
| 1201 | ITERATOR_INSN_ANY_SLOT(32,vsubcarryo,"Vd32.w,Qe4=vsub(Vu32.w,Vv32.w):carry","subtract w/carry out-only", |
| 1202 | VdV.w[i] = VuV.w[i]+~VvV.w[i]+1; |
| 1203 | fSETQBITS(QeV,4,0xF,4*i,-fCARRY_FROM_ADD32(VuV.w[i],~VvV.w[i],1))) |
| 1204 | |
| 1205 | |
| 1206 | ITERATOR_INSN_ANY_SLOT(32,vsatdw,"Vd32.w=vsatdw(Vu32.w,Vv32.w)","Saturate from 64-bits (higher 32-bits come from first vector) to 32-bits",VdV.w[i] = fVSATDW(VuV.w[i],VvV.w[i])) |
| 1207 | |
| 1208 | |
| 1209 | #define MMVEC_ADDSAT_MIX(TAGEND,SATF,WIDTH,DEST,SRC1,SRC2)\ |
| 1210 | ITERATOR_INSN_ANY_SLOT(WIDTH, vadd##TAGEND,"Vd32."#DEST"=vadd(Vu32."#SRC1",Vv32."#SRC2"):sat", "Vector Add mixed", VdV.DEST[i] = SATF(VuV.SRC1[i] + VvV.SRC2[i]))\ |
| 1211 | ITERATOR_INSN_ANY_SLOT(WIDTH, vsub##TAGEND,"Vd32."#DEST"=vsub(Vu32."#SRC1",Vv32."#SRC2"):sat", "Vector Sub mixed", VdV.DEST[i] = SATF(VuV.SRC1[i] - VvV.SRC2[i]))\ |
| 1212 | |
| 1213 | MMVEC_ADDSAT_MIX(ububb_sat,fVSATUB,8,ub,ub,b) |
| 1214 | |
| 1215 | /**************************** |
| 1216 | * WIDENING |
| 1217 | ****************************/ |
| 1218 | |
| 1219 | |
| 1220 | |
| 1221 | |
| 1222 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vaddubh,"Vdd32=vaddub(Vu32,Vv32)","Vdd32.h=vadd(Vu32.ub,Vv32.ub)", |
| 1223 | "Vector addition with widen into two vectors", |
| 1224 | VddV.v[0].h[i] = fZE8_16(fGETUBYTE(0, VuV.uh[i])) + fZE8_16(fGETUBYTE(0, VvV.uh[i])); |
| 1225 | VddV.v[1].h[i] = fZE8_16(fGETUBYTE(1, VuV.uh[i])) + fZE8_16(fGETUBYTE(1, VvV.uh[i]))) |
| 1226 | |
| 1227 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vsububh,"Vdd32=vsubub(Vu32,Vv32)","Vdd32.h=vsub(Vu32.ub,Vv32.ub)", |
| 1228 | "Vector subtraction with widen into two vectors", |
| 1229 | VddV.v[0].h[i] = fZE8_16(fGETUBYTE(0, VuV.uh[i])) - fZE8_16(fGETUBYTE(0, VvV.uh[i])); |
| 1230 | VddV.v[1].h[i] = fZE8_16(fGETUBYTE(1, VuV.uh[i])) - fZE8_16(fGETUBYTE(1, VvV.uh[i]))) |
| 1231 | |
| 1232 | |
| 1233 | |
| 1234 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vaddhw,"Vdd32=vaddh(Vu32,Vv32)","Vdd32.w=vadd(Vu32.h,Vv32.h)", |
| 1235 | "Vector addition with widen into two vectors", |
| 1236 | VddV.v[0].w[i] = fGETHALF(0, VuV.w[i]) + fGETHALF(0, VvV.w[i]); |
| 1237 | VddV.v[1].w[i] = fGETHALF(1, VuV.w[i]) + fGETHALF(1, VvV.w[i])) |
| 1238 | |
| 1239 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vsubhw,"Vdd32=vsubh(Vu32,Vv32)","Vdd32.w=vsub(Vu32.h,Vv32.h)", |
| 1240 | "Vector subtraction with widen into two vectors", |
| 1241 | VddV.v[0].w[i] = fGETHALF(0, VuV.w[i]) - fGETHALF(0, VvV.w[i]); |
| 1242 | VddV.v[1].w[i] = fGETHALF(1, VuV.w[i]) - fGETHALF(1, VvV.w[i])) |
| 1243 | |
| 1244 | |
| 1245 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vadduhw,"Vdd32=vadduh(Vu32,Vv32)","Vdd32.w=vadd(Vu32.uh,Vv32.uh)", |
| 1246 | "Vector addition with widen into two vectors", |
| 1247 | VddV.v[0].w[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])) + fZE16_32(fGETUHALF(0, VvV.uw[i])); |
| 1248 | VddV.v[1].w[i] = fZE16_32(fGETUHALF(1, VuV.uw[i])) + fZE16_32(fGETUHALF(1, VvV.uw[i]))) |
| 1249 | |
| 1250 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vsubuhw,"Vdd32=vsubuh(Vu32,Vv32)","Vdd32.w=vsub(Vu32.uh,Vv32.uh)", |
| 1251 | "Vector subtraction with widen into two vectors", |
| 1252 | VddV.v[0].w[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])) - fZE16_32(fGETUHALF(0, VvV.uw[i])); |
| 1253 | VddV.v[1].w[i] = fZE16_32(fGETUHALF(1, VuV.uw[i])) - fZE16_32(fGETUHALF(1, VvV.uw[i]))) |
| 1254 | |
| 1255 | |
| 1256 | |
| 1257 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vaddhw_acc,"Vxx32+=vaddh(Vu32,Vv32)","Vxx32.w+=vadd(Vu32.h,Vv32.h)", |
| 1258 | "Vector addition with widen into two vectors", |
| 1259 | VxxV.v[0].w[i] += fGETHALF(0, VuV.w[i]) + fGETHALF(0, VvV.w[i]); |
| 1260 | VxxV.v[1].w[i] += fGETHALF(1, VuV.w[i]) + fGETHALF(1, VvV.w[i])) |
| 1261 | |
| 1262 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vadduhw_acc,"Vxx32+=vadduh(Vu32,Vv32)","Vxx32.w+=vadd(Vu32.uh,Vv32.uh)", |
| 1263 | "Vector addition with widen into two vectors", |
| 1264 | VxxV.v[0].w[i] += fGETUHALF(0, VuV.w[i]) + fGETUHALF(0, VvV.w[i]); |
| 1265 | VxxV.v[1].w[i] += fGETUHALF(1, VuV.w[i]) + fGETUHALF(1, VvV.w[i])) |
| 1266 | |
| 1267 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vaddubh_acc,"Vxx32+=vaddub(Vu32,Vv32)","Vxx32.h+=vadd(Vu32.ub,Vv32.ub)", |
| 1268 | "Vector addition with widen into two vectors", |
| 1269 | VxxV.v[0].h[i] += fGETUBYTE(0, VuV.h[i]) + fGETUBYTE(0, VvV.h[i]); |
| 1270 | VxxV.v[1].h[i] += fGETUBYTE(1, VuV.h[i]) + fGETUBYTE(1, VvV.h[i])) |
| 1271 | |
| 1272 | |
| 1273 | /**************************** |
| 1274 | * Conditional |
| 1275 | ****************************/ |
| 1276 | |
| 1277 | #define CONDADDSUB(WIDTH,TAGEND,LHSYN,RHSYN,DESCR,LHBEH,RHBEH) \ |
| 1278 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vadd##TAGEND##q,"if (Qv4."#TAGEND") "LHSYN"+="RHSYN,"if (Qv4) "LHSYN"+="RHSYN,DESCR,LHBEH=fCONDMASK##WIDTH(QvV,i,LHBEH+RHBEH,LHBEH)) \ |
| 1279 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vsub##TAGEND##q,"if (Qv4."#TAGEND") "LHSYN"-="RHSYN,"if (Qv4) "LHSYN"-="RHSYN,DESCR,LHBEH=fCONDMASK##WIDTH(QvV,i,LHBEH-RHBEH,LHBEH)) \ |
| 1280 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vadd##TAGEND##nq,"if (!Qv4."#TAGEND") "LHSYN"+="RHSYN,"if (!Qv4) "LHSYN"+="RHSYN,DESCR,LHBEH=fCONDMASK##WIDTH(QvV,i,LHBEH,LHBEH+RHBEH)) \ |
| 1281 | ITERATOR_INSN2_ANY_SLOT(WIDTH,vsub##TAGEND##nq,"if (!Qv4."#TAGEND") "LHSYN"-="RHSYN,"if (!Qv4) "LHSYN"-="RHSYN,DESCR,LHBEH=fCONDMASK##WIDTH(QvV,i,LHBEH,LHBEH-RHBEH)) \ |
| 1282 | |
| 1283 | CONDADDSUB(8,b,"Vx32.b","Vu32.b","Conditional add/sub Byte",VxV.ub[i],VuV.ub[i]) |
| 1284 | CONDADDSUB(16,h,"Vx32.h","Vu32.h","Conditional add/sub Half",VxV.h[i],VuV.h[i]) |
| 1285 | CONDADDSUB(32,w,"Vx32.w","Vu32.w","Conditional add/sub Word",VxV.w[i],VuV.w[i]) |
| 1286 | |
| 1287 | /***************************************************** |
| 1288 | ABSOLUTE VALUES |
| 1289 | *****************************************************/ |
| 1290 | // V65 |
| 1291 | ITERATOR_INSN2_ANY_SLOT_NOV1(8,vabsb, "Vd32=vabsb(Vu32)", "Vd32.b=vabs(Vu32.b)", "Vector absolute value of bytes", VdV.b[i] = fABS(VuV.b[i])) |
| 1292 | ITERATOR_INSN2_ANY_SLOT_NOV1(8,vabsb_sat, "Vd32=vabsb(Vu32):sat", "Vd32.b=vabs(Vu32.b):sat", "Vector absolute value of bytes", VdV.b[i] = fVSATB(fABS(fSE8_16(VuV.b[i])))) |
| 1293 | |
| 1294 | |
| 1295 | ITERATOR_INSN2_ANY_SLOT(16,vabsh, "Vd32=vabsh(Vu32)", "Vd32.h=vabs(Vu32.h)", "Vector absolute value of halfwords", VdV.h[i] = fABS(VuV.h[i])) |
| 1296 | ITERATOR_INSN2_ANY_SLOT(16,vabsh_sat, "Vd32=vabsh(Vu32):sat", "Vd32.h=vabs(Vu32.h):sat", "Vector absolute value of halfwords", VdV.h[i] = fVSATH(fABS(fSE16_32(VuV.h[i])))) |
| 1297 | ITERATOR_INSN2_ANY_SLOT(32,vabsw, "Vd32=vabsw(Vu32)", "Vd32.w=vabs(Vu32.w)", "Vector absolute value of words", VdV.w[i] = fABS(VuV.w[i])) |
| 1298 | ITERATOR_INSN2_ANY_SLOT(32,vabsw_sat, "Vd32=vabsw(Vu32):sat", "Vd32.w=vabs(Vu32.w):sat", "Vector absolute value of words", VdV.w[i] = fVSATW(fABS(fSE32_64(VuV.w[i])))) |
| 1299 | |
| 1300 | |
| 1301 | /************************************************************************** |
| 1302 | * MMVECTOR MULTIPLICATIONS |
| 1303 | * ************************************************************************/ |
| 1304 | |
| 1305 | |
| 1306 | /* Byte by Byte */ |
| 1307 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybv,"Vdd32=vmpyb(Vu32,Vv32)","Vdd32.h=vmpy(Vu32.b,Vv32.b)", |
| 1308 | "Vector absolute value of words", |
| 1309 | VddV.v[0].h[i] = fMPY8SS(fGETBYTE(0, VuV.h[i]), fGETBYTE(0, VvV.h[i])); |
| 1310 | VddV.v[1].h[i] = fMPY8SS(fGETBYTE(1, VuV.h[i]), fGETBYTE(1, VvV.h[i]))) |
| 1311 | |
| 1312 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybv_acc,"Vxx32+=vmpyb(Vu32,Vv32)","Vxx32.h+=vmpy(Vu32.b,Vv32.b)", |
| 1313 | "Vector absolute value of words", |
| 1314 | VxxV.v[0].h[i] += fMPY8SS(fGETBYTE(0, VuV.h[i]), fGETBYTE(0, VvV.h[i])); |
| 1315 | VxxV.v[1].h[i] += fMPY8SS(fGETBYTE(1, VuV.h[i]), fGETBYTE(1, VvV.h[i]))) |
| 1316 | |
| 1317 | |
| 1318 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyubv,"Vdd32=vmpyub(Vu32,Vv32)","Vdd32.uh=vmpy(Vu32.ub,Vv32.ub)", |
| 1319 | "Vector absolute value of words", |
| 1320 | VddV.v[0].uh[i] = fMPY8UU(fGETUBYTE(0, VuV.uh[i]), fGETUBYTE(0, VvV.uh[i]) ); |
| 1321 | VddV.v[1].uh[i] = fMPY8UU(fGETUBYTE(1, VuV.uh[i]), fGETUBYTE(1, VvV.uh[i]) )) |
| 1322 | |
| 1323 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyubv_acc,"Vxx32+=vmpyub(Vu32,Vv32)","Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub)", |
| 1324 | "Vector absolute value of words", |
| 1325 | VxxV.v[0].uh[i] += fMPY8UU(fGETUBYTE(0, VuV.uh[i]), fGETUBYTE(0, VvV.uh[i]) ); |
| 1326 | VxxV.v[1].uh[i] += fMPY8UU(fGETUBYTE(1, VuV.uh[i]), fGETUBYTE(1, VvV.uh[i]) )) |
| 1327 | |
| 1328 | |
| 1329 | |
| 1330 | |
| 1331 | |
| 1332 | |
| 1333 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybusv,"Vdd32=vmpybus(Vu32,Vv32)","Vdd32.h=vmpy(Vu32.ub,Vv32.b)", |
| 1334 | "Vector absolute value of words", |
| 1335 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0, VuV.uh[i]), fGETBYTE(0, VvV.h[i])); |
| 1336 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1, VuV.uh[i]), fGETBYTE(1, VvV.h[i]))) |
| 1337 | |
| 1338 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybusv_acc,"Vxx32+=vmpybus(Vu32,Vv32)","Vxx32.h+=vmpy(Vu32.ub,Vv32.b)", |
| 1339 | "Vector absolute value of words", |
| 1340 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(0, VuV.uh[i]), fGETBYTE(0, VvV.h[i])); |
| 1341 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(1, VuV.uh[i]), fGETBYTE(1, VvV.h[i]))) |
| 1342 | |
| 1343 | |
| 1344 | |
| 1345 | |
| 1346 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpabusv,"Vdd32=vmpabus(Vuu32,Vvv32)","Vdd32.h=vmpa(Vuu32.ub,Vvv32.b)", |
| 1347 | "Vertical Byte Multiply", |
| 1348 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETBYTE(0, VvvV.v[0].uh[i])) + fMPY8US(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETBYTE(0, VvvV.v[1].uh[i])); |
| 1349 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETBYTE(1, VvvV.v[0].uh[i])) + fMPY8US(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETBYTE(1, VvvV.v[1].uh[i]))) |
| 1350 | |
| 1351 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpabuuv,"Vdd32=vmpabuu(Vuu32,Vvv32)","Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub)", |
| 1352 | "Vertical Byte Multiply", |
| 1353 | VddV.v[0].h[i] = fMPY8UU(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETUBYTE(0, VvvV.v[0].uh[i])) + fMPY8UU(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETUBYTE(0, VvvV.v[1].uh[i])); |
| 1354 | VddV.v[1].h[i] = fMPY8UU(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETUBYTE(1, VvvV.v[0].uh[i])) + fMPY8UU(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETUBYTE(1, VvvV.v[1].uh[i]))) |
| 1355 | |
| 1356 | |
| 1357 | |
| 1358 | |
| 1359 | |
| 1360 | |
| 1361 | |
| 1362 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhv,"Vdd32=vmpyh(Vu32,Vv32)","Vdd32.w=vmpy(Vu32.h,Vv32.h)", |
| 1363 | "Vector by Vector Halfword Multiply", |
| 1364 | VddV.v[0].w[i] = fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, VvV.w[i])); |
| 1365 | VddV.v[1].w[i] = fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, VvV.w[i]))) |
| 1366 | |
| 1367 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhv_acc,"Vxx32+=vmpyh(Vu32,Vv32)","Vxx32.w+=vmpy(Vu32.h,Vv32.h)", |
| 1368 | "Vector by Vector Halfword Multiply", |
| 1369 | VxxV.v[0].w[i] += fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, VvV.w[i])); |
| 1370 | VxxV.v[1].w[i] += fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, VvV.w[i]))) |
| 1371 | |
| 1372 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyuhv,"Vdd32=vmpyuh(Vu32,Vv32)","Vdd32.uw=vmpy(Vu32.uh,Vv32.uh)", |
| 1373 | "Vector by Vector Unsigned Halfword Multiply", |
| 1374 | VddV.v[0].uw[i] = fMPY16UU(fGETUHALF(0, VuV.uw[i]), fGETUHALF(0, VvV.uw[i])); |
| 1375 | VddV.v[1].uw[i] = fMPY16UU(fGETUHALF(1, VuV.uw[i]), fGETUHALF(1, VvV.uw[i]))) |
| 1376 | |
| 1377 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyuhv_acc,"Vxx32+=vmpyuh(Vu32,Vv32)","Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh)", |
| 1378 | "Vector by Vector Unsigned Halfword Multiply", |
| 1379 | VxxV.v[0].uw[i] += fMPY16UU(fGETUHALF(0, VuV.uw[i]), fGETUHALF(0, VvV.uw[i])); |
| 1380 | VxxV.v[1].uw[i] += fMPY16UU(fGETUHALF(1, VuV.uw[i]), fGETUHALF(1, VvV.uw[i]))) |
| 1381 | |
| 1382 | |
| 1383 | |
| 1384 | /* Vector by Vector */ |
| 1385 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyhvsrs,"Vd32=vmpyh(Vu32,Vv32):<<1:rnd:sat","Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat", |
| 1386 | "Vector halfword multiply with round, shift, and sat16", |
| 1387 | VdV.h[i] = fVSATH(fGETHALF(1,fVSAT(fROUND((fMPY16SS(VuV.h[i],VvV.h[i] )<<1)))))) |
| 1388 | |
| 1389 | |
| 1390 | |
| 1391 | ITERATOR_INSN_MPY_SLOT(16,vmpyuhvs, "Vd32.uh=vmpy(Vu32.uh,Vv32.uh):>>16", |
| 1392 | "Vector by Vector Unsigned Halfword Multiply with 16 bit rightshift", |
| 1393 | VdV.uh[i] = fGETUHALF(1,fMPY16UU(VuV.uh[i],VvV.uh[i]))) |
| 1394 | |
| 1395 | |
| 1396 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhus, "Vdd32=vmpyhus(Vu32,Vv32)","Vdd32.w=vmpy(Vu32.h,Vv32.uh)", |
| 1397 | "Vector by Vector Halfword Multiply", |
| 1398 | VddV.v[0].w[i] = fMPY16SU(fGETHALF(0, VuV.w[i]), fGETUHALF(0, VvV.uw[i])); |
| 1399 | VddV.v[1].w[i] = fMPY16SU(fGETHALF(1, VuV.w[i]), fGETUHALF(1, VvV.uw[i]))) |
| 1400 | |
| 1401 | |
| 1402 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhus_acc, "Vxx32+=vmpyhus(Vu32,Vv32)","Vxx32.w+=vmpy(Vu32.h,Vv32.uh)", |
| 1403 | "Vector by Vector Halfword Multiply", |
| 1404 | VxxV.v[0].w[i] += fMPY16SU(fGETHALF(0, VuV.w[i]), fGETUHALF(0, VvV.uw[i])); |
| 1405 | VxxV.v[1].w[i] += fMPY16SU(fGETHALF(1, VuV.w[i]), fGETUHALF(1, VvV.uw[i]))) |
| 1406 | |
| 1407 | |
| 1408 | |
| 1409 | |
| 1410 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyih,"Vd32=vmpyih(Vu32,Vv32)","Vd32.h=vmpyi(Vu32.h,Vv32.h)", |
| 1411 | "Vector by Vector Halfword Multiply", |
| 1412 | VdV.h[i] = fMPY16SS(VuV.h[i], VvV.h[i])) |
| 1413 | |
| 1414 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyih_acc,"Vx32+=vmpyih(Vu32,Vv32)","Vx32.h+=vmpyi(Vu32.h,Vv32.h)", |
| 1415 | "Vector by Vector Halfword Multiply", |
| 1416 | VxV.h[i] += fMPY16SS(VuV.h[i], VvV.h[i])) |
| 1417 | |
| 1418 | |
| 1419 | |
| 1420 | /* 32x32 high half / frac */ |
| 1421 | |
| 1422 | |
| 1423 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyewuh,"Vd32=vmpyewuh(Vu32,Vv32)","Vd32.w=vmpye(Vu32.w,Vv32.uh)", |
| 1424 | "Vector by Vector Halfword Multiply", |
| 1425 | VdV.w[i] = fMPY3216SU(VuV.w[i], fGETUHALF(0, VvV.w[i])) >> 16) |
| 1426 | |
| 1427 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyowh,"Vd32=vmpyowh(Vu32,Vv32):<<1:sat","Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat", |
| 1428 | "Vector by Vector Halfword Multiply", |
| 1429 | VdV.w[i] = fVSATW((((fMPY3216SS(VuV.w[i], fGETHALF(1, VvV.w[i])) >> 14) + 0) >> 1))) |
| 1430 | |
| 1431 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyowh_rnd,"Vd32=vmpyowh(Vu32,Vv32):<<1:rnd:sat","Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat", |
| 1432 | "Vector by Vector Halfword Multiply", |
| 1433 | VdV.w[i] = fVSATW((((fMPY3216SS(VuV.w[i], fGETHALF(1, VvV.w[i])) >> 14) + 1) >> 1))) |
| 1434 | |
| 1435 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(32,vmpyewuh_64,"Vdd32=vmpye(Vu32.w,Vv32.uh)", |
| 1436 | "Word times Halfword Multiply, 64-bit result", |
| 1437 | fHIDE(size8s_t prod;) |
| 1438 | prod = fMPY32SU(VuV.w[i],fGETUHALF(0,VvV.w[i])); |
| 1439 | VddV.v[1].w[i] = prod >> 16; |
| 1440 | VddV.v[0].w[i] = prod << 16) |
| 1441 | |
| 1442 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(32,vmpyowh_64_acc,"Vxx32+=vmpyo(Vu32.w,Vv32.h)", |
| 1443 | "Word times Halfword Multiply, 64-bit result", |
| 1444 | fHIDE(size8s_t prod;) |
| 1445 | prod = fMPY32SS(VuV.w[i],fGETHALF(1,VvV.w[i])) + fSE32_64(VxxV.v[1].w[i]); |
| 1446 | VxxV.v[1].w[i] = prod >> 16; |
| 1447 | fSETHALF(0, VxxV.v[0].w[i], VxxV.v[0].w[i] >> 16); |
| 1448 | fSETHALF(1, VxxV.v[0].w[i], prod & 0x0000ffff)) |
| 1449 | |
| 1450 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyowh_sacc,"Vx32+=vmpyowh(Vu32,Vv32):<<1:sat:shift","Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift", |
| 1451 | "Vector by Vector Halfword Multiply", |
| 1452 | IV1DEAD() VxV.w[i] = fVSATW(((((VxV.w[i] + fMPY3216SS(VuV.w[i], fGETHALF(1, VvV.w[i]))) >> 14) + 0) >> 1))) |
| 1453 | |
| 1454 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyowh_rnd_sacc,"Vx32+=vmpyowh(Vu32,Vv32):<<1:rnd:sat:shift","Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift", |
| 1455 | "Vector by Vector Halfword Multiply", |
| 1456 | IV1DEAD() VxV.w[i] = fVSATW(((((VxV.w[i] + fMPY3216SS(VuV.w[i], fGETHALF(1, VvV.w[i]))) >> 14) + 1) >> 1))) |
| 1457 | |
| 1458 | /* For 32x32 integer / low half */ |
| 1459 | |
| 1460 | ITERATOR_INSN_MPY_SLOT(32,vmpyieoh,"Vd32.w=vmpyieo(Vu32.h,Vv32.h)","Odd/Even multiply for 32x32 low half", |
| 1461 | VdV.w[i] = (fGETHALF(0,VuV.w[i])*fGETHALF(1,VvV.w[i])) << 16) |
| 1462 | |
| 1463 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiewuh,"Vd32=vmpyiewuh(Vu32,Vv32)","Vd32.w=vmpyie(Vu32.w,Vv32.uh)", |
| 1464 | "Vector by Vector Word by Halfword Multiply", |
| 1465 | IV1DEAD() VdV.w[i] = fMPY3216SU(VuV.w[i], fGETUHALF(0, VvV.w[i])) ) |
| 1466 | |
| 1467 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiowh,"Vd32=vmpyiowh(Vu32,Vv32)","Vd32.w=vmpyio(Vu32.w,Vv32.h)", |
| 1468 | "Vector by Vector Word by Halfword Multiply", |
| 1469 | IV1DEAD() VdV.w[i] = fMPY3216SS(VuV.w[i], fGETHALF(1, VvV.w[i])) ) |
| 1470 | |
| 1471 | /* Add back these... */ |
| 1472 | |
| 1473 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiewh_acc,"Vx32+=vmpyiewh(Vu32,Vv32)","Vx32.w+=vmpyie(Vu32.w,Vv32.h)", |
| 1474 | "Vector by Vector Word by Halfword Multiply", |
| 1475 | VxV.w[i] = VxV.w[i] + fMPY3216SS(VuV.w[i], fGETHALF(0, VvV.w[i])) ) |
| 1476 | |
| 1477 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiewuh_acc,"Vx32+=vmpyiewuh(Vu32,Vv32)","Vx32.w+=vmpyie(Vu32.w,Vv32.uh)", |
| 1478 | "Vector by Vector Word by Halfword Multiply", |
| 1479 | VxV.w[i] = VxV.w[i] + fMPY3216SU(VuV.w[i], fGETUHALF(0, VvV.w[i])) ) |
| 1480 | |
| 1481 | |
| 1482 | |
| 1483 | |
| 1484 | |
| 1485 | |
| 1486 | |
| 1487 | /* Vector by Scalar */ |
| 1488 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyub,"Vdd32=vmpyub(Vu32,Rt32)","Vdd32.uh=vmpy(Vu32.ub,Rt32.ub)", |
| 1489 | "Vector absolute value of words", |
| 1490 | VddV.v[0].uh[i] = fMPY8UU(fGETUBYTE(0, VuV.uh[i]), fGETUBYTE((2*i+0)%4, RtV)); |
| 1491 | VddV.v[1].uh[i] = fMPY8UU(fGETUBYTE(1, VuV.uh[i]), fGETUBYTE((2*i+1)%4, RtV))) |
| 1492 | |
| 1493 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpyub_acc,"Vxx32+=vmpyub(Vu32,Rt32)","Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub)", |
| 1494 | "Vector absolute value of words", |
| 1495 | VxxV.v[0].uh[i] += fMPY8UU(fGETUBYTE(0, VuV.uh[i]), fGETUBYTE((2*i+0)%4, RtV)); |
| 1496 | VxxV.v[1].uh[i] += fMPY8UU(fGETUBYTE(1, VuV.uh[i]), fGETUBYTE((2*i+1)%4, RtV))) |
| 1497 | |
| 1498 | |
| 1499 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybus,"Vdd32=vmpybus(Vu32,Rt32)","Vdd32.h=vmpy(Vu32.ub,Rt32.b)", |
| 1500 | "Vector absolute value of words", |
| 1501 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0, VuV.uh[i]), fGETBYTE((2*i+0)%4, RtV)); |
| 1502 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1, VuV.uh[i]), fGETBYTE((2*i+1)%4, RtV))) |
| 1503 | |
| 1504 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpybus_acc,"Vxx32+=vmpybus(Vu32,Rt32)","Vxx32.h+=vmpy(Vu32.ub,Rt32.b)", |
| 1505 | "Vector absolute value of words", |
| 1506 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(0, VuV.uh[i]), fGETBYTE((2*i+0)%4, RtV)); |
| 1507 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(1, VuV.uh[i]), fGETBYTE((2*i+1)%4, RtV))) |
| 1508 | |
| 1509 | |
| 1510 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpabus,"Vdd32=vmpabus(Vuu32,Rt32)","Vdd32.h=vmpa(Vuu32.ub,Rt32.b)", |
| 1511 | "Vertical Byte Multiply", |
| 1512 | VddV.v[0].h[i] = fMPY8US(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETBYTE(0, RtV)) + fMPY16SS(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETBYTE(1, RtV)); |
| 1513 | VddV.v[1].h[i] = fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETBYTE(2, RtV)) + fMPY16SS(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETBYTE(3, RtV))) |
| 1514 | |
| 1515 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(16,vmpabus_acc,"Vxx32+=vmpabus(Vuu32,Rt32)","Vxx32.h+=vmpa(Vuu32.ub,Rt32.b)", |
| 1516 | "Vertical Byte Multiply", |
| 1517 | VxxV.v[0].h[i] += fMPY8US(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETBYTE(0, RtV)) + fMPY16SS(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETBYTE(1, RtV)); |
| 1518 | VxxV.v[1].h[i] += fMPY8US(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETBYTE(2, RtV)) + fMPY16SS(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETBYTE(3, RtV))) |
| 1519 | |
| 1520 | // V65 |
| 1521 | |
| 1522 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC_NOV1(16,vmpabuu,"Vdd32=vmpabuu(Vuu32,Rt32)","Vdd32.h=vmpa(Vuu32.ub,Rt32.ub)", |
| 1523 | "Vertical Byte Multiply", |
| 1524 | VddV.v[0].uh[i] = fMPY8UU(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETUBYTE(0, RtV)) + fMPY8UU(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETUBYTE(1, RtV)); |
| 1525 | VddV.v[1].uh[i] = fMPY8UU(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETUBYTE(2, RtV)) + fMPY8UU(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETUBYTE(3, RtV))) |
| 1526 | |
| 1527 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC_NOV1(16,vmpabuu_acc,"Vxx32+=vmpabuu(Vuu32,Rt32)","Vxx32.h+=vmpa(Vuu32.ub,Rt32.ub)", |
| 1528 | "Vertical Byte Multiply", |
| 1529 | VxxV.v[0].uh[i] += fMPY8UU(fGETUBYTE(0, VuuV.v[0].uh[i]), fGETUBYTE(0, RtV)) + fMPY8UU(fGETUBYTE(0, VuuV.v[1].uh[i]), fGETUBYTE(1, RtV)); |
| 1530 | VxxV.v[1].uh[i] += fMPY8UU(fGETUBYTE(1, VuuV.v[0].uh[i]), fGETUBYTE(2, RtV)) + fMPY8UU(fGETUBYTE(1, VuuV.v[1].uh[i]), fGETUBYTE(3, RtV))) |
| 1531 | |
| 1532 | |
| 1533 | |
| 1534 | |
| 1535 | /* Half by Byte */ |
| 1536 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpahb,"Vdd32=vmpahb(Vuu32,Rt32)","Vdd32.w=vmpa(Vuu32.h,Rt32.b)", |
| 1537 | "Vertical Byte Multiply", |
| 1538 | VddV.v[0].w[i] = fMPY16SS(fGETHALF(0, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(0, RtV))) + fMPY16SS(fGETHALF(0, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(1, RtV))); |
| 1539 | VddV.v[1].w[i] = fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(2, RtV))) + fMPY16SS(fGETHALF(1, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(3, RtV)))) |
| 1540 | |
| 1541 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpahb_acc,"Vxx32+=vmpahb(Vuu32,Rt32)","Vxx32.w+=vmpa(Vuu32.h,Rt32.b)", |
| 1542 | "Vertical Byte Multiply", |
| 1543 | VxxV.v[0].w[i] += fMPY16SS(fGETHALF(0, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(0, RtV))) + fMPY16SS(fGETHALF(0, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(1, RtV))); |
| 1544 | VxxV.v[1].w[i] += fMPY16SS(fGETHALF(1, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(2, RtV))) + fMPY16SS(fGETHALF(1, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(3, RtV)))) |
| 1545 | |
| 1546 | /* Half by Byte */ |
| 1547 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpauhb,"Vdd32=vmpauhb(Vuu32,Rt32)","Vdd32.w=vmpa(Vuu32.uh,Rt32.b)", |
| 1548 | "Vertical Byte Multiply", |
| 1549 | VddV.v[0].w[i] = fMPY16US(fGETUHALF(0, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(0, RtV))) + fMPY16US(fGETUHALF(0, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(1, RtV))); |
| 1550 | VddV.v[1].w[i] = fMPY16US(fGETUHALF(1, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(2, RtV))) + fMPY16US(fGETUHALF(1, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(3, RtV)))) |
| 1551 | |
| 1552 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpauhb_acc,"Vxx32+=vmpauhb(Vuu32,Rt32)","Vxx32.w+=vmpa(Vuu32.uh,Rt32.b)", |
| 1553 | "Vertical Byte Multiply", |
| 1554 | VxxV.v[0].w[i] += fMPY16US(fGETUHALF(0, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(0, RtV))) + fMPY16US(fGETUHALF(0, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(1, RtV))); |
| 1555 | VxxV.v[1].w[i] += fMPY16US(fGETUHALF(1, VuuV.v[0].w[i]), fSE8_16(fGETBYTE(2, RtV))) + fMPY16US(fGETUHALF(1, VuuV.v[1].w[i]), fSE8_16(fGETBYTE(3, RtV)))) |
| 1556 | |
| 1557 | |
| 1558 | |
| 1559 | |
| 1560 | |
| 1561 | |
| 1562 | |
| 1563 | /* Half by Half */ |
| 1564 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyh,"Vdd32=vmpyh(Vu32,Rt32)","Vdd32.w=vmpy(Vu32.h,Rt32.h)", |
| 1565 | "Vector absolute value of words", |
| 1566 | VddV.v[0].w[i] = fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, RtV)); |
| 1567 | VddV.v[1].w[i] = fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, RtV))) |
| 1568 | |
| 1569 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC_NOV1(32,vmpyh_acc,"Vxx32+=vmpyh(Vu32,Rt32)","Vxx32.w+=vmpy(Vu32.h,Rt32.h)", |
| 1570 | "Vector even halfwords with scalar lower halfword multiply with shift and sat32", |
| 1571 | VxxV.v[0].w[i] = fCAST8s(VxxV.v[0].w[i]) + fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, RtV)); |
| 1572 | VxxV.v[1].w[i] = fCAST8s(VxxV.v[1].w[i]) + fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, RtV))) |
| 1573 | |
| 1574 | |
| 1575 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhsat_acc,"Vxx32+=vmpyh(Vu32,Rt32):sat","Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat", |
| 1576 | "Vector even halfwords with scalar lower halfword multiply with shift and sat32", |
| 1577 | VxxV.v[0].w[i] = fVSATW(fCAST8s(VxxV.v[0].w[i]) + fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, RtV))); |
| 1578 | VxxV.v[1].w[i] = fVSATW(fCAST8s(VxxV.v[1].w[i]) + fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, RtV)))) |
| 1579 | |
| 1580 | |
| 1581 | |
| 1582 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhss,"Vd32=vmpyh(Vu32,Rt32):<<1:sat","Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat", |
| 1583 | "Vector halfword by halfword multiply, shift by 1, and take upper 16 msb", |
| 1584 | fSETHALF(0,VdV.w[i],fVSATH(fGETHALF(1,fVSAT((fMPY16SS(fGETHALF(0,VuV.w[i]),fGETHALF(0,RtV))<<1))))); |
| 1585 | fSETHALF(1,VdV.w[i],fVSATH(fGETHALF(1,fVSAT((fMPY16SS(fGETHALF(1,VuV.w[i]),fGETHALF(1,RtV))<<1))))); |
| 1586 | ) |
| 1587 | |
| 1588 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyhsrs,"Vd32=vmpyh(Vu32,Rt32):<<1:rnd:sat","Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat", |
| 1589 | "Vector halfword with scalar halfword multiply with round, shift, and sat16", |
| 1590 | fSETHALF(0,VdV.w[i],fVSATH(fGETHALF(1,fVSAT(fROUND((fMPY16SS(fGETHALF(0,VuV.w[i]),fGETHALF(0,RtV))<<1)))))); |
| 1591 | fSETHALF(1,VdV.w[i],fVSATH(fGETHALF(1,fVSAT(fROUND((fMPY16SS(fGETHALF(1,VuV.w[i]),fGETHALF(1,RtV))<<1)))))); |
| 1592 | ) |
| 1593 | |
| 1594 | |
| 1595 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyuh,"Vdd32=vmpyuh(Vu32,Rt32)","Vdd32.uw=vmpy(Vu32.uh,Rt32.uh)", |
| 1596 | "Vector even halfword unsigned multiply by scalar", |
| 1597 | VddV.v[0].uw[i] = fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV)); |
| 1598 | VddV.v[1].uw[i] = fMPY16UU(fGETUHALF(1, VuV.uw[i]),fGETUHALF(1,RtV))) |
| 1599 | |
| 1600 | |
| 1601 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyuh_acc,"Vxx32+=vmpyuh(Vu32,Rt32)","Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh)", |
| 1602 | "Vector even halfword unsigned multiply by scalar", |
| 1603 | VxxV.v[0].uw[i] += fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV)); |
| 1604 | VxxV.v[1].uw[i] += fMPY16UU(fGETUHALF(1, VuV.uw[i]),fGETUHALF(1,RtV))) |
| 1605 | |
| 1606 | |
| 1607 | |
| 1608 | |
| 1609 | /******************************************** |
| 1610 | * HALF BY BYTE |
| 1611 | ********************************************/ |
| 1612 | ITERATOR_INSN2_MPY_SLOT(16,vmpyihb,"Vd32=vmpyihb(Vu32,Rt32)","Vd32.h=vmpyi(Vu32.h,Rt32.b)", |
| 1613 | "Vector word by byte multiply, keep lower result", |
| 1614 | VdV.h[i] = fMPY16SS(VuV.h[i], fGETBYTE(i % 4, RtV) )) |
| 1615 | |
| 1616 | ITERATOR_INSN2_MPY_SLOT(16,vmpyihb_acc,"Vx32+=vmpyihb(Vu32,Rt32)","Vx32.h+=vmpyi(Vu32.h,Rt32.b)", |
| 1617 | "Vector word by byte multiply, keep lower result", |
| 1618 | VxV.h[i] += fMPY16SS(VuV.h[i], fGETBYTE(i % 4, RtV) )) |
| 1619 | |
| 1620 | |
| 1621 | /******************************************** |
| 1622 | * WORD BY BYTE |
| 1623 | ********************************************/ |
| 1624 | ITERATOR_INSN2_MPY_SLOT(32,vmpyiwb,"Vd32=vmpyiwb(Vu32,Rt32)","Vd32.w=vmpyi(Vu32.w,Rt32.b)", |
| 1625 | "Vector word by byte multiply, keep lower result", |
| 1626 | VdV.w[i] = fMPY32SS(VuV.w[i], fGETBYTE(i % 4, RtV) )) |
| 1627 | |
| 1628 | ITERATOR_INSN2_MPY_SLOT(32,vmpyiwb_acc,"Vx32+=vmpyiwb(Vu32,Rt32)","Vx32.w+=vmpyi(Vu32.w,Rt32.b)", |
| 1629 | "Vector word by byte multiply, keep lower result", |
| 1630 | VxV.w[i] += fMPY32SS(VuV.w[i], fGETBYTE(i % 4, RtV) )) |
| 1631 | |
| 1632 | ITERATOR_INSN2_MPY_SLOT(32,vmpyiwub,"Vd32=vmpyiwub(Vu32,Rt32)","Vd32.w=vmpyi(Vu32.w,Rt32.ub)", |
| 1633 | "Vector word by byte multiply, keep lower result", |
| 1634 | VdV.w[i] = fMPY32SS(VuV.w[i], fGETUBYTE(i % 4, RtV) )) |
| 1635 | |
| 1636 | ITERATOR_INSN2_MPY_SLOT(32,vmpyiwub_acc,"Vx32+=vmpyiwub(Vu32,Rt32)","Vx32.w+=vmpyi(Vu32.w,Rt32.ub)", |
| 1637 | "Vector word by byte multiply, keep lower result", |
| 1638 | VxV.w[i] += fMPY32SS(VuV.w[i], fGETUBYTE(i % 4, RtV) )) |
| 1639 | |
| 1640 | |
| 1641 | /******************************************** |
| 1642 | * WORD BY HALF |
| 1643 | ********************************************/ |
| 1644 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiwh,"Vd32=vmpyiwh(Vu32,Rt32)","Vd32.w=vmpyi(Vu32.w,Rt32.h)", |
| 1645 | "Vector word by byte multiply, keep lower result", |
| 1646 | VdV.w[i] = fMPY32SS(VuV.w[i], fGETHALF(i % 2, RtV))) |
| 1647 | |
| 1648 | ITERATOR_INSN2_MPY_SLOT_DOUBLE_VEC(32,vmpyiwh_acc,"Vx32+=vmpyiwh(Vu32,Rt32)","Vx32.w+=vmpyi(Vu32.w,Rt32.h)", |
| 1649 | "Vector word by byte multiply, keep lower result", |
| 1650 | VxV.w[i] += fMPY32SS(VuV.w[i], fGETHALF(i % 2, RtV))) |
| 1651 | |
| 1652 | |
| 1653 | |
| 1654 | |
| 1655 | |
| 1656 | |
| 1657 | |
| 1658 | |
| 1659 | |
| 1660 | |
| 1661 | |
| 1662 | |
| 1663 | |
| 1664 | |
| 1665 | |
| 1666 | |
| 1667 | |
| 1668 | |
| 1669 | |
| 1670 | /************************************************************************** |
| 1671 | * MMVECTOR LOGICAL OPERATIONS |
| 1672 | * ************************************************************************/ |
| 1673 | ITERATOR_INSN_ANY_SLOT(16,vand,"Vd32=vand(Vu32,Vv32)", "Vector Logical And", VdV.uh[i] = VuV.uh[i] & VvV.h[i]) |
| 1674 | ITERATOR_INSN_ANY_SLOT(16,vor, "Vd32=vor(Vu32,Vv32)", "Vector Logical Or", VdV.uh[i] = VuV.uh[i] | VvV.h[i]) |
| 1675 | ITERATOR_INSN_ANY_SLOT(16,vxor,"Vd32=vxor(Vu32,Vv32)", "Vector Logical XOR", VdV.uh[i] = VuV.uh[i] ^ VvV.h[i]) |
| 1676 | ITERATOR_INSN_ANY_SLOT(16,vnot,"Vd32=vnot(Vu32)", "Vector Logical NOT", VdV.uh[i] = ~VuV.uh[i]) |
| 1677 | |
| 1678 | |
| 1679 | |
| 1680 | |
| 1681 | |
| 1682 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandqrt, |
| 1683 | "Vd32.ub=vand(Qu4.ub,Rt32.ub)", "Vd32=vand(Qu4,Rt32)", "Insert Predicate into Vector", |
| 1684 | VdV.ub[i] = fGETQBIT(QuV,i) ? fGETUBYTE(i % 4, RtV) : 0) |
| 1685 | |
| 1686 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandqrt_acc, |
| 1687 | "Vx32.ub|=vand(Qu4.ub,Rt32.ub)", "Vx32|=vand(Qu4,Rt32)", "Insert Predicate into Vector", |
| 1688 | VxV.ub[i] |= (fGETQBIT(QuV,i)) ? fGETUBYTE(i % 4, RtV) : 0) |
| 1689 | |
| 1690 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandnqrt, |
| 1691 | "Vd32.ub=vand(!Qu4.ub,Rt32.ub)", "Vd32=vand(!Qu4,Rt32)", "Insert Predicate into Vector", |
| 1692 | VdV.ub[i] = !fGETQBIT(QuV,i) ? fGETUBYTE(i % 4, RtV) : 0) |
| 1693 | |
| 1694 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandnqrt_acc, |
| 1695 | "Vx32.ub|=vand(!Qu4.ub,Rt32.ub)", "Vx32|=vand(!Qu4,Rt32)", "Insert Predicate into Vector", |
| 1696 | VxV.ub[i] |= !(fGETQBIT(QuV,i)) ? fGETUBYTE(i % 4, RtV) : 0) |
| 1697 | |
| 1698 | |
| 1699 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandvrt, |
| 1700 | "Qd4.ub=vand(Vu32.ub,Rt32.ub)", "Qd4=vand(Vu32,Rt32)", "Insert into Predicate", |
| 1701 | fSETQBIT(QdV,i,((VuV.ub[i] & fGETUBYTE(i % 4, RtV)) != 0) ? 1 : 0)) |
| 1702 | |
| 1703 | ITERATOR_INSN2_MPY_SLOT_LATE(8, vandvrt_acc, |
| 1704 | "Qx4.ub|=vand(Vu32.ub,Rt32.ub)", "Qx4|=vand(Vu32,Rt32)", "Insert into Predicate ", |
| 1705 | fSETQBIT(QxV,i,fGETQBIT(QxV,i)|(((VuV.ub[i] & fGETUBYTE(i % 4, RtV)) != 0) ? 1 : 0))) |
| 1706 | |
| 1707 | ITERATOR_INSN_ANY_SLOT(8,vandvqv,"Vd32=vand(Qv4,Vu32)","Mask off bytes", |
| 1708 | VdV.b[i] = fGETQBIT(QvV,i) ? VuV.b[i] : 0) |
| 1709 | ITERATOR_INSN_ANY_SLOT(8,vandvnqv,"Vd32=vand(!Qv4,Vu32)","Mask off bytes", |
| 1710 | VdV.b[i] = !fGETQBIT(QvV,i) ? VuV.b[i] : 0) |
| 1711 | |
| 1712 | |
| 1713 | /*************************************************** |
| 1714 | * Compare Vector with Vector |
| 1715 | ***************************************************/ |
| 1716 | #define VCMP(DEST, ASRC, ASRCOP, CMP, N, SRC, MASK, WIDTH) \ |
| 1717 | { \ |
| 1718 | for(fHIDE(int) i = 0; i < fVBYTES(); i += WIDTH) { \ |
| 1719 | fSETQBITS(DEST,WIDTH,MASK,i,ASRC ASRCOP ((VuV.SRC[i/WIDTH] CMP VvV.SRC[i/WIDTH]) ? MASK : 0)); \ |
| 1720 | } \ |
| 1721 | } |
| 1722 | |
| 1723 | |
| 1724 | #define MMVEC_CMPGT(TYPE,TYPE2,TYPE3,DESCR,N,MASK,WIDTH,SRC) \ |
| 1725 | EXTINSN(V6_vgt##TYPE, "Qd4=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than", \ |
| 1726 | VCMP(QdV, , , >, N, SRC, MASK, WIDTH)) \ |
| 1727 | EXTINSN(V6_vgt##TYPE##_and, "Qx4&=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-and", \ |
| 1728 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), &, >, N, SRC, MASK, WIDTH)) \ |
| 1729 | EXTINSN(V6_vgt##TYPE##_or, "Qx4|=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-or", \ |
| 1730 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), |, >, N, SRC, MASK, WIDTH)) \ |
| 1731 | EXTINSN(V6_vgt##TYPE##_xor, "Qx4^=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-xor", \ |
| 1732 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), ^, >, N, SRC, MASK, WIDTH)) |
| 1733 | |
| 1734 | #define MMVEC_CMP(TYPE,TYPE2,TYPE3,DESCR,N,MASK, WIDTH, SRC)\ |
| 1735 | MMVEC_CMPGT(TYPE,TYPE2,TYPE3,DESCR,N,MASK,WIDTH,SRC) \ |
| 1736 | EXTINSN(V6_veq##TYPE, "Qd4=vcmp.eq(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equal to", \ |
| 1737 | VCMP(QdV, , , ==, N, SRC, MASK, WIDTH)) \ |
| 1738 | EXTINSN(V6_veq##TYPE##_and, "Qx4&=vcmp.eq(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-and", \ |
| 1739 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), &, ==, N, SRC, MASK, WIDTH)) \ |
| 1740 | EXTINSN(V6_veq##TYPE##_or, "Qx4|=vcmp.eq(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-or", \ |
| 1741 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), |, ==, N, SRC, MASK, WIDTH)) \ |
| 1742 | EXTINSN(V6_veq##TYPE##_xor, "Qx4^=vcmp.eq(Vu32." TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-xor", \ |
| 1743 | VCMP(QxV, fGETQBITS(QxV,WIDTH,MASK,i), ^, ==, N, SRC, MASK, WIDTH)) |
| 1744 | |
| 1745 | |
| 1746 | MMVEC_CMP(w,"w","","Vector Word Compare ", fVELEM(32), 0xF, 4, w) |
| 1747 | MMVEC_CMP(h,"h","","Vector Half Compare ", fVELEM(16), 0x3, 2, h) |
| 1748 | MMVEC_CMP(b,"b","","Vector Half Compare ", fVELEM(8), 0x1, 1, b) |
| 1749 | MMVEC_CMPGT(uw,"uw","","Vector Unsigned Half Compare ", fVELEM(32), 0xF, 4,uw) |
| 1750 | MMVEC_CMPGT(uh,"uh","","Vector Unsigned Half Compare ", fVELEM(16), 0x3, 2,uh) |
| 1751 | MMVEC_CMPGT(ub,"ub","","Vector Unsigned Byte Compare ", fVELEM(8), 0x1, 1,ub) |
| 1752 | |
| 1753 | /*************************************************** |
| 1754 | * Predicate Operations |
| 1755 | ***************************************************/ |
| 1756 | |
| 1757 | EXTINSN(V6_pred_scalar2, "Qd4=vsetq(Rt32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), "Set Vector Predicate ", |
| 1758 | { |
| 1759 | fHIDE(int i;) |
| 1760 | for(i = 0; i < fVBYTES(); i++) fSETQBIT(QdV,i,(i < (RtV & (fVBYTES()-1))) ? 1 : 0); |
| 1761 | }) |
| 1762 | |
| 1763 | EXTINSN(V6_pred_scalar2v2, "Qd4=vsetq2(Rt32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), "Set Vector Predicate ", |
| 1764 | { |
| 1765 | fHIDE(int i;) |
| 1766 | for(i = 0; i < fVBYTES(); i++) fSETQBIT(QdV,i,(i <= ((RtV-1) & (fVBYTES()-1))) ? 1 : 0); |
| 1767 | }) |
| 1768 | |
| 1769 | |
| 1770 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, shuffeqw, "Qd4.h=vshuffe(Qs4.w,Qt4.w)","Shrink Predicate", fSETQBIT(QdV,i, (i & 2) ? fGETQBIT(QsV,i-2) : fGETQBIT(QtV,i) ) ) |
| 1771 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, shuffeqh, "Qd4.b=vshuffe(Qs4.h,Qt4.h)","Shrink Predicate", fSETQBIT(QdV,i, (i & 1) ? fGETQBIT(QsV,i-1) : fGETQBIT(QtV,i) ) ) |
| 1772 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, pred_or, "Qd4=or(Qs4,Qt4)","Vector Predicate Or", fSETQBIT(QdV,i,fGETQBIT(QsV,i) || fGETQBIT(QtV,i) ) ) |
| 1773 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, pred_and, "Qd4=and(Qs4,Qt4)","Vector Predicate And", fSETQBIT(QdV,i,fGETQBIT(QsV,i) && fGETQBIT(QtV,i) ) ) |
| 1774 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, pred_xor, "Qd4=xor(Qs4,Qt4)","Vector Predicate Xor", fSETQBIT(QdV,i,fGETQBIT(QsV,i) ^ fGETQBIT(QtV,i) ) ) |
| 1775 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, pred_or_n, "Qd4=or(Qs4,!Qt4)","Vector Predicate Or with not", fSETQBIT(QdV,i,fGETQBIT(QsV,i) || !fGETQBIT(QtV,i) ) ) |
| 1776 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8, pred_and_n, "Qd4=and(Qs4,!Qt4)","Vector Predicate And with not", fSETQBIT(QdV,i,fGETQBIT(QsV,i) && !fGETQBIT(QtV,i) ) ) |
| 1777 | ITERATOR_INSN_ANY_SLOT(8, pred_not, "Qd4=not(Qs4)","Vector Predicate Not", fSETQBIT(QdV,i,!fGETQBIT(QsV,i) ) ) |
| 1778 | |
| 1779 | |
| 1780 | |
| 1781 | EXTINSN(V6_vcmov, "if (Ps4) Vd32=Vu32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), "Conditional Mov", |
| 1782 | { |
| 1783 | if (fLSBOLD(PsV)) { |
| 1784 | fHIDE(int i;) |
| 1785 | fVFOREACH(8, i) { |
| 1786 | VdV.ub[i] = VuV.ub[i]; |
| 1787 | } |
| 1788 | } else {CANCEL;} |
| 1789 | }) |
| 1790 | |
| 1791 | EXTINSN(V6_vncmov, "if (!Ps4) Vd32=Vu32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), "Conditional Mov", |
| 1792 | { |
| 1793 | if (fLSBOLDNOT(PsV)) { |
| 1794 | fHIDE(int i;) |
| 1795 | fVFOREACH(8, i) { |
| 1796 | VdV.ub[i] = VuV.ub[i]; |
| 1797 | } |
| 1798 | } else {CANCEL;} |
| 1799 | }) |
| 1800 | |
| 1801 | EXTINSN(V6_vccombine, "if (Ps4) Vdd32=vcombine(Vu32,Vv32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA_DV), "Conditional Combine", |
| 1802 | { |
| 1803 | if (fLSBOLD(PsV)) { |
| 1804 | fHIDE(int i;) |
| 1805 | fVFOREACH(8, i) { |
| 1806 | VddV.v[0].ub[i] = VvV.ub[i]; |
| 1807 | VddV.v[1].ub[i] = VuV.ub[i]; |
| 1808 | } |
| 1809 | } else {CANCEL;} |
| 1810 | }) |
| 1811 | |
| 1812 | EXTINSN(V6_vnccombine, "if (!Ps4) Vdd32=vcombine(Vu32,Vv32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA_DV), "Conditional Combine", |
| 1813 | { |
| 1814 | if (fLSBOLDNOT(PsV)) { |
| 1815 | fHIDE(int i;) |
| 1816 | fVFOREACH(8, i) { |
| 1817 | VddV.v[0].ub[i] = VvV.ub[i]; |
| 1818 | VddV.v[1].ub[i] = VuV.ub[i]; |
| 1819 | } |
| 1820 | } else {CANCEL;} |
| 1821 | }) |
| 1822 | |
| 1823 | |
| 1824 | |
| 1825 | ITERATOR_INSN_ANY_SLOT(8,vmux,"Vd32=vmux(Qt4,Vu32,Vv32)", |
| 1826 | "Vector Select Element 8-bit", |
| 1827 | VdV.ub[i] = fGETQBIT(QtV,i) ? VuV.ub[i] : VvV.ub[i]) |
| 1828 | |
| 1829 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8,vswap,"Vdd32=vswap(Qt4,Vu32,Vv32)", |
| 1830 | "Vector Swap Element 8-bit", |
| 1831 | VddV.v[0].ub[i] = fGETQBIT(QtV,i) ? VuV.ub[i] : VvV.ub[i]; |
| 1832 | VddV.v[1].ub[i] = !fGETQBIT(QtV,i) ? VuV.ub[i] : VvV.ub[i]) |
| 1833 | |
| 1834 | |
| 1835 | /*************************************************************************** |
| 1836 | * |
| 1837 | * MMVECTOR SORTING |
| 1838 | * |
| 1839 | ****************************************************************************/ |
| 1840 | |
| 1841 | #define MMVEC_SORT(TYPE,TYPE2,DESCR,ELEMENTSIZE,SRC)\ |
| 1842 | ITERATOR_INSN2_ANY_SLOT(ELEMENTSIZE,vmax##TYPE, "Vd32=vmax" TYPE2 "(Vu32,Vv32)", "Vd32."#SRC"=vmax(Vu32."#SRC",Vv32."#SRC")", "Vector " DESCR " max", VdV.SRC[i] = (VuV.SRC[i] > VvV.SRC[i]) ? VuV.SRC[i] : VvV.SRC[i]) \ |
| 1843 | ITERATOR_INSN2_ANY_SLOT(ELEMENTSIZE,vmin##TYPE, "Vd32=vmin" TYPE2 "(Vu32,Vv32)", "Vd32."#SRC"=vmin(Vu32."#SRC",Vv32."#SRC")", "Vector " DESCR " min", VdV.SRC[i] = (VuV.SRC[i] < VvV.SRC[i]) ? VuV.SRC[i] : VvV.SRC[i]) |
| 1844 | |
| 1845 | MMVEC_SORT(b,"b", "signed byte", 8, b) |
| 1846 | MMVEC_SORT(ub,"ub", "unsigned byte", 8, ub) |
| 1847 | MMVEC_SORT(uh,"uh", "unsigned halfword",16, uh) |
| 1848 | MMVEC_SORT(h, "h", "halfword", 16, h) |
| 1849 | MMVEC_SORT(w, "w", "word", 32, w) |
| 1850 | |
| 1851 | |
| 1852 | |
| 1853 | |
| 1854 | |
| 1855 | |
| 1856 | |
| 1857 | |
| 1858 | |
| 1859 | /************************************************************* |
| 1860 | * SHUFFLES |
| 1861 | ****************************************************************/ |
| 1862 | |
| 1863 | ITERATOR_INSN2_ANY_SLOT(16,vsathub,"Vd32=vsathub(Vu32,Vv32)","Vd32.ub=vsat(Vu32.h,Vv32.h)", |
| 1864 | "Saturate and pack 32 halfwords to 32 unsigned bytes, and interleave them", |
| 1865 | fSETBYTE(0, VdV.uh[i], fVSATUB(VvV.h[i])); |
| 1866 | fSETBYTE(1, VdV.uh[i], fVSATUB(VuV.h[i]))) |
| 1867 | |
| 1868 | ITERATOR_INSN2_ANY_SLOT(32,vsatwh,"Vd32=vsatwh(Vu32,Vv32)","Vd32.h=vsat(Vu32.w,Vv32.w)", |
| 1869 | "Saturate and pack 16 words to 16 halfwords, and interleave them", |
| 1870 | fSETHALF(0, VdV.w[i], fVSATH(VvV.w[i])); |
| 1871 | fSETHALF(1, VdV.w[i], fVSATH(VuV.w[i]))) |
| 1872 | |
| 1873 | ITERATOR_INSN2_ANY_SLOT(32,vsatuwuh,"Vd32=vsatuwuh(Vu32,Vv32)","Vd32.uh=vsat(Vu32.uw,Vv32.uw)", |
| 1874 | "Saturate and pack 16 words to 16 halfwords, and interleave them", |
| 1875 | fSETHALF(0, VdV.w[i], fVSATUH(VvV.uw[i])); |
| 1876 | fSETHALF(1, VdV.w[i], fVSATUH(VuV.uw[i]))) |
| 1877 | |
| 1878 | ITERATOR_INSN2_ANY_SLOT(16,vshuffeb,"Vd32=vshuffeb(Vu32,Vv32)","Vd32.b=vshuffe(Vu32.b,Vv32.b)", |
| 1879 | "Shuffle half words with in a lane", |
| 1880 | fSETBYTE(0, VdV.uh[i], fGETUBYTE(0, VvV.uh[i])); |
| 1881 | fSETBYTE(1, VdV.uh[i], fGETUBYTE(0, VuV.uh[i]))) |
| 1882 | |
| 1883 | ITERATOR_INSN2_ANY_SLOT(16,vshuffob,"Vd32=vshuffob(Vu32,Vv32)","Vd32.b=vshuffo(Vu32.b,Vv32.b)", |
| 1884 | "Shuffle half words with in a lane", |
| 1885 | fSETBYTE(0, VdV.uh[i], fGETUBYTE(1, VvV.uh[i])); |
| 1886 | fSETBYTE(1, VdV.uh[i], fGETUBYTE(1, VuV.uh[i]))) |
| 1887 | |
| 1888 | ITERATOR_INSN2_ANY_SLOT(32,vshufeh,"Vd32=vshuffeh(Vu32,Vv32)","Vd32.h=vshuffe(Vu32.h,Vv32.h)", |
| 1889 | "Shuffle half words with in a lane", |
| 1890 | fSETHALF(0, VdV.uw[i], fGETUHALF(0, VvV.uw[i])); |
| 1891 | fSETHALF(1, VdV.uw[i], fGETUHALF(0, VuV.uw[i]))) |
| 1892 | |
| 1893 | ITERATOR_INSN2_ANY_SLOT(32,vshufoh,"Vd32=vshuffoh(Vu32,Vv32)","Vd32.h=vshuffo(Vu32.h,Vv32.h)", |
| 1894 | "Shuffle half words with in a lane", |
| 1895 | fSETHALF(0, VdV.uw[i], fGETUHALF(1, VvV.uw[i])); |
| 1896 | fSETHALF(1, VdV.uw[i], fGETUHALF(1, VuV.uw[i]))) |
| 1897 | |
| 1898 | |
| 1899 | |
| 1900 | |
| 1901 | /************************************************************************** |
| 1902 | * Double Vector Shuffles |
| 1903 | **************************************************************************/ |
| 1904 | |
| 1905 | EXTINSN(V6_vshuff, "vshuff(Vy32,Vx32,Rt32)", |
| 1906 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), |
| 1907 | "2x2->2x2 transpose, for multiple data sizes, inplace", |
| 1908 | { |
| 1909 | fHIDE(int offset;) |
| 1910 | for (offset=1; offset<fVBYTES(); offset<<=1) { |
| 1911 | if ( RtV & offset) { |
| 1912 | fHIDE(int k;) \ |
| 1913 | fVFOREACH(8, k) {\ |
| 1914 | if (!( k & offset)) { |
| 1915 | fSWAPB(VyV.ub[k], VxV.ub[k+offset]); |
| 1916 | } |
| 1917 | } |
| 1918 | } |
| 1919 | } |
| 1920 | }) |
| 1921 | |
| 1922 | EXTINSN(V6_vshuffvdd, "Vdd32=vshuff(Vu32,Vv32,Rt8)", |
| 1923 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), |
| 1924 | "2x2->2x2 transpose for multiple data sizes", |
| 1925 | { |
| 1926 | fHIDE(int offset;) |
| 1927 | VddV.v[0] = VvV; |
| 1928 | VddV.v[1] = VuV; |
| 1929 | for (offset=1; offset<fVBYTES(); offset<<=1) { |
| 1930 | if ( RtV & offset) { |
| 1931 | fHIDE(int k;) \ |
| 1932 | fVFOREACH(8, k) {\ |
| 1933 | if (!( k & offset)) { |
| 1934 | fSWAPB(VddV.v[1].ub[k], VddV.v[0].ub[k+offset]); |
| 1935 | } |
| 1936 | } |
| 1937 | } |
| 1938 | } |
| 1939 | }) |
| 1940 | |
| 1941 | EXTINSN(V6_vdeal, "vdeal(Vy32,Vx32,Rt32)", |
| 1942 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), |
| 1943 | " vector - vector deal - or deinterleave, for multiple data sizes, inplace", |
| 1944 | { |
| 1945 | fHIDE(int offset;) |
| 1946 | for (offset=fVBYTES()>>1; offset>0; offset>>=1) { |
| 1947 | if ( RtV & offset) { |
| 1948 | fHIDE(int k;) \ |
| 1949 | fVFOREACH(8, k) {\ |
| 1950 | if (!( k & offset)) { |
| 1951 | fSWAPB(VyV.ub[k], VxV.ub[k+offset]); |
| 1952 | } |
| 1953 | } |
| 1954 | } |
| 1955 | } |
| 1956 | }) |
| 1957 | |
| 1958 | EXTINSN(V6_vdealvdd, "Vdd32=vdeal(Vu32,Vv32,Rt8)", |
| 1959 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP_VS), |
| 1960 | " vector - vector deal - or deinterleave, for multiple data sizes", |
| 1961 | { |
| 1962 | fHIDE(int offset;) |
| 1963 | VddV.v[0] = VvV; |
| 1964 | VddV.v[1] = VuV; |
| 1965 | for (offset=fVBYTES()>>1; offset>0; offset>>=1) { |
| 1966 | if ( RtV & offset) { |
| 1967 | fHIDE(int k;) \ |
| 1968 | fVFOREACH(8, k) {\ |
| 1969 | if (!( k & offset)) { |
| 1970 | fSWAPB(VddV.v[1].ub[k], VddV.v[0].ub[k+offset]); |
| 1971 | } |
| 1972 | } |
| 1973 | } |
| 1974 | } |
| 1975 | }) |
| 1976 | |
| 1977 | /**************************************************************************/ |
| 1978 | |
| 1979 | |
| 1980 | |
| 1981 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(32,vshufoeh,"Vdd32=vshuffoeh(Vu32,Vv32)","Vdd32.h=vshuffoe(Vu32.h,Vv32.h)", |
| 1982 | "Vector Shuffle half words", |
| 1983 | fSETHALF(0, VddV.v[0].uw[i], fGETUHALF(0, VvV.uw[i])); |
| 1984 | fSETHALF(1, VddV.v[0].uw[i], fGETUHALF(0, VuV.uw[i])); |
| 1985 | fSETHALF(0, VddV.v[1].uw[i], fGETUHALF(1, VvV.uw[i])); |
| 1986 | fSETHALF(1, VddV.v[1].uw[i], fGETUHALF(1, VuV.uw[i]))) |
| 1987 | |
| 1988 | ITERATOR_INSN2_ANY_SLOT_DOUBLE_VEC(16,vshufoeb,"Vdd32=vshuffoeb(Vu32,Vv32)","Vdd32.b=vshuffoe(Vu32.b,Vv32.b)", |
| 1989 | "Vector Shuffle bytes", |
| 1990 | fSETBYTE(0, VddV.v[0].uh[i], fGETUBYTE(0, VvV.uh[i])); |
| 1991 | fSETBYTE(1, VddV.v[0].uh[i], fGETUBYTE(0, VuV.uh[i])); |
| 1992 | fSETBYTE(0, VddV.v[1].uh[i], fGETUBYTE(1, VvV.uh[i])); |
| 1993 | fSETBYTE(1, VddV.v[1].uh[i], fGETUBYTE(1, VuV.uh[i]))) |
| 1994 | |
| 1995 | |
| 1996 | /*************************************************************** |
| 1997 | * Deal |
| 1998 | ***************************************************************/ |
| 1999 | |
| 2000 | ITERATOR_INSN2_PERMUTE_SLOT(32, vdealh, "Vd32=vdealh(Vu32)", "Vd32.h=vdeal(Vu32.h)", |
| 2001 | "Deal Halfwords", |
| 2002 | VdV.uh[i ] = fGETUHALF(0, VuV.uw[i]); |
| 2003 | VdV.uh[i+fVELEM(32)] = fGETUHALF(1, VuV.uw[i])) |
| 2004 | |
| 2005 | ITERATOR_INSN2_PERMUTE_SLOT(16, vdealb, "Vd32=vdealb(Vu32)", "Vd32.b=vdeal(Vu32.b)", |
| 2006 | "Deal Halfwords", |
| 2007 | VdV.ub[i ] = fGETUBYTE(0, VuV.uh[i]); |
| 2008 | VdV.ub[i+fVELEM(16)] = fGETUBYTE(1, VuV.uh[i])) |
| 2009 | |
| 2010 | ITERATOR_INSN2_PERMUTE_SLOT(32, vdealb4w, "Vd32=vdealb4w(Vu32,Vv32)", "Vd32.b=vdeale(Vu32.b,Vv32.b)", |
| 2011 | "Deal Two Vectors Bytes", |
| 2012 | VdV.ub[0+i ] = fGETUBYTE(0, VvV.uw[i]); |
| 2013 | VdV.ub[fVELEM(32)+i ] = fGETUBYTE(2, VvV.uw[i]); |
| 2014 | VdV.ub[2*fVELEM(32)+i] = fGETUBYTE(0, VuV.uw[i]); |
| 2015 | VdV.ub[3*fVELEM(32)+i] = fGETUBYTE(2, VuV.uw[i])) |
| 2016 | |
| 2017 | /*************************************************************** |
| 2018 | * shuffle |
| 2019 | ***************************************************************/ |
| 2020 | |
| 2021 | ITERATOR_INSN2_PERMUTE_SLOT(32, vshuffh, "Vd32=vshuffh(Vu32)", "Vd32.h=vshuff(Vu32.h)", |
| 2022 | "Deal Halfwords", |
| 2023 | fSETHALF(0, VdV.uw[i], VuV.uh[i]); |
| 2024 | fSETHALF(1, VdV.uw[i], VuV.uh[i+fVELEM(32)])) |
| 2025 | |
| 2026 | ITERATOR_INSN2_PERMUTE_SLOT(16, vshuffb, "Vd32=vshuffb(Vu32)", "Vd32.b=vshuff(Vu32.b)", |
| 2027 | "Deal Halfwords", |
| 2028 | fSETBYTE(0, VdV.uh[i], VuV.ub[i]); |
| 2029 | fSETBYTE(1, VdV.uh[i], VuV.ub[i+fVELEM(16)])) |
| 2030 | |
| 2031 | |
| 2032 | |
| 2033 | |
| 2034 | |
| 2035 | /*********************************************************** |
| 2036 | * INSERT AND EXTRACT |
| 2037 | *********************************************************/ |
| 2038 | EXTINSN(V6_extractw, "Rd32=vextract(Vu32,Rs32)", |
| 2039 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_MEMLIKE,A_RESTRICT_SLOT0ONLY), |
| 2040 | "Extract an element from a vector to scalar", |
| 2041 | fHIDE(warn("RdN=%d VuN=%d RsN=%d RsV=0x%08x widx=%d",RdN,VuN,RsN,RsV,((RsV & (fVBYTES()-1)) >> 2));) |
| 2042 | RdV = VuV.uw[ (RsV & (fVBYTES()-1)) >> 2]; |
| 2043 | fHIDE(warn("RdV=0x%08x",RdV);)) |
| 2044 | |
| 2045 | EXTINSN(V6_vinsertwr, "Vx32.w=vinsert(Rt32)", |
| 2046 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VX), |
| 2047 | "Insert Word Scalar into Vector", |
| 2048 | VxV.uw[0] = RtV;) |
| 2049 | |
| 2050 | |
| 2051 | |
| 2052 | |
| 2053 | ITERATOR_INSN_MPY_SLOT_LATE(32,lvsplatw, "Vd32=vsplat(Rt32)", "Replicates scalar across words in vector", VdV.uw[i] = RtV) |
| 2054 | |
| 2055 | ITERATOR_INSN_MPY_SLOT_LATE(16,lvsplath, "Vd32.h=vsplat(Rt32)", "Replicates scalar across halves in vector", VdV.uh[i] = RtV) |
| 2056 | |
| 2057 | ITERATOR_INSN_MPY_SLOT_LATE(8,lvsplatb, "Vd32.b=vsplat(Rt32)", "Replicates scalar across bytes in vector", VdV.ub[i] = RtV) |
| 2058 | |
| 2059 | |
| 2060 | ITERATOR_INSN_ANY_SLOT(32,vassign,"Vd32=Vu32","Copy a vector",VdV.w[i]=VuV.w[i]) |
| 2061 | |
| 2062 | |
| 2063 | ITERATOR_INSN_ANY_SLOT_DOUBLE_VEC(8,vcombine,"Vdd32=vcombine(Vu32,Vv32)", |
| 2064 | "Vector assign, Any two to Vector Pair", |
| 2065 | VddV.v[0].ub[i] = VvV.ub[i]; |
| 2066 | VddV.v[1].ub[i] = VuV.ub[i]) |
| 2067 | |
| 2068 | |
| 2069 | |
| 2070 | /////////////////////////////////////////////////////////////////////////// |
| 2071 | |
| 2072 | EXTINSN(V6_vcombine_tmp, "Vdd32.tmp=vcombine(Vu32,Vv32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_REMAP,A_CVI_TMP,A_NO_INTRINSIC), |
| 2073 | "Vector assign tmp, Any two to Vector Pair ", |
| 2074 | { |
| 2075 | fHIDE(int i;) |
| 2076 | fVFOREACH(8, i) { |
| 2077 | VddV.v[0].ub[i] = VvV.ub[i]; |
| 2078 | VddV.v[1].ub[i] = VuV.ub[i]; |
| 2079 | } |
| 2080 | }) |
| 2081 | |
| 2082 | EXTINSN(V6_vassign_tmp, "Vd32.tmp=Vu32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_REMAP,A_CVI_TMP,A_NO_INTRINSIC), |
| 2083 | "Vector assign tmp, Any two to Vector Pair ", |
| 2084 | { |
| 2085 | fHIDE(int i;) |
| 2086 | fVFOREACH(32, i) { |
| 2087 | VdV.w[i]=VuV.w[i]; |
| 2088 | } |
| 2089 | }) |
| 2090 | |
| 2091 | /********************************************************* |
| 2092 | * GENERAL PERMUTE NETWORKS |
| 2093 | *********************************************************/ |
| 2094 | |
| 2095 | |
| 2096 | EXTINSN(V6_vdelta, "Vd32=vdelta(Vu32,Vv32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), |
| 2097 | "Reverse Benes Butterfly network ", |
| 2098 | { |
| 2099 | fHIDE(int offset;) |
| 2100 | fHIDE(int k;) |
| 2101 | fHIDE(mmvector_t tmp;) |
| 2102 | tmp = VuV; |
| 2103 | for (offset=fVBYTES(); (offset>>=1)>0; ) { |
| 2104 | for (k = 0; k<fVBYTES(); k++) { |
| 2105 | VdV.ub[k] = (VvV.ub[k]&offset) ? tmp.ub[k^offset] : tmp.ub[k]; |
| 2106 | } |
| 2107 | for (k = 0; k<fVBYTES(); k++) { |
| 2108 | tmp.ub[k] = VdV.ub[k]; |
| 2109 | } |
| 2110 | } |
| 2111 | }) |
| 2112 | |
| 2113 | |
| 2114 | EXTINSN(V6_vrdelta, "Vd32=vrdelta(Vu32,Vv32)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VP), |
| 2115 | "Forward Benes Butterfly network ", |
| 2116 | { |
| 2117 | fHIDE(int offset;) |
| 2118 | fHIDE(int k;) |
| 2119 | fHIDE(mmvector_t tmp;) |
| 2120 | tmp = VuV; |
| 2121 | for (offset=1; offset<fVBYTES(); offset<<=1){ |
| 2122 | for (k = 0; k<fVBYTES(); k++) { |
| 2123 | VdV.ub[k] = (VvV.ub[k]&offset) ? tmp.ub[k^offset] : tmp.ub[k]; |
| 2124 | } |
| 2125 | for (k = 0; k<fVBYTES(); k++) { |
| 2126 | tmp.ub[k] = VdV.ub[k]; |
| 2127 | } |
| 2128 | } |
| 2129 | }) |
| 2130 | |
| 2131 | |
| 2132 | |
| 2133 | |
| 2134 | |
| 2135 | ITERATOR_INSN2_SHIFT_SLOT(32,vcl0w,"Vd32=vcl0w(Vu32)","Vd32.uw=vcl0(Vu32.uw)", "Count Leading Zeros in Word", VdV.uw[i]=fCL1_4(~VuV.uw[i])) |
| 2136 | ITERATOR_INSN2_SHIFT_SLOT(16,vcl0h,"Vd32=vcl0h(Vu32)","Vd32.uh=vcl0(Vu32.uh)", "Count Leading Zeros in Word", VdV.uh[i]=fCL1_2(~VuV.uh[i])) |
| 2137 | |
| 2138 | ITERATOR_INSN2_SHIFT_SLOT(32,vnormamtw,"Vd32=vnormamtw(Vu32)","Vd32.w=vnormamt(Vu32.w)","Norm Amount Word", |
| 2139 | VdV.w[i]=fMAX(fCL1_4(~VuV.w[i]),fCL1_4(VuV.w[i]))-1; fHIDE(IV1DEAD();)) |
| 2140 | ITERATOR_INSN2_SHIFT_SLOT(16,vnormamth,"Vd32=vnormamth(Vu32)","Vd32.h=vnormamt(Vu32.h)","Norm Amount Halfword", |
| 2141 | VdV.h[i]=fMAX(fCL1_2(~VuV.h[i]),fCL1_2(VuV.h[i]))-1; fHIDE(IV1DEAD();)) |
| 2142 | |
| 2143 | ITERATOR_INSN_SHIFT_SLOT_VV_LATE(32,vaddclbw,"Vd32.w=vadd(vclb(Vu32.w),Vv32.w)", |
| 2144 | "Count leading bits and add", |
| 2145 | VdV.w[i] = fMAX(fCL1_4(~VuV.w[i]),fCL1_4(VuV.w[i])) + VvV.w[i]) |
| 2146 | |
| 2147 | ITERATOR_INSN_SHIFT_SLOT_VV_LATE(16,vaddclbh,"Vd32.h=vadd(vclb(Vu32.h),Vv32.h)", |
| 2148 | "Count leading bits and add", |
| 2149 | VdV.h[i] = fMAX(fCL1_2(~VuV.h[i]),fCL1_2(VuV.h[i])) + VvV.h[i]) |
| 2150 | |
| 2151 | |
| 2152 | ITERATOR_INSN2_SHIFT_SLOT(16,vpopcounth,"Vd32=vpopcounth(Vu32)","Vd32.h=vpopcount(Vu32.h)", "Count Leading Zeros in Word", VdV.uh[i]=fCOUNTONES_2(VuV.uh[i])) |
| 2153 | |
| 2154 | |
| 2155 | #define fHIST(INPUTVEC) \ |
| 2156 | fUARCH_NOTE_PUMP_4X(); \ |
| 2157 | fHIDE(int lane;) \ |
| 2158 | fHIDE(mmvector_t tmp;) \ |
| 2159 | fVFOREACH(128, lane) { \ |
| 2160 | for (fHIDE(int )i=0; i<128/8; ++i) { \ |
| 2161 | unsigned char value = INPUTVEC.ub[(128/8)*lane+i]; \ |
| 2162 | unsigned char regno = value>>3; \ |
| 2163 | unsigned char element = value & 7; \ |
| 2164 | READ_EXT_VREG(regno,tmp,0); \ |
| 2165 | tmp.uh[(128/16)*lane+(element)]++; \ |
| 2166 | WRITE_EXT_VREG(regno,tmp,EXT_NEW); \ |
| 2167 | } \ |
| 2168 | } |
| 2169 | |
| 2170 | #define fHISTQ(INPUTVEC,QVAL) \ |
| 2171 | fUARCH_NOTE_PUMP_4X(); \ |
| 2172 | fHIDE(int lane;) \ |
| 2173 | fHIDE(mmvector_t tmp;) \ |
| 2174 | fVFOREACH(128, lane) { \ |
| 2175 | for (fHIDE(int )i=0; i<128/8; ++i) { \ |
| 2176 | unsigned char value = INPUTVEC.ub[(128/8)*lane+i]; \ |
| 2177 | unsigned char regno = value>>3; \ |
| 2178 | unsigned char element = value & 7; \ |
| 2179 | READ_EXT_VREG(regno,tmp,0); \ |
| 2180 | if (fGETQBIT(QVAL,128/8*lane+i)) tmp.uh[(128/16)*lane+(element)]++; \ |
| 2181 | WRITE_EXT_VREG(regno,tmp,EXT_NEW); \ |
| 2182 | } \ |
| 2183 | } |
| 2184 | |
| 2185 | |
| 2186 | |
| 2187 | EXTINSN(V6_vhist, "vhist",ATTRIBS(A_EXTENSION,A_CVI,A_CVI_4SLOT), "vhist instruction",{ fHIDE(mmvector_t inputVec;) inputVec=fTMPVDATA(); fHIST(inputVec); }) |
| 2188 | EXTINSN(V6_vhistq, "vhist(Qv4)",ATTRIBS(A_EXTENSION,A_CVI,A_CVI_4SLOT), "vhist instruction",{ fHIDE(mmvector_t inputVec;) inputVec=fTMPVDATA(); fHISTQ(inputVec,QvV); }) |
| 2189 | |
| 2190 | #undef fHIST |
| 2191 | #undef fHISTQ |
| 2192 | |
| 2193 | |
| 2194 | /* **** WEIGHTED HISTOGRAM **** */ |
| 2195 | |
| 2196 | |
| 2197 | #if 1 |
| 2198 | #define WHIST(EL,MASK,BSHIFT,COND,SATF) \ |
| 2199 | fHIDE(unsigned int) bucket = fGETUBYTE(0,input.h[i]); \ |
| 2200 | fHIDE(unsigned int) weight = fGETUBYTE(1,input.h[i]); \ |
| 2201 | fHIDE(unsigned int) vindex = (bucket >> 3) & 0x1F; \ |
| 2202 | fHIDE(unsigned int) elindex = ((i>>BSHIFT) & (~MASK)) | ((bucket>>BSHIFT) & MASK); \ |
| 2203 | fHIDE(mmvector_t tmp;) \ |
| 2204 | READ_EXT_VREG(vindex,tmp,0); \ |
| 2205 | COND tmp.EL[elindex] = SATF(tmp.EL[elindex] + weight); \ |
| 2206 | WRITE_EXT_VREG(vindex,tmp,EXT_NEW); \ |
| 2207 | fUARCH_NOTE_PUMP_2X(); |
| 2208 | |
| 2209 | ITERATOR_INSN_VHISTLIKE(16,vwhist256,"vwhist256","vector weighted histogram halfword counters", WHIST(uh,7,0,,)) |
| 2210 | ITERATOR_INSN_VHISTLIKE(16,vwhist256q,"vwhist256(Qv4)","vector weighted histogram halfword counters", WHIST(uh,7,0,if (fGETQBIT(QvV,2*i)),)) |
| 2211 | ITERATOR_INSN_VHISTLIKE(16,vwhist256_sat,"vwhist256:sat","vector weighted histogram halfword counters", WHIST(uh,7,0,,fVSATUH)) |
| 2212 | ITERATOR_INSN_VHISTLIKE(16,vwhist256q_sat,"vwhist256(Qv4):sat","vector weighted histogram halfword counters", WHIST(uh,7,0,if (fGETQBIT(QvV,2*i)),fVSATUH)) |
| 2213 | ITERATOR_INSN_VHISTLIKE(16,vwhist128,"vwhist128","vector weighted histogram word counters", WHIST(uw,3,1,,)) |
| 2214 | ITERATOR_INSN_VHISTLIKE(16,vwhist128q,"vwhist128(Qv4)","vector weighted histogram word counters", WHIST(uw,3,1,if (fGETQBIT(QvV,2*i)),)) |
| 2215 | ITERATOR_INSN_VHISTLIKE(16,vwhist128m,"vwhist128(#u1)","vector weighted histogram word counters", WHIST(uw,3,1,if ((bucket & 1) == uiV),)) |
| 2216 | ITERATOR_INSN_VHISTLIKE(16,vwhist128qm,"vwhist128(Qv4,#u1)","vector weighted histogram word counters", WHIST(uw,3,1,if (((bucket & 1) == uiV) && fGETQBIT(QvV,2*i)),)) |
| 2217 | |
| 2218 | |
| 2219 | #endif |
| 2220 | |
| 2221 | |
| 2222 | |
| 2223 | /* ****** lookup table instructions *********** */ |
| 2224 | |
| 2225 | /* Use low bits from idx to choose next-bigger elements from vector, then use LSB from idx to choose odd or even element */ |
| 2226 | |
| 2227 | ITERATOR_INSN_PERMUTE_SLOT(8,vlutvvb,"Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8)","vector-vector table lookup", |
| 2228 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2229 | matchval = RtV & 0x7; |
| 2230 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2231 | idx = VuV.ub[i]; |
| 2232 | VdV.b[i] = ((idx & 0xE0) == (matchval << 5)) ? fGETBYTE(oddhalf,VvV.h[idx % fVELEM(16)]) : 0) |
| 2233 | |
| 2234 | |
| 2235 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(8,vlutvvb_oracc,"Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8)","vector-vector table lookup", |
| 2236 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2237 | matchval = RtV & 0x7; |
| 2238 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2239 | idx = VuV.ub[i]; |
| 2240 | VxV.b[i] |= ((idx & 0xE0) == (matchval << 5)) ? fGETBYTE(oddhalf,VvV.h[idx % fVELEM(16)]) : 0) |
| 2241 | |
| 2242 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(16,vlutvwh,"Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8)","vector-vector table lookup", |
| 2243 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2244 | matchval = RtV & 0xF; |
| 2245 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2246 | idx = fGETUBYTE(0,VuV.uh[i]); |
| 2247 | VddV.v[0].h[i] = ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0; |
| 2248 | idx = fGETUBYTE(1,VuV.uh[i]); |
| 2249 | VddV.v[1].h[i] = ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0) |
| 2250 | |
| 2251 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(16,vlutvwh_oracc,"Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8)","vector-vector table lookup", |
| 2252 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2253 | matchval = fGETUBYTE(0,RtV) & 0xF; |
| 2254 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2255 | idx = fGETUBYTE(0,VuV.uh[i]); |
| 2256 | VxxV.v[0].h[i] |= ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0; |
| 2257 | idx = fGETUBYTE(1,VuV.uh[i]); |
| 2258 | VxxV.v[1].h[i] |= ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0) |
| 2259 | |
| 2260 | ITERATOR_INSN_PERMUTE_SLOT(8,vlutvvbi,"Vd32.b=vlut32(Vu32.b,Vv32.b,#u3)","vector-vector table lookup", |
| 2261 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2262 | matchval = uiV & 0x7; |
| 2263 | oddhalf = (uiV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2264 | idx = VuV.ub[i]; |
| 2265 | VdV.b[i] = ((idx & 0xE0) == (matchval << 5)) ? fGETBYTE(oddhalf,VvV.h[idx % fVELEM(16)]) : 0) |
| 2266 | |
| 2267 | |
| 2268 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(8,vlutvvb_oracci,"Vx32.b|=vlut32(Vu32.b,Vv32.b,#u3)","vector-vector table lookup", |
| 2269 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2270 | matchval = uiV & 0x7; |
| 2271 | oddhalf = (uiV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2272 | idx = VuV.ub[i]; |
| 2273 | VxV.b[i] |= ((idx & 0xE0) == (matchval << 5)) ? fGETBYTE(oddhalf,VvV.h[idx % fVELEM(16)]) : 0) |
| 2274 | |
| 2275 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(16,vlutvwhi,"Vdd32.h=vlut16(Vu32.b,Vv32.h,#u3)","vector-vector table lookup", |
| 2276 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2277 | matchval = uiV & 0xF; |
| 2278 | oddhalf = (uiV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2279 | idx = fGETUBYTE(0,VuV.uh[i]); |
| 2280 | VddV.v[0].h[i] = ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0; |
| 2281 | idx = fGETUBYTE(1,VuV.uh[i]); |
| 2282 | VddV.v[1].h[i] = ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0) |
| 2283 | |
| 2284 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(16,vlutvwh_oracci,"Vxx32.h|=vlut16(Vu32.b,Vv32.h,#u3)","vector-vector table lookup", |
| 2285 | fHIDE(unsigned int idx;) fHIDE(int matchval;) fHIDE(int oddhalf;) |
| 2286 | matchval = uiV & 0xF; |
| 2287 | oddhalf = (uiV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2288 | idx = fGETUBYTE(0,VuV.uh[i]); |
| 2289 | VxxV.v[0].h[i] |= ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0; |
| 2290 | idx = fGETUBYTE(1,VuV.uh[i]); |
| 2291 | VxxV.v[1].h[i] |= ((idx & 0xF0) == (matchval << 4)) ? fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]) : 0) |
| 2292 | |
| 2293 | ITERATOR_INSN_PERMUTE_SLOT(8,vlutvvb_nm,"Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8):nomatch","vector-vector table lookup", |
| 2294 | fHIDE(unsigned int idx;) fHIDE(int oddhalf;) fHIDE(int matchval;) |
| 2295 | matchval = RtV & 0x7; |
| 2296 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2297 | idx = VuV.ub[i]; |
| 2298 | idx = (idx&0x1F) | (matchval<<5); |
| 2299 | VdV.b[i] = fGETBYTE(oddhalf,VvV.h[idx % fVELEM(16)])) |
| 2300 | |
| 2301 | ITERATOR_INSN_PERMUTE_SLOT_DOUBLE_VEC(16,vlutvwh_nm,"Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8):nomatch","vector-vector table lookup", |
| 2302 | fHIDE(unsigned int idx;) fHIDE(int oddhalf;) fHIDE(int matchval;) |
| 2303 | matchval = RtV & 0xF; |
| 2304 | oddhalf = (RtV >> (fVECLOGSIZE()-6)) & 0x1; |
| 2305 | idx = fGETUBYTE(0,VuV.uh[i]); |
| 2306 | idx = (idx&0x0F) | (matchval<<4); |
| 2307 | VddV.v[0].h[i] = fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)]); |
| 2308 | idx = fGETUBYTE(1,VuV.uh[i]); |
| 2309 | idx = (idx&0x0F) | (matchval<<4); |
| 2310 | VddV.v[1].h[i] = fGETHALF(oddhalf,VvV.w[idx % fVELEM(32)])) |
| 2311 | |
| 2312 | |
| 2313 | |
| 2314 | |
| 2315 | /****************************************************************************** |
| 2316 | NON LINEAR - V65 |
| 2317 | ******************************************************************************/ |
| 2318 | |
| 2319 | ITERATOR_INSN_SLOT2_DOUBLE_VEC(16,vmpahhsat,"Vx32.h=vmpa(Vx32.h,Vu32.h,Rtt32.h):sat","piecewise linear approximation", |
| 2320 | VxV.h[i]= fVSATH( ( ( fMPY16SS(VxV.h[i],VuV.h[i])<<1) + (fGETHALF(( (VuV.h[i]>>14)&0x3), RttV )<<15))>>16)) |
| 2321 | |
| 2322 | |
| 2323 | ITERATOR_INSN_SLOT2_DOUBLE_VEC(16,vmpauhuhsat,"Vx32.h=vmpa(Vx32.h,Vu32.uh,Rtt32.uh):sat","piecewise linear approximation", |
| 2324 | VxV.h[i]= fVSATH( ( fMPY16SU(VxV.h[i],VuV.uh[i]) + (fGETUHALF(((VuV.uh[i]>>14)&0x3), RttV )<<15))>>16)) |
| 2325 | |
| 2326 | ITERATOR_INSN_SLOT2_DOUBLE_VEC(16,vmpsuhuhsat,"Vx32.h=vmps(Vx32.h,Vu32.uh,Rtt32.uh):sat","piecewise linear approximation", |
| 2327 | VxV.h[i]= fVSATH( ( fMPY16SU(VxV.h[i],VuV.uh[i]) - (fGETUHALF(((VuV.uh[i]>>14)&0x3), RttV )<<15))>>16)) |
| 2328 | |
| 2329 | |
| 2330 | ITERATOR_INSN_SLOT2_DOUBLE_VEC(16,vlut4,"Vd32.h=vlut4(Vu32.uh,Rtt32.h)","4 entry lookup table", |
| 2331 | VdV.h[i]= fGETHALF( ((VuV.h[i]>>14)&0x3), RttV )) |
| 2332 | |
| 2333 | |
| 2334 | |
| 2335 | /****************************************************************************** |
| 2336 | V65 |
| 2337 | ******************************************************************************/ |
| 2338 | |
| 2339 | ITERATOR_INSN_MPY_SLOT_NOV1(32,vmpyuhe,"Vd32.uw=vmpye(Vu32.uh,Rt32.uh)", |
| 2340 | "Vector even halfword unsigned multiply by scalar", |
| 2341 | VdV.uw[i] = fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV))) |
| 2342 | |
| 2343 | |
| 2344 | ITERATOR_INSN_MPY_SLOT_NOV1(32,vmpyuhe_acc,"Vx32.uw+=vmpye(Vu32.uh,Rt32.uh)", |
| 2345 | "Vector even halfword unsigned multiply by scalar", |
| 2346 | VxV.uw[i] += fMPY16UU(fGETUHALF(0, VuV.uw[i]),fGETUHALF(0,RtV))) |
| 2347 | |
| 2348 | |
| 2349 | |
| 2350 | |
| 2351 | EXTINSN(V6_vgathermw, "vtmp.w=vgather(Rt32,Mu2,Vv32.w).w", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather Words", |
| 2352 | { |
| 2353 | fHIDE(int i;) |
| 2354 | fHIDE(int element_size = 4;) |
| 2355 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2356 | fVLASTBYTE(MuV, element_size); |
| 2357 | fVALIGN(RtV, element_size); |
| 2358 | fVFOREACH(32, i) { |
| 2359 | EA = RtV+VvV.uw[i]; |
| 2360 | fVLOG_VTCM_GATHER_WORD(EA, VvV.uw[i], i,MuV); |
| 2361 | } |
| 2362 | fGATHER_FINISH() |
| 2363 | }) |
| 2364 | EXTINSN(V6_vgathermh, "vtmp.h=vgather(Rt32,Mu2,Vv32.h).h", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather halfwords", |
| 2365 | { |
| 2366 | fHIDE(int i;) |
| 2367 | fHIDE(int element_size = 2;) |
| 2368 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2369 | fVLASTBYTE(MuV, element_size); |
| 2370 | fVALIGN(RtV, element_size); |
| 2371 | fVFOREACH(16, i) { |
| 2372 | EA = RtV+VvV.uh[i]; |
| 2373 | fVLOG_VTCM_GATHER_HALFWORD(EA, VvV.uh[i], i,MuV); |
| 2374 | } |
| 2375 | fGATHER_FINISH() |
| 2376 | }) |
| 2377 | |
| 2378 | |
| 2379 | |
| 2380 | EXTINSN(V6_vgathermhw, "vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA_DV,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather halfwords", |
| 2381 | { |
| 2382 | fHIDE(int i;) |
| 2383 | fHIDE(int j;) |
| 2384 | fHIDE(int element_size = 2;) |
| 2385 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2386 | fVLASTBYTE(MuV, element_size); |
| 2387 | fVALIGN(RtV, element_size); |
| 2388 | fVFOREACH(32, i) { |
| 2389 | for(j = 0; j < 2; j++) { |
| 2390 | EA = RtV+VvvV.v[j].uw[i]; |
| 2391 | fVLOG_VTCM_GATHER_HALFWORD_DV(EA, VvvV.v[j].uw[i], (2*i+j),i,j,MuV); |
| 2392 | } |
| 2393 | } |
| 2394 | fGATHER_FINISH() |
| 2395 | }) |
| 2396 | |
| 2397 | |
| 2398 | EXTINSN(V6_vgathermwq, "if (Qs4) vtmp.w=vgather(Rt32,Mu2,Vv32.w).w", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather Words", |
| 2399 | { |
| 2400 | fHIDE(int i;) |
| 2401 | fHIDE(int element_size = 4;) |
| 2402 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2403 | fVLASTBYTE(MuV, element_size); |
| 2404 | fVALIGN(RtV, element_size); |
| 2405 | fVFOREACH(32, i) { |
| 2406 | EA = RtV+VvV.uw[i]; |
| 2407 | fVLOG_VTCM_GATHER_WORDQ(EA, VvV.uw[i], i,QsV,MuV); |
| 2408 | } |
| 2409 | fGATHER_FINISH() |
| 2410 | }) |
| 2411 | EXTINSN(V6_vgathermhq, "if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vv32.h).h", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather halfwords", |
| 2412 | { |
| 2413 | fHIDE(int i;) |
| 2414 | fHIDE(int element_size = 2;) |
| 2415 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2416 | fVLASTBYTE(MuV, element_size); |
| 2417 | fVALIGN(RtV, element_size); |
| 2418 | fVFOREACH(16, i) { |
| 2419 | EA = RtV+VvV.uh[i]; |
| 2420 | fVLOG_VTCM_GATHER_HALFWORDQ(EA, VvV.uh[i], i,QsV,MuV); |
| 2421 | } |
| 2422 | fGATHER_FINISH() |
| 2423 | }) |
| 2424 | |
| 2425 | |
| 2426 | |
| 2427 | EXTINSN(V6_vgathermhwq, "if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_GATHER,A_CVI_VA_DV,A_CVI_VM,A_CVI_TMP_DST,A_MEMLIKE), "Gather halfwords", |
| 2428 | { |
| 2429 | fHIDE(int i;) |
| 2430 | fHIDE(int j;) |
| 2431 | fHIDE(int element_size = 2;) |
| 2432 | fHIDE(fGATHER_INIT( RtV, MuV, element_size);) |
| 2433 | fVLASTBYTE(MuV, element_size); |
| 2434 | fVALIGN(RtV, element_size); |
| 2435 | fVFOREACH(32, i) { |
| 2436 | for(j = 0; j < 2; j++) { |
| 2437 | EA = RtV+VvvV.v[j].uw[i]; |
| 2438 | fVLOG_VTCM_GATHER_HALFWORDQ_DV(EA, VvvV.v[j].uw[i], (2*i+j),i,j,QsV,MuV); |
| 2439 | } |
| 2440 | } |
| 2441 | fGATHER_FINISH() |
| 2442 | }) |
| 2443 | |
| 2444 | |
| 2445 | |
| 2446 | EXTINSN(V6_vscattermw , "vscatter(Rt32,Mu2,Vv32.w).w=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter Words", |
| 2447 | { |
| 2448 | fHIDE(int i;) |
| 2449 | fHIDE(int element_size = 4;) |
| 2450 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2451 | fVLASTBYTE(MuV, element_size); |
| 2452 | fVALIGN(RtV, element_size); |
| 2453 | fVFOREACH(32, i) { |
| 2454 | EA = RtV+VvV.uw[i]; |
| 2455 | fVLOG_VTCM_WORD(EA, VvV.uw[i], VwV,i,MuV); |
| 2456 | } |
| 2457 | fSCATTER_FINISH(0) |
| 2458 | }) |
| 2459 | |
| 2460 | |
| 2461 | |
| 2462 | EXTINSN(V6_vscattermh , "vscatter(Rt32,Mu2,Vv32.h).h=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter halfWords", |
| 2463 | { |
| 2464 | fHIDE(int i;) |
| 2465 | fHIDE(int element_size = 2;) |
| 2466 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2467 | fVLASTBYTE(MuV, element_size); |
| 2468 | fVALIGN(RtV, element_size); |
| 2469 | fVFOREACH(16, i) { |
| 2470 | EA = RtV+VvV.uh[i]; |
| 2471 | fVLOG_VTCM_HALFWORD(EA,VvV.uh[i],VwV,i,MuV); |
| 2472 | } |
| 2473 | fSCATTER_FINISH(0) |
| 2474 | }) |
| 2475 | |
| 2476 | |
| 2477 | EXTINSN(V6_vscattermw_add, "vscatter(Rt32,Mu2,Vv32.w).w+=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter Words-Add", |
| 2478 | { |
| 2479 | fHIDE(int i;) |
| 2480 | fHIDE(int ALIGNMENT=4;) |
| 2481 | fHIDE(int element_size = 4;) |
| 2482 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2483 | fVLASTBYTE(MuV, element_size); |
| 2484 | fVALIGN(RtV, element_size); |
| 2485 | fVFOREACH(32, i) { |
| 2486 | EA = (RtV+fVALIGN(VvV.uw[i],ALIGNMENT)); |
| 2487 | fVLOG_VTCM_WORD_INCREMENT(EA,VvV.uw[i],VwV,i,ALIGNMENT,MuV); |
| 2488 | } |
| 2489 | fHIDE(fLOG_SCATTER_OP(4);) |
| 2490 | fSCATTER_FINISH(1) |
| 2491 | }) |
| 2492 | |
| 2493 | EXTINSN(V6_vscattermh_add, "vscatter(Rt32,Mu2,Vv32.h).h+=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter halfword-Add", |
| 2494 | { |
| 2495 | fHIDE(int i;) |
| 2496 | fHIDE(int ALIGNMENT=2;) |
| 2497 | fHIDE(int element_size = 2;) |
| 2498 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2499 | fVLASTBYTE(MuV, element_size); |
| 2500 | fVALIGN(RtV, element_size); |
| 2501 | fVFOREACH(16, i) { |
| 2502 | EA = (RtV+fVALIGN(VvV.uh[i],ALIGNMENT)); |
| 2503 | fVLOG_VTCM_HALFWORD_INCREMENT(EA,VvV.uh[i],VwV,i,ALIGNMENT,MuV); |
| 2504 | } |
| 2505 | fHIDE(fLOG_SCATTER_OP(2);) |
| 2506 | fSCATTER_FINISH(1) |
| 2507 | }) |
| 2508 | |
| 2509 | |
| 2510 | EXTINSN(V6_vscattermwq, "if (Qs4) vscatter(Rt32,Mu2,Vv32.w).w=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter Words conditional", |
| 2511 | { |
| 2512 | fHIDE(int i;) |
| 2513 | fHIDE(int element_size = 4;) |
| 2514 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2515 | fVLASTBYTE(MuV, element_size); |
| 2516 | fVALIGN(RtV, element_size); |
| 2517 | fVFOREACH(32, i) { |
| 2518 | EA = RtV+VvV.uw[i]; |
| 2519 | fVLOG_VTCM_WORDQ(EA,VvV.uw[i], VwV,i,QsV,MuV); |
| 2520 | } |
| 2521 | fSCATTER_FINISH(0) |
| 2522 | }) |
| 2523 | |
| 2524 | EXTINSN(V6_vscattermhq, "if (Qs4) vscatter(Rt32,Mu2,Vv32.h).h=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA,A_CVI_VM,A_MEMLIKE), "Scatter HalfWords conditional", |
| 2525 | { |
| 2526 | fHIDE(int i;) |
| 2527 | fHIDE(int element_size = 2;) |
| 2528 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2529 | fVLASTBYTE(MuV, element_size); |
| 2530 | fVALIGN(RtV, element_size); |
| 2531 | fVFOREACH(16, i) { |
| 2532 | EA = RtV+VvV.uh[i]; |
| 2533 | fVLOG_VTCM_HALFWORDQ(EA,VvV.uh[i],VwV,i,QsV,MuV); |
| 2534 | } |
| 2535 | fSCATTER_FINISH(0) |
| 2536 | }) |
| 2537 | |
| 2538 | |
| 2539 | |
| 2540 | |
| 2541 | EXTINSN(V6_vscattermhw , "vscatter(Rt32,Mu2,Vvv32.w).h=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA_DV,A_CVI_VM,A_MEMLIKE), "Scatter Words", |
| 2542 | { |
| 2543 | fHIDE(int i;) |
| 2544 | fHIDE(int j;) |
| 2545 | fHIDE(int element_size = 2;) |
| 2546 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2547 | fVLASTBYTE(MuV, element_size); |
| 2548 | fVALIGN(RtV, element_size); |
| 2549 | fVFOREACH(32, i) { |
| 2550 | for(j = 0; j < 2; j++) { |
| 2551 | EA = RtV+VvvV.v[j].uw[i]; |
| 2552 | fVLOG_VTCM_HALFWORD_DV(EA,VvvV.v[j].uw[i],VwV,(2*i+j),i,j,MuV); |
| 2553 | } |
| 2554 | } |
| 2555 | fSCATTER_FINISH(0) |
| 2556 | }) |
| 2557 | |
| 2558 | |
| 2559 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC_VX_FWD(32, v6mpyvubs10_vxx, "Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):v", "", |
| 2560 | fHIDE(size2s_t c00;) |
| 2561 | fGET10BIT(c00, VvvV.v[0].uw[i], 0) |
| 2562 | fHIDE(size2s_t c01;) |
| 2563 | fGET10BIT(c01, VvvV.v[0].uw[i], 1) |
| 2564 | fHIDE(size2s_t c02;) |
| 2565 | fGET10BIT(c02, VvvV.v[0].uw[i], 2) |
| 2566 | |
| 2567 | fHIDE(size2s_t c10;) |
| 2568 | fGET10BIT(c10, VvvV.v[1].uw[i], 0) |
| 2569 | fHIDE(size2s_t c11;) |
| 2570 | fGET10BIT(c11, VvvV.v[1].uw[i], 1) |
| 2571 | fHIDE(size2s_t c12;) |
| 2572 | fGET10BIT(c12, VvvV.v[1].uw[i], 2) |
| 2573 | |
| 2574 | if (uiV == 0) { |
| 2575 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c10); |
| 2576 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c11); |
| 2577 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c12); |
| 2578 | |
| 2579 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c00); |
| 2580 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2581 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c02); |
| 2582 | |
| 2583 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c10); |
| 2584 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c11); |
| 2585 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c12); |
| 2586 | |
| 2587 | } else if (uiV == 1) { |
| 2588 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c00); |
| 2589 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c01); |
| 2590 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c02); |
| 2591 | |
| 2592 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c10); |
| 2593 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c11); |
| 2594 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c12); |
| 2595 | |
| 2596 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c00); |
| 2597 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2598 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c02); |
| 2599 | |
| 2600 | } else if (uiV == 2) { |
| 2601 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c10); |
| 2602 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2603 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c12); |
| 2604 | |
| 2605 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c00); |
| 2606 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c01); |
| 2607 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c02); |
| 2608 | |
| 2609 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c10); |
| 2610 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c11); |
| 2611 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c12); |
| 2612 | |
| 2613 | } else if (uiV == 3) { |
| 2614 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c00); |
| 2615 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c01); |
| 2616 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c02); |
| 2617 | |
| 2618 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c10); |
| 2619 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2620 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c12); |
| 2621 | |
| 2622 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c00); |
| 2623 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c01); |
| 2624 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c02); |
| 2625 | } |
| 2626 | ) |
| 2627 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC_VX_FWD(32, v6mpyhubs10_vxx, "Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):h", "", |
| 2628 | fHIDE(size2s_t c00;) |
| 2629 | fGET10BIT(c00, VvvV.v[0].uw[i], 0) |
| 2630 | fHIDE(size2s_t c01;) |
| 2631 | fGET10BIT(c01, VvvV.v[0].uw[i], 1) |
| 2632 | fHIDE(size2s_t c02;) |
| 2633 | fGET10BIT(c02, VvvV.v[0].uw[i], 2) |
| 2634 | fHIDE(size2s_t c10;) |
| 2635 | fGET10BIT(c10, VvvV.v[1].uw[i], 0) |
| 2636 | fHIDE(size2s_t c11;) |
| 2637 | fGET10BIT(c11, VvvV.v[1].uw[i], 1) |
| 2638 | fHIDE(size2s_t c12;) |
| 2639 | fGET10BIT(c12, VvvV.v[1].uw[i], 2) |
| 2640 | |
| 2641 | if (uiV == 0) { |
| 2642 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c10); |
| 2643 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c11); |
| 2644 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c12); |
| 2645 | |
| 2646 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c00); |
| 2647 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2648 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c02); |
| 2649 | |
| 2650 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c10); |
| 2651 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c11); |
| 2652 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c12); |
| 2653 | |
| 2654 | } else if (uiV == 1) { |
| 2655 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c00); |
| 2656 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c01); |
| 2657 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c02); |
| 2658 | |
| 2659 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c10); |
| 2660 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c11); |
| 2661 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c12); |
| 2662 | |
| 2663 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c00); |
| 2664 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2665 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c02); |
| 2666 | |
| 2667 | } else if (uiV == 2) { |
| 2668 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c10); |
| 2669 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2670 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c12); |
| 2671 | |
| 2672 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c00); |
| 2673 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c01); |
| 2674 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c02); |
| 2675 | |
| 2676 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c10); |
| 2677 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c11); |
| 2678 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c12); |
| 2679 | |
| 2680 | } else if (uiV == 3) { |
| 2681 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c00); |
| 2682 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c01); |
| 2683 | VxxV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c02); |
| 2684 | |
| 2685 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c10); |
| 2686 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2687 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c12); |
| 2688 | |
| 2689 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c00); |
| 2690 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c01); |
| 2691 | VxxV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c02); |
| 2692 | } |
| 2693 | ) |
| 2694 | |
| 2695 | |
| 2696 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(32, v6mpyvubs10, "Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):v", "", |
| 2697 | fHIDE(short c00;) |
| 2698 | fGET10BIT(c00, VvvV.v[0].uw[i], 0) |
| 2699 | fHIDE(short c01;) |
| 2700 | fGET10BIT(c01, VvvV.v[0].uw[i], 1) |
| 2701 | fHIDE(short c02;) |
| 2702 | fGET10BIT(c02, VvvV.v[0].uw[i], 2) |
| 2703 | fHIDE(short c10;) |
| 2704 | fGET10BIT(c10, VvvV.v[1].uw[i], 0) |
| 2705 | fHIDE(short c11;) |
| 2706 | fGET10BIT(c11, VvvV.v[1].uw[i], 1) |
| 2707 | fHIDE(short c12;) |
| 2708 | fGET10BIT(c12, VvvV.v[1].uw[i], 2) |
| 2709 | |
| 2710 | |
| 2711 | |
| 2712 | if (uiV == 0) { |
| 2713 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c10); |
| 2714 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c11); |
| 2715 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c12); |
| 2716 | |
| 2717 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c00); |
| 2718 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2719 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c02); |
| 2720 | |
| 2721 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c10); |
| 2722 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c11); |
| 2723 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c12); |
| 2724 | |
| 2725 | } else if (uiV == 1) { |
| 2726 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c00); |
| 2727 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c01); |
| 2728 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c02); |
| 2729 | |
| 2730 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c10); |
| 2731 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c11); |
| 2732 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c12); |
| 2733 | |
| 2734 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c00); |
| 2735 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2736 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c02); |
| 2737 | |
| 2738 | } else if (uiV == 2) { |
| 2739 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c10); |
| 2740 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2741 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c12); |
| 2742 | |
| 2743 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c00); |
| 2744 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c01); |
| 2745 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c02); |
| 2746 | |
| 2747 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c10); |
| 2748 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c11); |
| 2749 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c12); |
| 2750 | |
| 2751 | } else if (uiV == 3) { |
| 2752 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c00); |
| 2753 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c01); |
| 2754 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c02); |
| 2755 | |
| 2756 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c10); |
| 2757 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2758 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c12); |
| 2759 | |
| 2760 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c00); |
| 2761 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c01); |
| 2762 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c02); |
| 2763 | } |
| 2764 | ) |
| 2765 | |
| 2766 | ITERATOR_INSN_MPY_SLOT_DOUBLE_VEC(32, v6mpyhubs10, "Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):h", "", |
| 2767 | fHIDE(short c00;) |
| 2768 | fGET10BIT(c00, VvvV.v[0].uw[i], 0) |
| 2769 | fHIDE(short c01;) |
| 2770 | fGET10BIT(c01, VvvV.v[0].uw[i], 1) |
| 2771 | fHIDE(short c02;) |
| 2772 | fGET10BIT(c02, VvvV.v[0].uw[i], 2) |
| 2773 | fHIDE(short c10;) |
| 2774 | fGET10BIT(c10, VvvV.v[1].uw[i], 0) |
| 2775 | fHIDE(short c11;) |
| 2776 | fGET10BIT(c11, VvvV.v[1].uw[i], 1) |
| 2777 | fHIDE(short c12;) |
| 2778 | fGET10BIT(c12, VvvV.v[1].uw[i], 2) |
| 2779 | |
| 2780 | if (uiV == 0) { |
| 2781 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c10); |
| 2782 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c11); |
| 2783 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c12); |
| 2784 | |
| 2785 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c00); |
| 2786 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2787 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c02); |
| 2788 | |
| 2789 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c10); |
| 2790 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c11); |
| 2791 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c12); |
| 2792 | |
| 2793 | } else if (uiV == 1) { |
| 2794 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c00); |
| 2795 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c01); |
| 2796 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c02); |
| 2797 | |
| 2798 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(3,VuuV.v[1].uw[i]), c10); |
| 2799 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c11); |
| 2800 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c12); |
| 2801 | |
| 2802 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[1].uw[i]), c00); |
| 2803 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c01); |
| 2804 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c02); |
| 2805 | |
| 2806 | } else if (uiV == 2) { |
| 2807 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c10); |
| 2808 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2809 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c12); |
| 2810 | |
| 2811 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c00); |
| 2812 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c01); |
| 2813 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c02); |
| 2814 | |
| 2815 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c10); |
| 2816 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c11); |
| 2817 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c12); |
| 2818 | |
| 2819 | } else if (uiV == 3) { |
| 2820 | VddV.v[1].w[i] = fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c00); |
| 2821 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c01); |
| 2822 | VddV.v[1].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c02); |
| 2823 | |
| 2824 | VddV.v[0].w[i] = fMPY16US(fGETUBYTE(1,VuuV.v[1].uw[i]), c10); |
| 2825 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(3,VuuV.v[0].uw[i]), c11); |
| 2826 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(1,VuuV.v[0].uw[i]), c12); |
| 2827 | |
| 2828 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[1].uw[i]), c00); |
| 2829 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(2,VuuV.v[0].uw[i]), c01); |
| 2830 | VddV.v[0].w[i] += fMPY16US(fGETUBYTE(0,VuuV.v[0].uw[i]), c02); |
| 2831 | } |
| 2832 | ) |
| 2833 | |
| 2834 | |
| 2835 | EXTINSN(V6_vscattermhwq, "if (Qs4) vscatter(Rt32,Mu2,Vvv32.w).h=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA_DV,A_CVI_VM,A_MEMLIKE), "Scatter halfwords conditional", |
| 2836 | { |
| 2837 | fHIDE(int i;) |
| 2838 | fHIDE(int j;) |
| 2839 | fHIDE(int element_size = 2;) |
| 2840 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2841 | fVLASTBYTE(MuV, element_size); |
| 2842 | fVALIGN(RtV, element_size); |
| 2843 | fVFOREACH(32, i) { |
| 2844 | for(j = 0; j < 2; j++) { |
| 2845 | EA = RtV+VvvV.v[j].uw[i]; |
| 2846 | fVLOG_VTCM_HALFWORDQ_DV(EA,VvvV.v[j].uw[i],VwV,(2*i+j),QsV,i,j,MuV); |
| 2847 | } |
| 2848 | } |
| 2849 | fSCATTER_FINISH(0) |
| 2850 | }) |
| 2851 | |
| 2852 | EXTINSN(V6_vscattermhw_add, "vscatter(Rt32,Mu2,Vvv32.w).h+=Vw32", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_SCATTER,A_CVI_VA_DV,A_CVI_VM,A_MEMLIKE), "Scatter halfwords-add", |
| 2853 | { |
| 2854 | fHIDE(int i;) |
| 2855 | fHIDE(int j;) |
| 2856 | fHIDE(int ALIGNMENT=2;) |
| 2857 | fHIDE(int element_size = 2;) |
| 2858 | fHIDE(fSCATTER_INIT( RtV, MuV, element_size);) |
| 2859 | fVLASTBYTE(MuV, element_size); |
| 2860 | fVALIGN(RtV, element_size); |
| 2861 | fVFOREACH(32, i) { |
| 2862 | for(j = 0; j < 2; j++) { |
| 2863 | EA = RtV + fVALIGN(VvvV.v[j].uw[i],ALIGNMENT); |
| 2864 | fVLOG_VTCM_HALFWORD_INCREMENT_DV(EA,VvvV.v[j].uw[i],VwV,(2*i+j),i,j,ALIGNMENT,MuV); |
| 2865 | } |
| 2866 | } |
| 2867 | fHIDE(fLOG_SCATTER_OP(2);) |
| 2868 | fSCATTER_FINISH(1) |
| 2869 | }) |
| 2870 | |
| 2871 | EXTINSN(V6_vprefixqb,"Vd32.b=prefixsum(Qv4)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), "parallel prefix sum of Q into byte", |
| 2872 | { |
| 2873 | fHIDE(int i;) |
| 2874 | fHIDE(size1u_t acc = 0;) |
| 2875 | fVFOREACH(8, i) { |
| 2876 | acc += fGETQBIT(QvV,i); |
| 2877 | VdV.ub[i] = acc; |
| 2878 | } |
| 2879 | } ) |
| 2880 | EXTINSN(V6_vprefixqh,"Vd32.h=prefixsum(Qv4)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), "parallel prefix sum of Q into halfwords", |
| 2881 | { |
| 2882 | fHIDE(int i;) |
| 2883 | fHIDE(size2u_t acc = 0;) |
| 2884 | fVFOREACH(16, i) { |
| 2885 | acc += fGETQBIT(QvV,i*2+0); |
| 2886 | acc += fGETQBIT(QvV,i*2+1); |
| 2887 | VdV.uh[i] = acc; |
| 2888 | } |
| 2889 | } ) |
| 2890 | EXTINSN(V6_vprefixqw,"Vd32.w=prefixsum(Qv4)", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VS), "parallel prefix sum of Q into words", |
| 2891 | { |
| 2892 | fHIDE(int i;) |
| 2893 | fHIDE(size4u_t acc = 0;) |
| 2894 | fVFOREACH(32, i) { |
| 2895 | acc += fGETQBIT(QvV,i*4+0); |
| 2896 | acc += fGETQBIT(QvV,i*4+1); |
| 2897 | acc += fGETQBIT(QvV,i*4+2); |
| 2898 | acc += fGETQBIT(QvV,i*4+3); |
| 2899 | VdV.uw[i] = acc; |
| 2900 | } |
| 2901 | } ) |
| 2902 | |
| 2903 | /* KVX - IEEE FP Instructions */ |
| 2904 | |
| 2905 | /* Single pipe, 32-bit output */ |
| 2906 | #define ITERATOR_INSN_IEEE_FP_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2907 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2908 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_OUT_32), \ |
| 2909 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2910 | |
| 2911 | /* Single pipe, 16-bit output */ |
| 2912 | #define ITERATOR_INSN_IEEE_FP_16(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2913 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2914 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_OUT_16), \ |
| 2915 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2916 | |
| 2917 | /* Two pipes: P2 & P3, single output: P2, 32-bit output */ |
| 2918 | #define ITERATOR_INSN_IEEE_FP_DOUBLE_SINGLE_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2919 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2920 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX_DV,A_HVX_IEEE_FP_OUT_32), \ |
| 2921 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2922 | |
| 2923 | /* Two pipes: P2 & P3, two outputs, 32-bit output */ |
| 2924 | #define ITERATOR_INSN_IEEE_FP_DOUBLE_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2925 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2926 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX_DV,A_HVX_IEEE_FP_OUT_32), \ |
| 2927 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2928 | |
| 2929 | /* |
| 2930 | * single pipe, accumulate instruction, produces 16-bit output, requires 16-bit |
| 2931 | * accumulate input |
| 2932 | */ |
| 2933 | #define ITERATOR_INSN_IEEE_FP_ACC_16(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2934 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2935 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_ACC,A_HVX_IEEE_FP_OUT_16,A_CVI_VX_NO_TMP_LD), \ |
| 2936 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2937 | |
| 2938 | /* |
| 2939 | * single pipe, accumulate instruction, produces 32-bit output, requires 32-bit |
| 2940 | * accumulate input |
| 2941 | */ |
| 2942 | #define ITERATOR_INSN_IEEE_FP_ACC_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 2943 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 2944 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_ACC,A_HVX_IEEE_FP_OUT_32,A_CVI_VX_NO_TMP_LD), \ |
| 2945 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 2946 | |
| 2947 | /* IEEE FP multiply instructions */ |
| 2948 | ITERATOR_INSN_IEEE_FP_DOUBLE_SINGLE_32(32, vmpy_sf_sf, |
| 2949 | "Vd32.sf=vmpy(Vu32.sf,Vv32.sf)", "Vector IEEE mul: sf", |
| 2950 | VdV.sf[i] = float32_mul(VuV.sf[i], VvV.sf[i], &env->hvx_fp_status)) |
| 2951 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vmpy_sf_hf, |
| 2952 | "Vdd32.sf=vmpy(Vu32.hf,Vv32.hf)", "Vector IEEE mul: hf widen to sf", |
| 2953 | VddV.v[0].sf[i] = fp_mult_sf_hf(VuV.hf[2*i], VvV.hf[2*i], &env->hvx_fp_status); |
| 2954 | VddV.v[1].sf[i] = fp_mult_sf_hf(VuV.hf[2*i+1], VvV.hf[2*i+1], &env->hvx_fp_status)) |
| 2955 | ITERATOR_INSN_IEEE_FP_16(16, vmpy_hf_hf, "Vd32.hf=vmpy(Vu32.hf,Vv32.hf)", |
| 2956 | "Vector IEEE mul: hf", |
| 2957 | VdV.hf[i] = float16_mul(VuV.hf[i], VvV.hf[i], &env->hvx_fp_status)) |
| 2958 | ITERATOR_INSN_IEEE_FP_32(32, vdmpy_sf_hf, "Vd32.sf=vdmpy(Vu32.hf,Vv32.hf)", |
| 2959 | "Vector IEEE mul reduction: hf widen to sf", |
| 2960 | VdV.sf[i] = fp_vdmpy(VuV.hf[2*i+1], VuV.hf[2*i], VvV.hf[2*i+1], |
| 2961 | VvV.hf[2*i], &env->hvx_fp_status)) |
| 2962 | |
| 2963 | /* IEEE FP multiply-accumulate instructions */ |
| 2964 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vmpy_sf_hf_acc, |
| 2965 | "Vxx32.sf+=vmpy(Vu32.hf,Vv32.hf)", "Vector IEEE fma: hf widen to sf", |
| 2966 | VxxV.v[0].sf[i] = float32_muladd(f16_to_f32(VuV.hf[2*i]), |
| 2967 | f16_to_f32(VvV.hf[2*i]), |
| 2968 | VxxV.v[0].sf[i], 0, &env->hvx_fp_status); |
| 2969 | VxxV.v[1].sf[i] = float32_muladd(f16_to_f32(VuV.hf[2*i+1]), |
| 2970 | f16_to_f32(VvV.hf[2*i+1]), |
| 2971 | VxxV.v[1].sf[i], 0, &env->hvx_fp_status)) |
| 2972 | ITERATOR_INSN_IEEE_FP_ACC_16(16, vmpy_hf_hf_acc, |
| 2973 | "Vx32.hf+=vmpy(Vu32.hf,Vv32.hf)", "Vector IEEE fma: hf", |
| 2974 | VxV.hf[i] = float16_muladd(VuV.hf[i], VvV.hf[i], VxV.hf[i], 0, &env->hvx_fp_status)) |
| 2975 | ITERATOR_INSN_IEEE_FP_ACC_32(32, vdmpy_sf_hf_acc, |
| 2976 | "Vx32.sf+=vdmpy(Vu32.hf,Vv32.hf)", "Vector IEEE fma reduce: hf widen to sf", |
| 2977 | VxV.sf[i] = float32_add(fp_vdmpy(VuV.hf[2*i+1], VuV.hf[2*i], |
| 2978 | VvV.hf[2*i+1], VvV.hf[2*i], |
| 2979 | &env->hvx_fp_status), |
| 2980 | VxV.sf[i], &env->hvx_fp_status)) |
| 2981 | |
| 2982 | /* IEEE FP add/sub instructions */ |
| 2983 | ITERATOR_INSN_IEEE_FP_32(32, vadd_sf_sf, "Vd32.sf=vadd(Vu32.sf,Vv32.sf)", |
| 2984 | "Vector IEEE add: sf", |
| 2985 | VdV.sf[i] = float32_add(VuV.sf[i], VvV.sf[i], &env->hvx_fp_status)) |
| 2986 | ITERATOR_INSN_IEEE_FP_32(32, vsub_sf_sf, "Vd32.sf=vsub(Vu32.sf,Vv32.sf)", |
| 2987 | "Vector IEEE sub: sf", |
| 2988 | VdV.sf[i] = float32_sub(VuV.sf[i], VvV.sf[i], &env->hvx_fp_status)) |
| 2989 | ITERATOR_INSN_IEEE_FP_16(16, vadd_hf_hf, "Vd32.hf=vadd(Vu32.hf,Vv32.hf)", |
| 2990 | "Vector IEEE add: hf", |
| 2991 | VdV.hf[i] = float16_add(VuV.hf[i], VvV.hf[i], &env->hvx_fp_status)) |
| 2992 | ITERATOR_INSN_IEEE_FP_16(16, vsub_hf_hf, "Vd32.hf=vsub(Vu32.hf,Vv32.hf)", |
| 2993 | "Vector IEEE sub: hf", |
| 2994 | VdV.hf[i] = float16_sub(VuV.hf[i], VvV.hf[i], &env->hvx_fp_status)) |
| 2995 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vadd_sf_hf, |
| 2996 | "Vdd32.sf=vadd(Vu32.hf,Vv32.hf)", "Vector IEEE add: hf widen to sf", |
| 2997 | VddV.v[0].sf[i] = float32_add(f16_to_f32(VuV.hf[2*i]), |
| 2998 | f16_to_f32(VvV.hf[2*i]), &env->hvx_fp_status); |
| 2999 | VddV.v[1].sf[i] = float32_add(f16_to_f32(VuV.hf[2*i+1]), |
| 3000 | f16_to_f32(VvV.hf[2*i+1]), &env->hvx_fp_status)) |
| 3001 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vsub_sf_hf, |
| 3002 | "Vdd32.sf=vsub(Vu32.hf,Vv32.hf)", "Vector IEEE sub: hf widen to sf", |
| 3003 | VddV.v[0].sf[i] = float32_sub(f16_to_f32(VuV.hf[2*i]), |
| 3004 | f16_to_f32(VvV.hf[2*i]), &env->hvx_fp_status); |
| 3005 | VddV.v[1].sf[i] = float32_sub(f16_to_f32(VuV.hf[2*i+1]), |
| 3006 | f16_to_f32(VvV.hf[2*i+1]), &env->hvx_fp_status)) |
| 3007 | |
| 3008 | #define ITERATOR_INSN_IEEE_FP_16_32_LATE(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 3009 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 3010 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_OUT_16,A_HVX_IEEE_FP_OUT_32), \ |
| 3011 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 3012 | |
| 3013 | /* IEEE FP min/max instructions */ |
| 3014 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vfmin_hf, "Vd32.hf=vfmin(Vu32.hf,Vv32.hf)", \ |
| 3015 | "Vector IEEE min: hf", VdV.hf[i] = float16_min(VuV.hf[i], VvV.hf[i], \ |
| 3016 | &env->hvx_fp_status)) |
| 3017 | ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vfmin_sf, "Vd32.sf=vfmin(Vu32.sf,Vv32.sf)", \ |
| 3018 | "Vector IEEE min: sf", VdV.sf[i] = float32_min(VuV.sf[i], VvV.sf[i], \ |
| 3019 | &env->hvx_fp_status)) |
| 3020 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vfmax_hf, "Vd32.hf=vfmax(Vu32.hf,Vv32.hf)", \ |
| 3021 | "Vector IEEE max: hf", VdV.hf[i] = float16_max(VuV.hf[i], VvV.hf[i], \ |
| 3022 | &env->hvx_fp_status)) |
| 3023 | ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vfmax_sf, "Vd32.sf=vfmax(Vu32.sf,Vv32.sf)", \ |
| 3024 | "Vector IEEE max: sf", VdV.sf[i] = float32_max(VuV.sf[i], VvV.sf[i], \ |
| 3025 | &env->hvx_fp_status)) |
| 3026 | |
| 3027 | ITERATOR_INSN_ANY_SLOT_2SRC(32,vmax_sf,"Vd32.sf=vmax(Vu32.sf,Vv32.sf)", \ |
| 3028 | "Vector max of sf input", VdV.sf[i] = qf_max_sf(VuV.sf[i], VvV.sf[i], \ |
| 3029 | &env->hvx_fp_status)) |
| 3030 | ITERATOR_INSN_ANY_SLOT_2SRC(32,vmin_sf,"Vd32.sf=vmin(Vu32.sf,Vv32.sf)", \ |
| 3031 | "Vector min of sf input", VdV.sf[i] = qf_min_sf(VuV.sf[i], VvV.sf[i], \ |
| 3032 | &env->hvx_fp_status)) |
| 3033 | ITERATOR_INSN_ANY_SLOT_2SRC(16,vmax_hf,"Vd32.hf=vmax(Vu32.hf,Vv32.hf)", \ |
| 3034 | "Vector max of hf input", VdV.hf[i] = qf_max_hf(VuV.hf[i], VvV.hf[i], \ |
| 3035 | &env->hvx_fp_status)) |
| 3036 | ITERATOR_INSN_ANY_SLOT_2SRC(16,vmin_hf,"Vd32.hf=vmin(Vu32.hf,Vv32.hf)", \ |
| 3037 | "Vector min of hf input", VdV.hf[i] = qf_min_hf(VuV.hf[i], VvV.hf[i], \ |
| 3038 | &env->hvx_fp_status)) |
| 3039 | |
| 3040 | /* IEEE FP move, negate, abs instructions */ |
| 3041 | ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vassign_fp, "Vd32.w=vfmv(Vu32.w)", \ |
| 3042 | "Vector IEEE move", VdV.w[i] = VuV.w[i]) |
| 3043 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vfneg_hf, "Vd32.hf=vfneg(Vu32.hf)", \ |
| 3044 | "Vector IEEE neg: hf", VdV.hf[i] = float16_chs(VuV.hf[i])) |
| 3045 | ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vfneg_sf, "Vd32.sf=vfneg(Vu32.sf)", \ |
| 3046 | "Vector IEEE neg: sf", VdV.sf[i] = float32_chs(VuV.sf[i])) |
| 3047 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vabs_hf, "Vd32.hf=vabs(Vu32.hf)", \ |
| 3048 | "Vector IEEE abs: hf", VdV.hf[i] = float16_abs(VuV.hf[i])) |
| 3049 | ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vabs_sf, "Vd32.sf=vabs(Vu32.sf)", \ |
| 3050 | "Vector IEEE abs: sf", VdV.sf[i] = float32_abs(VuV.sf[i])) |
| 3051 | |
| 3052 | /* Two pipes: P2 & P3, two outputs, 16-bit */ |
| 3053 | #define ITERATOR_INSN_IEEE_FP_DOUBLE_16(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 3054 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 3055 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX_DV,A_HVX_IEEE_FP_OUT_16), \ |
| 3056 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 3057 | |
| 3058 | /* Two pipes: P2 & P3, two outputs, 32-bit output */ |
| 3059 | #define ITERATOR_INSN_IEEE_FP_DOUBLE_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 3060 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 3061 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX_DV,A_HVX_IEEE_FP_OUT_32), \ |
| 3062 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 3063 | |
| 3064 | /* Single pipe, 16-bit output */ |
| 3065 | #define ITERATOR_INSN_IEEE_FP_16(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 3066 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 3067 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_OUT_16), \ |
| 3068 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 3069 | |
| 3070 | /* single pipe, output can feed 16- or 32-bit accumulate */ |
| 3071 | #define ITERATOR_INSN_IEEE_FP_16_32(WIDTH,TAG,SYNTAX,DESCR,CODE) \ |
| 3072 | EXTINSN(V6_##TAG, SYNTAX, \ |
| 3073 | ATTRIBS(A_EXTENSION,A_HVX_IEEE_FP,A_CVI,A_CVI_VX,A_HVX_IEEE_FP_OUT_16,A_HVX_IEEE_FP_OUT_32), \ |
| 3074 | DESCR, DO_FOR_EACH_CODE(WIDTH, CODE)) |
| 3075 | |
| 3076 | /****************************************************************************** |
| 3077 | * IEEE FP convert instructions |
| 3078 | ******************************************************************************/ |
| 3079 | |
| 3080 | ITERATOR_INSN_IEEE_FP_DOUBLE_16(32, vcvt_hf_ub, "Vdd32.hf=vcvt(Vu32.ub)", |
| 3081 | "Vector IEEE cvt from int: ub widen to hf", |
| 3082 | VddV.v[0].hf[2*i] = uint64_to_float16_scalbn(VuV.ub[4*i], float_round_nearest_even, 0); |
| 3083 | VddV.v[0].hf[2*i+1] = uint64_to_float16_scalbn(VuV.ub[4*i+1], float_round_nearest_even, 0); |
| 3084 | VddV.v[1].hf[2*i] = uint64_to_float16_scalbn(VuV.ub[4*i+2], float_round_nearest_even, 0); |
| 3085 | VddV.v[1].hf[2*i+1] = uint64_to_float16_scalbn(VuV.ub[4*i+3], float_round_nearest_even, 0)) |
| 3086 | |
| 3087 | ITERATOR_INSN_IEEE_FP_DOUBLE_16(32, vcvt_hf_b, "Vdd32.hf=vcvt(Vu32.b)", |
| 3088 | "Vector IEEE cvt from int: b widen to hf", |
| 3089 | VddV.v[0].hf[2*i] = int64_to_float16_scalbn(VuV.b[4*i], float_round_nearest_even, 0); |
| 3090 | VddV.v[0].hf[2*i+1] = int64_to_float16_scalbn(VuV.b[4*i+1], float_round_nearest_even, 0); |
| 3091 | VddV.v[1].hf[2*i] = int64_to_float16_scalbn(VuV.b[4*i+2], float_round_nearest_even, 0); |
| 3092 | VddV.v[1].hf[2*i+1] = int64_to_float16_scalbn(VuV.b[4*i+3], float_round_nearest_even, 0)) |
| 3093 | |
| 3094 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vcvt_sf_hf, "Vdd32.sf=vcvt(Vu32.hf)", |
| 3095 | "Vector IEEE cvt: hf widen to sf", |
| 3096 | VddV.v[0].sf[i] = f16_to_f32(VuV.hf[2*i]); |
| 3097 | VddV.v[1].sf[i] = f16_to_f32(VuV.hf[2*i+1])) |
| 3098 | |
| 3099 | ITERATOR_INSN_IEEE_FP_16(16, vcvt_hf_uh, "Vd32.hf=vcvt(Vu32.uh)", |
| 3100 | "Vector IEEE cvt from int: uh to hf", |
| 3101 | VdV.hf[i] = uint64_to_float16_scalbn(VuV.uh[i], float_round_nearest_even, 0)) |
| 3102 | ITERATOR_INSN_IEEE_FP_16(16, vcvt_hf_h, "Vd32.hf=vcvt(Vu32.h)", |
| 3103 | "Vector IEEE cvt from int: h to hf", |
| 3104 | VdV.hf[i] = int64_to_float16_scalbn(VuV.h[i], float_round_nearest_even, 0)) |
| 3105 | ITERATOR_INSN_IEEE_FP_16_32(16, vcvt_uh_hf, "Vd32.uh=vcvt(Vu32.hf)", |
| 3106 | "Vector IEEE cvt to int: hf to uh", |
| 3107 | VdV.uh[i] = float16_to_uint16_scalbn(VuV.hf[i], float_round_nearest_even, 0, &env->hvx_fp_status)) |
| 3108 | ITERATOR_INSN_IEEE_FP_16_32(16, vcvt_h_hf, "Vd32.h=vcvt(Vu32.hf)", |
| 3109 | "Vector IEEE cvt to int: hf to h", |
| 3110 | VdV.h[i] = float16_to_int16_scalbn(VuV.hf[i], float_round_nearest_even, 0, &env->hvx_fp_status)) |
| 3111 | |
| 3112 | ITERATOR_INSN_IEEE_FP_16(32, vcvt_hf_sf, "Vd32.hf=vcvt(Vu32.sf,Vv32.sf)", |
| 3113 | "Vector IEEE cvt: sf to hf", |
| 3114 | VdV.hf[2*i] = f32_to_f16(VuV.sf[i]); |
| 3115 | VdV.hf[2*i+1] = f32_to_f16(VvV.sf[i])) |
| 3116 | |
| 3117 | ITERATOR_INSN_IEEE_FP_16_32(32, vcvt_ub_hf, "Vd32.ub=vcvt(Vu32.hf,Vv32.hf)", "Vector cvt to int: hf narrow to ub", |
| 3118 | VdV.ub[4*i] = float16_to_uint8_scalbn(VuV.hf[2*i], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3119 | VdV.ub[4*i+1] = float16_to_uint8_scalbn(VuV.hf[2*i+1], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3120 | VdV.ub[4*i+2] = float16_to_uint8_scalbn(VvV.hf[2*i], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3121 | VdV.ub[4*i+3] = float16_to_uint8_scalbn(VvV.hf[2*i+1], float_round_nearest_even, 0, &env->hvx_fp_status)) |
| 3122 | |
| 3123 | ITERATOR_INSN_IEEE_FP_16_32(32, vcvt_b_hf, "Vd32.b=vcvt(Vu32.hf,Vv32.hf)", |
| 3124 | "Vector cvt to int: hf narrow to b", |
| 3125 | VdV.b[4*i] = float16_to_int8_scalbn(VuV.hf[2*i], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3126 | VdV.b[4*i+1] = float16_to_int8_scalbn(VuV.hf[2*i+1], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3127 | VdV.b[4*i+2] = float16_to_int8_scalbn(VvV.hf[2*i], float_round_nearest_even, 0, &env->hvx_fp_status); |
| 3128 | VdV.b[4*i+3] = float16_to_int8_scalbn(VvV.hf[2*i+1], float_round_nearest_even, 0, &env->hvx_fp_status)) |
| 3129 | |
| 3130 | ITERATOR_INSN_SHIFT_SLOT_FLT(32, vconv_w_sf,"Vd32.w=Vu32.sf", |
| 3131 | "Vector conversion of sf32 format to int w", |
| 3132 | VdV.w[i] = conv_w_sf(VuV.sf[i], &env->hvx_fp_status)) |
| 3133 | |
| 3134 | ITERATOR_INSN_SHIFT_SLOT_FLT(16, vconv_h_hf,"Vd32.h=Vu32.hf", |
| 3135 | "Vector conversion of hf16 format to int hw", |
| 3136 | VdV.h[i] = conv_h_hf(VuV.hf[i], &env->hvx_fp_status)) |
| 3137 | |
| 3138 | ITERATOR_INSN_SHIFT_SLOT_FLT(32, vconv_sf_w,"Vd32.sf=Vu32.w", |
| 3139 | "Vector conversion of int w format to sf32", |
| 3140 | VdV.sf[i] = int32_to_float32(VuV.w[i], &env->hvx_fp_status)) |
| 3141 | |
| 3142 | ITERATOR_INSN_SHIFT_SLOT_FLT(16, vconv_hf_h,"Vd32.hf=Vu32.h", |
| 3143 | "Vector conversion of int hw format to hf16", |
| 3144 | VdV.hf[i] = float16_val(int16_to_float16(VuV.h[i], &env->hvx_fp_status))) |
| 3145 | |
| 3146 | /****************************************************************************** |
| 3147 | * IEEE FP compare instructions |
| 3148 | ******************************************************************************/ |
| 3149 | |
| 3150 | #define VCMPGT_SF(DEST, ASRC, ASRCOP, CMP, N, SRC, MASK, WIDTH) \ |
| 3151 | { \ |
| 3152 | for (fHIDE(int) i = 0; i < fVBYTES(); i += WIDTH) { \ |
| 3153 | fHIDE(int) VAL = fCMPGT_SF(VuV.SRC[i/WIDTH],VvV.SRC[i/WIDTH]) ? MASK : 0; \ |
| 3154 | fSETQBITS(DEST,WIDTH,MASK,i,ASRC ASRCOP VAL); \ |
| 3155 | } \ |
| 3156 | } |
| 3157 | |
| 3158 | #define VCMPGT_HF(DEST, ASRC, ASRCOP, CMP, N, SRC, MASK, WIDTH) \ |
| 3159 | { \ |
| 3160 | for (fHIDE(int) i = 0; i < fVBYTES(); i += WIDTH) { \ |
| 3161 | fHIDE(int) VAL = fCMPGT_HF(VuV.SRC[i/WIDTH],VvV.SRC[i/WIDTH]) ? MASK : 0; \ |
| 3162 | fSETQBITS(DEST,WIDTH,MASK,i,ASRC ASRCOP VAL); \ |
| 3163 | } \ |
| 3164 | } |
| 3165 | |
| 3166 | #define VCMPGT_BF(DEST, ASRC, ASRCOP, CMP, N, SRC, MASK, WIDTH) \ |
| 3167 | { \ |
| 3168 | fBFLOAT(); \ |
| 3169 | for (fHIDE(int) i = 0; i < fVBYTES(); i += WIDTH) { \ |
| 3170 | fHIDE(int) VAL = fCMPGT_BF(VuV.SRC[i/WIDTH],VvV.SRC[i/WIDTH]) ? MASK : 0; \ |
| 3171 | fSETQBITS(DEST,WIDTH,MASK,i,ASRC ASRCOP VAL); \ |
| 3172 | } \ |
| 3173 | } |
| 3174 | |
| 3175 | /* Vector SF compare */ |
| 3176 | #define MMVEC_CMPGT_SF(TYPE,TYPE2,DESCR,N,MASK,WIDTH,SRC) \ |
| 3177 | EXTINSN(V6_vgt##TYPE##_and, "Qx4&=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3178 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3179 | DESCR" greater than with predicate-and", \ |
| 3180 | VCMPGT_SF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), &, ">", N, SRC, MASK, WIDTH)) \ |
| 3181 | EXTINSN(V6_vgt##TYPE##_xor, "Qx4^=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3182 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3183 | DESCR" greater than with predicate-xor", \ |
| 3184 | VCMPGT_SF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), ^, ">", N, SRC, MASK, WIDTH)) \ |
| 3185 | EXTINSN(V6_vgt##TYPE##_or, "Qx4|=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3186 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3187 | DESCR" greater than with predicate-or", \ |
| 3188 | VCMPGT_SF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), |, ">", N, SRC, MASK, WIDTH)) \ |
| 3189 | EXTINSN(V6_vgt##TYPE, "Qd4=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3190 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3191 | DESCR" greater than", \ |
| 3192 | VCMPGT_SF(QdV, , , ">", N, SRC, MASK, WIDTH)) |
| 3193 | |
| 3194 | /* Vector HF compare */ |
| 3195 | #define MMVEC_CMPGT_HF(TYPE,TYPE2,DESCR,N,MASK,WIDTH,SRC) \ |
| 3196 | EXTINSN(V6_vgt##TYPE##_and, "Qx4&=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3197 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3198 | DESCR" greater than with predicate-and", \ |
| 3199 | VCMPGT_HF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), &, ">", N, SRC, MASK, WIDTH)) \ |
| 3200 | EXTINSN(V6_vgt##TYPE##_xor, "Qx4^=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3201 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3202 | DESCR" greater than with predicate-xor", \ |
| 3203 | VCMPGT_HF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), ^, ">", N, SRC, MASK, WIDTH)) \ |
| 3204 | EXTINSN(V6_vgt##TYPE##_or, "Qx4|=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3205 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3206 | DESCR" greater than with predicate-or", \ |
| 3207 | VCMPGT_HF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), |, ">", N, SRC, MASK, WIDTH)) \ |
| 3208 | EXTINSN(V6_vgt##TYPE, "Qd4=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3209 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3210 | DESCR" greater than", \ |
| 3211 | VCMPGT_HF(QdV, , , ">", N, SRC, MASK, WIDTH)) |
| 3212 | |
| 3213 | /* Vector BF compare */ |
| 3214 | #define MMVEC_CMPGT_BF(TYPE,TYPE2,DESCR,N,MASK,WIDTH,SRC) \ |
| 3215 | EXTINSN(V6_vgt##TYPE##_and, "Qx4&=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")",\ |
| 3216 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3217 | DESCR" greater than with predicate-and", \ |
| 3218 | VCMPGT_BF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), &, ">", N, SRC, MASK, WIDTH)) \ |
| 3219 | EXTINSN(V6_vgt##TYPE##_xor, "Qx4^=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3220 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3221 | DESCR" greater than with predicate-xor", \ |
| 3222 | VCMPGT_BF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), ^, ">", N, SRC, MASK, WIDTH)) \ |
| 3223 | EXTINSN(V6_vgt##TYPE##_or, "Qx4|=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3224 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3225 | DESCR" greater than with predicate-or", \ |
| 3226 | VCMPGT_BF(QxV, fGETQBITS(QxV,WIDTH,MASK,i), |, ">", N, SRC, MASK, WIDTH)) \ |
| 3227 | EXTINSN(V6_vgt##TYPE, "Qd4=vcmp.gt(Vu32." TYPE2 ",Vv32." TYPE2 ")", \ |
| 3228 | ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA,A_CVI_VA_2SRC,A_HVX_FLT), \ |
| 3229 | DESCR" greater than", \ |
| 3230 | VCMPGT_BF(QdV, , , ">", N, SRC, MASK, WIDTH)) |
| 3231 | |
| 3232 | MMVEC_CMPGT_SF(sf,"sf","Vector sf Compare ", fVELEM(32), 0xF, 4, sf) |
| 3233 | MMVEC_CMPGT_HF(hf,"hf","Vector hf Compare ", fVELEM(16), 0x3, 2, hf) |
| 3234 | MMVEC_CMPGT_BF(bf,"bf","Vector bf Compare ", fVELEM(16), 0x3, 2, bf) |
| 3235 | |
| 3236 | /****************************************************************************** |
| 3237 | BFloat arithmetic and max/min instructions |
| 3238 | ******************************************************************************/ |
| 3239 | |
| 3240 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vadd_sf_bf, |
| 3241 | "Vdd32.sf=vadd(Vu32.bf,Vv32.bf)", "Vector IEEE add: bf widen to sf", |
| 3242 | VddV.v[0].sf[i] = fp_add_sf_bf(VuV.bf[2*i], VvV.bf[2*i]); |
| 3243 | VddV.v[1].sf[i] = fp_add_sf_bf(VuV.bf[2*i+1], VvV.bf[2*i+1]); fBFLOAT()) |
| 3244 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vsub_sf_bf, |
| 3245 | "Vdd32.sf=vsub(Vu32.bf,Vv32.bf)", "Vector IEEE sub: bf widen to sf", |
| 3246 | VddV.v[0].sf[i] = fp_sub_sf_bf(VuV.bf[2*i], VvV.bf[2*i]); |
| 3247 | VddV.v[1].sf[i] = fp_sub_sf_bf(VuV.bf[2*i+1], VvV.bf[2*i+1]); fBFLOAT()) |
| 3248 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vmpy_sf_bf, |
| 3249 | "Vdd32.sf=vmpy(Vu32.bf,Vv32.bf)", "Vector IEEE mul: hf widen to sf", |
| 3250 | VddV.v[0].sf[i] = fp_mult_sf_bf(VuV.bf[2*i], VvV.bf[2*i]); |
| 3251 | VddV.v[1].sf[i] = fp_mult_sf_bf(VuV.bf[2*i+1], VvV.bf[2*i+1]); fBFLOAT()) |
| 3252 | ITERATOR_INSN_IEEE_FP_DOUBLE_32(32, vmpy_sf_bf_acc, |
| 3253 | "Vxx32.sf+=vmpy(Vu32.bf,Vv32.bf)", "Vector IEEE fma: hf widen to sf", |
| 3254 | VxxV.v[0].sf[i] = fp_mult_sf_bf_acc(VuV.bf[2*i], VvV.bf[2*i], VxxV.v[0].sf[i]); |
| 3255 | VxxV.v[1].sf[i] = fp_mult_sf_bf_acc(VuV.bf[2*i+1], VvV.bf[2*i+1], VxxV.v[1].sf[i]); |
| 3256 | fCVI_VX_NO_TMP_LD(); fBFLOAT()) |
| 3257 | ITERATOR_INSN_IEEE_FP_16(32, vcvt_bf_sf, |
| 3258 | "Vd32.bf=vcvt(Vu32.sf,Vv32.sf)", "Vector IEEE cvt: sf to bf", |
| 3259 | VdV.bf[2*i] = f32_to_bf16(VuV.sf[i], &env->hvx_fp_status); |
| 3260 | VdV.bf[2*i+1] = f32_to_bf16(VvV.sf[i], &env->hvx_fp_status); fBFLOAT()) |
| 3261 | |
| 3262 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vmax_bf, "Vd32.bf=vmax(Vu32.bf,Vv32.bf)", |
| 3263 | "Vector IEEE max: bf", VdV.bf[i] = fp_max_bf(VuV.bf[i], VvV.bf[i]); |
| 3264 | fBFLOAT()) |
| 3265 | ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vmin_bf, "Vd32.bf=vmin(Vu32.bf,Vv32.bf)", |
| 3266 | "Vector IEEE min: bf", VdV.bf[i] = fp_min_bf(VuV.bf[i], VvV.bf[i]); |
| 3267 | fBFLOAT()) |
| 3268 | |
| 3269 | /****************************************************************************** |
| 3270 | DEBUG Vector/Register Printing |
| 3271 | ******************************************************************************/ |
| 3272 | |
| 3273 | #define PRINT_VU(TYPE, TYPE2, COUNT)\ |
| 3274 | int i; \ |
| 3275 | size4u_t vec_len = fVBYTES();\ |
| 3276 | fprintf(stdout,"V%2d: ",VuN); \ |
| 3277 | for (i=0;i<vec_len>>COUNT;i++) { \ |
| 3278 | fprintf(stdout,TYPE2 " ", VuV.TYPE[i]); \ |
| 3279 | }; \ |
| 3280 | fprintf(stdout,"\\n"); \ |
| 3281 | fflush(stdout);\ |
| 3282 | |
| 3283 | #undef ATTR_VMEM |
| 3284 | #undef ATTR_VMEMU |
| 3285 | #undef ATTR_VMEM_NT |
| 3286 | |
| 3287 | #endif /* NO_MMVEC */ |
| 3288 | |
| 3289 | #ifdef __SELF_DEF_EXTINSN |
| 3290 | #undef EXTINSN |
| 3291 | #undef __SELF_DEF_EXTINSN |
| 3292 | #endif |