| 1 | /* |
| 2 | * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef HEXAGON_MMVEC_H |
| 19 | #define HEXAGON_MMVEC_H |
| 20 | |
| 21 | #include "exec/target_long.h" |
| 22 | #include "qemu/bitmap.h" |
| 23 | |
| 24 | #define MAX_VEC_SIZE_LOGBYTES 7 |
| 25 | #define MAX_VEC_SIZE_BYTES (1 << MAX_VEC_SIZE_LOGBYTES) |
| 26 | |
| 27 | #define NUM_VREGS 32 |
| 28 | #define NUM_QREGS 4 |
| 29 | |
| 30 | typedef uint32_t VRegMask; /* at least NUM_VREGS bits */ |
| 31 | typedef uint32_t QRegMask; /* at least NUM_QREGS bits */ |
| 32 | |
| 33 | #define VECTOR_SIZE_BYTE (fVECSIZE()) |
| 34 | |
| 35 | typedef union { |
| 36 | uint64_t ud[MAX_VEC_SIZE_BYTES / 8]; |
| 37 | int64_t d[MAX_VEC_SIZE_BYTES / 8]; |
| 38 | uint32_t uw[MAX_VEC_SIZE_BYTES / 4]; |
| 39 | int32_t w[MAX_VEC_SIZE_BYTES / 4]; |
| 40 | uint16_t uh[MAX_VEC_SIZE_BYTES / 2]; |
| 41 | int16_t h[MAX_VEC_SIZE_BYTES / 2]; |
| 42 | uint8_t ub[MAX_VEC_SIZE_BYTES / 1]; |
| 43 | int8_t b[MAX_VEC_SIZE_BYTES / 1]; |
| 44 | float32 sf[MAX_VEC_SIZE_BYTES / 4]; |
| 45 | float16 hf[MAX_VEC_SIZE_BYTES / 2]; |
| 46 | bfloat16 bf[MAX_VEC_SIZE_BYTES / 2]; |
| 47 | } MMVector; |
| 48 | |
| 49 | typedef union { |
| 50 | uint64_t ud[2 * MAX_VEC_SIZE_BYTES / 8]; |
| 51 | int64_t d[2 * MAX_VEC_SIZE_BYTES / 8]; |
| 52 | uint32_t uw[2 * MAX_VEC_SIZE_BYTES / 4]; |
| 53 | int32_t w[2 * MAX_VEC_SIZE_BYTES / 4]; |
| 54 | uint16_t uh[2 * MAX_VEC_SIZE_BYTES / 2]; |
| 55 | int16_t h[2 * MAX_VEC_SIZE_BYTES / 2]; |
| 56 | uint8_t ub[2 * MAX_VEC_SIZE_BYTES / 1]; |
| 57 | int8_t b[2 * MAX_VEC_SIZE_BYTES / 1]; |
| 58 | MMVector v[2]; |
| 59 | } MMVectorPair; |
| 60 | |
| 61 | typedef union { |
| 62 | uint64_t ud[MAX_VEC_SIZE_BYTES / 8 / 8]; |
| 63 | int64_t d[MAX_VEC_SIZE_BYTES / 8 / 8]; |
| 64 | uint32_t uw[MAX_VEC_SIZE_BYTES / 4 / 8]; |
| 65 | int32_t w[MAX_VEC_SIZE_BYTES / 4 / 8]; |
| 66 | uint16_t uh[MAX_VEC_SIZE_BYTES / 2 / 8]; |
| 67 | int16_t h[MAX_VEC_SIZE_BYTES / 2 / 8]; |
| 68 | uint8_t ub[MAX_VEC_SIZE_BYTES / 1 / 8]; |
| 69 | int8_t b[MAX_VEC_SIZE_BYTES / 1 / 8]; |
| 70 | } MMQReg; |
| 71 | |
| 72 | typedef struct { |
| 73 | MMVector data; |
| 74 | DECLARE_BITMAP(mask, MAX_VEC_SIZE_BYTES); |
| 75 | target_ulong va[MAX_VEC_SIZE_BYTES]; |
| 76 | bool op; |
| 77 | int op_size; |
| 78 | } VTCMStoreLog; |
| 79 | |
| 80 | |
| 81 | /* Types of vector register assignment */ |
| 82 | typedef enum { |
| 83 | EXT_DFL, /* Default */ |
| 84 | EXT_NEW, /* New - value used in the same packet */ |
| 85 | EXT_TMP /* Temp - value used but not stored to register */ |
| 86 | } VRegWriteType; |
| 87 | |
| 88 | #endif |