| 1 | /* |
| 2 | * x86 KVM CPU type initialization |
| 3 | * |
| 4 | * Copyright 2021 SUSE LLC |
| 5 | * |
| 6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 7 | * See the COPYING file in the top-level directory. |
| 8 | */ |
| 9 | |
| 10 | #include "qemu/osdep.h" |
| 11 | #include "cpu.h" |
| 12 | #include "host-cpu.h" |
| 13 | #include "qapi/error.h" |
| 14 | #include "system/system.h" |
| 15 | #include "hw/core/boards.h" |
| 16 | #include "hw/i386/x86.h" |
| 17 | |
| 18 | #include "kvm_i386.h" |
| 19 | #include "accel/accel-cpu-target.h" |
| 20 | |
| 21 | static void kvm_set_guest_phys_bits(CPUState *cs) |
| 22 | { |
| 23 | X86CPU *cpu = X86_CPU(cs); |
| 24 | uint32_t eax, guest_phys_bits; |
| 25 | |
| 26 | eax = kvm_arch_get_supported_cpuid(cs->kvm_state, 0x80000008, 0, R_EAX); |
| 27 | guest_phys_bits = (eax >> 16) & 0xff; |
| 28 | if (!guest_phys_bits) { |
| 29 | return; |
| 30 | } |
| 31 | cpu->guest_phys_bits = guest_phys_bits; |
| 32 | if (cpu->guest_phys_bits > cpu->phys_bits) { |
| 33 | cpu->guest_phys_bits = cpu->phys_bits; |
| 34 | } |
| 35 | |
| 36 | if (cpu->host_phys_bits && cpu->host_phys_bits_limit && |
| 37 | cpu->guest_phys_bits > cpu->host_phys_bits_limit) { |
| 38 | cpu->guest_phys_bits = cpu->host_phys_bits_limit; |
| 39 | } |
| 40 | } |
| 41 | |
| 42 | static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) |
| 43 | { |
| 44 | X86CPU *cpu = X86_CPU(cs); |
| 45 | X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); |
| 46 | CPUX86State *env = &cpu->env; |
| 47 | bool ret; |
| 48 | |
| 49 | /* |
| 50 | * The realize order is important, since x86_cpu_realize() checks if |
| 51 | * nothing else has been set by the user (or by accelerators) in |
| 52 | * cpu->ucode_rev and cpu->phys_bits, and updates the CPUID results in |
| 53 | * mwait.ecx. |
| 54 | * This accel realization code also assumes cpu features are already expanded. |
| 55 | * |
| 56 | * realize order: |
| 57 | * |
| 58 | * x86_cpu_realizefn(): |
| 59 | * x86_cpu_expand_features() |
| 60 | * cpu_common_realize(): |
| 61 | * accel_cpu_common_realize() |
| 62 | * kvm_cpu_realizefn() |
| 63 | * host_cpu_realizefn() |
| 64 | * kvm_set_guest_phys_bits() |
| 65 | * check/update ucode_rev, phys_bits, guest_phys_bits, mwait |
| 66 | * cpu_exec_realize() (via xcc->parent_realize) |
| 67 | */ |
| 68 | if (xcc->max_features) { |
| 69 | if (enable_cpu_pm) { |
| 70 | if (kvm_has_waitpkg()) { |
| 71 | env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG; |
| 72 | } |
| 73 | |
| 74 | if (env->features[FEAT_1_ECX] & CPUID_EXT_MONITOR) { |
| 75 | host_cpuid(5, 0, &cpu->mwait.eax, &cpu->mwait.ebx, |
| 76 | &cpu->mwait.ecx, &cpu->mwait.edx); |
| 77 | } |
| 78 | } |
| 79 | if (cpu->ucode_rev == 0) { |
| 80 | cpu->ucode_rev = |
| 81 | kvm_arch_get_supported_msr_feature(kvm_state, |
| 82 | MSR_IA32_UCODE_REV); |
| 83 | } |
| 84 | } |
| 85 | ret = host_cpu_realizefn(cs, errp); |
| 86 | if (!ret) { |
| 87 | return ret; |
| 88 | } |
| 89 | |
| 90 | if ((env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) && |
| 91 | cpu->guest_phys_bits == -1) { |
| 92 | kvm_set_guest_phys_bits(cs); |
| 93 | } |
| 94 | |
| 95 | /* |
| 96 | * When SMM is enabled, there is 2 address spaces. Otherwise only 1. |
| 97 | * |
| 98 | * Only initialize address space 0 here, the second one for SMM is |
| 99 | * initialized at register_smram_listener() after machine init done. |
| 100 | */ |
| 101 | cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory); |
| 102 | |
| 103 | return true; |
| 104 | } |
| 105 | |
| 106 | static bool lmce_supported(void) |
| 107 | { |
| 108 | uint64_t mce_cap = 0; |
| 109 | |
| 110 | if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) { |
| 111 | return false; |
| 112 | } |
| 113 | return !!(mce_cap & MCG_LMCE_P); |
| 114 | } |
| 115 | |
| 116 | static void kvm_cpu_max_instance_init(X86CPU *cpu) |
| 117 | { |
| 118 | CPUX86State *env = &cpu->env; |
| 119 | KVMState *s = kvm_state; |
| 120 | |
| 121 | object_property_set_bool(OBJECT(cpu), "pmu", true, &error_abort); |
| 122 | |
| 123 | if (lmce_supported()) { |
| 124 | object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort); |
| 125 | } |
| 126 | |
| 127 | env->cpuid_min_level = |
| 128 | kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); |
| 129 | env->cpuid_min_xlevel = |
| 130 | kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); |
| 131 | env->cpuid_min_xlevel2 = |
| 132 | kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); |
| 133 | } |
| 134 | |
| 135 | static void kvm_cpu_xsave_init(void) |
| 136 | { |
| 137 | static bool first = true; |
| 138 | uint32_t eax, ebx, ecx, edx; |
| 139 | int i; |
| 140 | |
| 141 | if (!first) { |
| 142 | return; |
| 143 | } |
| 144 | first = false; |
| 145 | |
| 146 | /* x87 and SSE states are in the legacy region of the XSAVE area. */ |
| 147 | x86_ext_save_areas[XSTATE_FP_BIT].offset = 0; |
| 148 | x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0; |
| 149 | |
| 150 | for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) { |
| 151 | ExtSaveArea *esa = &x86_ext_save_areas[i]; |
| 152 | |
| 153 | if (!esa->size) { |
| 154 | continue; |
| 155 | } |
| 156 | host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx); |
| 157 | if (eax != 0) { |
| 158 | assert(esa->size == eax); |
| 159 | esa->offset = ebx; |
| 160 | esa->ecx = ecx; |
| 161 | } |
| 162 | } |
| 163 | } |
| 164 | |
| 165 | /* |
| 166 | * KVM-specific features that are automatically added/removed |
| 167 | * from cpudef models when KVM is enabled. |
| 168 | * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. |
| 169 | * |
| 170 | * NOTE: features can be enabled by default only if they were |
| 171 | * already available in the oldest kernel version supported |
| 172 | * by the KVM accelerator (see "OS requirements" section at |
| 173 | * docs/system/target-i386.rst) |
| 174 | */ |
| 175 | static PropValue kvm_default_props[] = { |
| 176 | { "kvmclock", "on" }, |
| 177 | { "kvm-nopiodelay", "on" }, |
| 178 | { "kvm-asyncpf", "on" }, |
| 179 | { "kvm-steal-time", "on" }, |
| 180 | { "kvm-pv-eoi", "on" }, |
| 181 | { "kvmclock-stable-bit", "on" }, |
| 182 | { "x2apic", "on" }, |
| 183 | { "kvm-msi-ext-dest-id", "off" }, |
| 184 | { "acpi", "off" }, |
| 185 | { "monitor", "off" }, |
| 186 | { "svm", "off" }, |
| 187 | { NULL, NULL }, |
| 188 | }; |
| 189 | |
| 190 | /* |
| 191 | * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. |
| 192 | */ |
| 193 | static void x86_cpu_change_kvm_default(const char *prop, const char *value) |
| 194 | { |
| 195 | PropValue *pv; |
| 196 | for (pv = kvm_default_props; pv->prop; pv++) { |
| 197 | if (!strcmp(pv->prop, prop)) { |
| 198 | pv->value = value; |
| 199 | break; |
| 200 | } |
| 201 | } |
| 202 | |
| 203 | /* |
| 204 | * It is valid to call this function only for properties that |
| 205 | * are already present in the kvm_default_props table. |
| 206 | */ |
| 207 | assert(pv->prop); |
| 208 | } |
| 209 | |
| 210 | static void kvm_cpu_instance_init(CPUState *cs) |
| 211 | { |
| 212 | X86CPU *cpu = X86_CPU(cs); |
| 213 | X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); |
| 214 | |
| 215 | host_cpu_instance_init(cpu); |
| 216 | |
| 217 | if (xcc->model) { |
| 218 | /* only applies to builtin_x86_defs cpus */ |
| 219 | if (!kvm_irqchip_in_kernel()) { |
| 220 | x86_cpu_change_kvm_default("x2apic", "off"); |
| 221 | } else if (kvm_irqchip_is_split()) { |
| 222 | x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on"); |
| 223 | } |
| 224 | |
| 225 | /* Special cases not set in the X86CPUDefinition structs: */ |
| 226 | x86_cpu_apply_props(cpu, kvm_default_props); |
| 227 | } |
| 228 | |
| 229 | if (xcc->max_features) { |
| 230 | kvm_cpu_max_instance_init(cpu); |
| 231 | } |
| 232 | |
| 233 | kvm_cpu_xsave_init(); |
| 234 | } |
| 235 | |
| 236 | static void kvm_cpu_accel_class_init(ObjectClass *oc, const void *data) |
| 237 | { |
| 238 | AccelCPUClass *acc = ACCEL_CPU_CLASS(oc); |
| 239 | |
| 240 | acc->cpu_target_realize = kvm_cpu_realizefn; |
| 241 | acc->cpu_instance_init = kvm_cpu_instance_init; |
| 242 | } |
| 243 | static const TypeInfo kvm_cpu_accel_type_info = { |
| 244 | .name = ACCEL_CPU_NAME("kvm"), |
| 245 | |
| 246 | .parent = TYPE_ACCEL_CPU, |
| 247 | .class_init = kvm_cpu_accel_class_init, |
| 248 | .abstract = true, |
| 249 | }; |
| 250 | static void kvm_cpu_accel_register_types(void) |
| 251 | { |
| 252 | type_register_static(&kvm_cpu_accel_type_info); |
| 253 | } |
| 254 | type_init(kvm_cpu_accel_register_types); |