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1 /*
2 * TCG specific prototypes for helpers
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef I386_HELPER_TCG_H
21 #define I386_HELPER_TCG_H
22
23 #include "qemu/host-utils.h"
24
25 /* Maximum instruction code size */
26 #define TARGET_MAX_INSN_SIZE 16
27
28 #if defined(TARGET_X86_64)
29 # define TCG_PHYS_ADDR_BITS 40
30 #else
31 # define TCG_PHYS_ADDR_BITS 36
32 #endif
33
34 /**
35 * x86_cpu_do_interrupt:
36 * @cpu: vCPU the interrupt is to be handled by.
37 */
38 void x86_cpu_do_interrupt(CPUState *cpu);
39 #ifndef CONFIG_USER_ONLY
40 bool x86_cpu_exec_halt(CPUState *cpu);
41 bool x86_need_replay_interrupt(int interrupt_request);
42 bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req);
43 #endif
44
45 void breakpoint_handler(CPUState *cs);
46
47 /* n must be a constant to be efficient */
48 static inline target_long lshift(target_long x, int n)
49 {
50 if (n >= 0) {
51 return x << n;
52 } else {
53 return x >> (-n);
54 }
55 }
56
57 /* translate.c */
58 void tcg_x86_init(void);
59 void x86_translate_code(CPUState *cs, TranslationBlock *tb,
60 int *max_insns, vaddr pc, void *host_pc);
61
62 /* excp_helper.c */
63 G_NORETURN void raise_exception(CPUX86State *env, int exception_index);
64 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
65 uintptr_t retaddr);
66 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
67 int error_code);
68 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
69 int error_code, uintptr_t retaddr);
70 G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend);
71 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr,
72 MMUAccessType access_type,
73 uintptr_t retaddr);
74 #ifdef CONFIG_USER_ONLY
75 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
76 MMUAccessType access_type,
77 bool maperr, uintptr_t ra);
78 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
79 MMUAccessType access_type, uintptr_t ra);
80 #else
81 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
82 MMUAccessType access_type, int mmu_idx,
83 bool probe, uintptr_t retaddr);
84 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
85 MMUAccessType access_type,
86 int mmu_idx, uintptr_t retaddr);
87 #endif
88
89 /* cc_helper.c */
90 static inline unsigned int compute_pf(uint8_t x)
91 {
92 return !parity8(x) * CC_P;
93 }
94
95 /* misc_helper.c */
96 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
97
98 /* system/svm_helper.c */
99 #ifndef CONFIG_USER_ONLY
100 G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint64_t exit_code,
101 uint64_t exit_info_1, uintptr_t retaddr);
102 void do_vmexit(CPUX86State *env);
103 #endif
104
105 /* seg_helper.c */
106 void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw);
107 void do_interrupt_all(X86CPU *cpu, int intno, int is_int,
108 int error_code, target_ulong next_eip, int is_hw);
109 void handle_even_inj(CPUX86State *env, int intno, int is_int,
110 int error_code, int is_hw, int rm);
111 int exception_has_error_code(int intno);
112
113 /* smm_helper.c */
114 void do_smm_enter(X86CPU *cpu);
115
116 /* system/bpt_helper.c */
117 bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update);
118
119 /*
120 * Do the tasks usually performed by gen_eob(). Callers of this function
121 * should also handle TF as appropriate.
122 */
123 static inline void do_end_instruction(CPUX86State *env)
124 {
125 /* needed if sti is just before */
126 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
127 env->eflags &= ~HF_RF_MASK;
128 }
129 #endif /* I386_HELPER_TCG_H */