| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * QEMU LoongArch KVM |
| 4 | * |
| 5 | * Copyright (c) 2023 Loongson Technology Corporation Limited |
| 6 | */ |
| 7 | |
| 8 | #include "qemu/osdep.h" |
| 9 | #include "exec/target_long.h" |
| 10 | #include <sys/ioctl.h> |
| 11 | #include <linux/kvm.h> |
| 12 | #include "asm-loongarch/kvm_para.h" |
| 13 | #include "qapi/error.h" |
| 14 | #include "qemu/timer.h" |
| 15 | #include "qemu/error-report.h" |
| 16 | #include "qemu/main-loop.h" |
| 17 | #include "system/system.h" |
| 18 | #include "system/kvm.h" |
| 19 | #include "system/kvm_int.h" |
| 20 | #include "hw/pci/pci.h" |
| 21 | #include "exec/memattrs.h" |
| 22 | #include "system/address-spaces.h" |
| 23 | #include "hw/core/boards.h" |
| 24 | #include "hw/core/irq.h" |
| 25 | #include "hw/loongarch/virt.h" |
| 26 | #include "qemu/log.h" |
| 27 | #include "hw/core/loader.h" |
| 28 | #include "system/runstate.h" |
| 29 | #include "cpu-csr.h" |
| 30 | #include "kvm_loongarch.h" |
| 31 | #include "trace.h" |
| 32 | |
| 33 | static bool cap_has_mp_state; |
| 34 | static unsigned int brk_insn; |
| 35 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
| 36 | KVM_CAP_LAST_INFO |
| 37 | }; |
| 38 | |
| 39 | static bool kvm_cpu_has_msgint(CPUState *cs) |
| 40 | { |
| 41 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 42 | |
| 43 | return FIELD_EX64(cpu->env.cpucfg[1], CPUCFG1, MSG_INT); |
| 44 | } |
| 45 | |
| 46 | static int kvm_get_stealtime(CPUState *cs) |
| 47 | { |
| 48 | CPULoongArchState *env = cpu_env(cs); |
| 49 | int err; |
| 50 | struct kvm_device_attr attr = { |
| 51 | .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, |
| 52 | .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, |
| 53 | .addr = (uint64_t)&env->stealtime.guest_addr, |
| 54 | }; |
| 55 | |
| 56 | err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 57 | if (err) { |
| 58 | return 0; |
| 59 | } |
| 60 | |
| 61 | err = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); |
| 62 | if (err) { |
| 63 | error_report("PVTIME: KVM_GET_DEVICE_ATTR: %s", strerror(errno)); |
| 64 | return err; |
| 65 | } |
| 66 | |
| 67 | return 0; |
| 68 | } |
| 69 | |
| 70 | static int kvm_set_stealtime(CPUState *cs) |
| 71 | { |
| 72 | CPULoongArchState *env = cpu_env(cs); |
| 73 | int err; |
| 74 | struct kvm_device_attr attr = { |
| 75 | .group = KVM_LOONGARCH_VCPU_PVTIME_CTRL, |
| 76 | .attr = KVM_LOONGARCH_VCPU_PVTIME_GPA, |
| 77 | .addr = (uint64_t)&env->stealtime.guest_addr, |
| 78 | }; |
| 79 | |
| 80 | err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 81 | if (err) { |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr); |
| 86 | if (err) { |
| 87 | error_report("PVTIME: KVM_SET_DEVICE_ATTR %s with gpa "TARGET_FMT_lx, |
| 88 | strerror(errno), env->stealtime.guest_addr); |
| 89 | return err; |
| 90 | } |
| 91 | |
| 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | static int kvm_set_pv_features(CPUState *cs) |
| 96 | { |
| 97 | CPULoongArchState *env = cpu_env(cs); |
| 98 | int err; |
| 99 | uint64_t val; |
| 100 | struct kvm_device_attr attr = { |
| 101 | .group = KVM_LOONGARCH_VCPU_CPUCFG, |
| 102 | .attr = CPUCFG_KVM_FEATURE, |
| 103 | .addr = (uint64_t)&val, |
| 104 | }; |
| 105 | |
| 106 | err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 107 | if (err) { |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | val = env->pv_features; |
| 112 | err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, &attr); |
| 113 | if (err) { |
| 114 | error_report("Fail to set pv feature "TARGET_FMT_lx " with error %s", |
| 115 | val, strerror(errno)); |
| 116 | return err; |
| 117 | } |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static int kvm_loongarch_get_regs_core(CPUState *cs) |
| 123 | { |
| 124 | int ret = 0; |
| 125 | int i; |
| 126 | struct kvm_regs regs; |
| 127 | CPULoongArchState *env = cpu_env(cs); |
| 128 | |
| 129 | /* Get the current register set as KVM seems it */ |
| 130 | ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
| 131 | if (ret < 0) { |
| 132 | trace_kvm_failed_get_regs_core(strerror(errno)); |
| 133 | return ret; |
| 134 | } |
| 135 | /* gpr[0] value is always 0 */ |
| 136 | env->gpr[0] = 0; |
| 137 | for (i = 1; i < 32; i++) { |
| 138 | env->gpr[i] = regs.gpr[i]; |
| 139 | } |
| 140 | |
| 141 | env->pc = regs.pc; |
| 142 | return ret; |
| 143 | } |
| 144 | |
| 145 | static int kvm_loongarch_put_regs_core(CPUState *cs) |
| 146 | { |
| 147 | int ret = 0; |
| 148 | int i; |
| 149 | struct kvm_regs regs; |
| 150 | CPULoongArchState *env = cpu_env(cs); |
| 151 | |
| 152 | /* Set the registers based on QEMU's view of things */ |
| 153 | for (i = 0; i < 32; i++) { |
| 154 | regs.gpr[i] = env->gpr[i]; |
| 155 | } |
| 156 | |
| 157 | regs.pc = env->pc; |
| 158 | ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
| 159 | if (ret < 0) { |
| 160 | trace_kvm_failed_put_regs_core(strerror(errno)); |
| 161 | } |
| 162 | |
| 163 | return ret; |
| 164 | } |
| 165 | |
| 166 | static int kvm_loongarch_put_pmu(CPUState *cs) |
| 167 | { |
| 168 | int i, ret = 0; |
| 169 | CPULoongArchState *env = cpu_env(cs); |
| 170 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 171 | CPUSysState *sys = env_sys(env); |
| 172 | |
| 173 | if (cpu->pmu != ON_OFF_AUTO_ON) { |
| 174 | return 0; |
| 175 | } |
| 176 | |
| 177 | for (i = 0; i < env->perf_event_num; i++) { |
| 178 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCTRL(i)), |
| 179 | &sys->CSR_PERFCTRL[i]); |
| 180 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCNTR(i)), |
| 181 | &sys->CSR_PERFCNTR[i]); |
| 182 | } |
| 183 | |
| 184 | return ret; |
| 185 | } |
| 186 | |
| 187 | static int kvm_loongarch_get_pmu(CPUState *cs) |
| 188 | { |
| 189 | int i, ret = 0; |
| 190 | CPULoongArchState *env = cpu_env(cs); |
| 191 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 192 | CPUSysState *sys = env_sys(env); |
| 193 | |
| 194 | if (cpu->pmu != ON_OFF_AUTO_ON) { |
| 195 | return 0; |
| 196 | } |
| 197 | |
| 198 | for (i = 0; i < env->perf_event_num; i++) { |
| 199 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCTRL(i)), |
| 200 | &sys->CSR_PERFCTRL[i]); |
| 201 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PERFCNTR(i)), |
| 202 | &sys->CSR_PERFCNTR[i]); |
| 203 | } |
| 204 | |
| 205 | return ret; |
| 206 | } |
| 207 | |
| 208 | static int kvm_loongarch_get_csr(CPUState *cs) |
| 209 | { |
| 210 | int ret = 0; |
| 211 | CPULoongArchState *env = cpu_env(cs); |
| 212 | CPUSysState *sys = env_sys(env); |
| 213 | |
| 214 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), |
| 215 | &sys->CSR_CRMD); |
| 216 | |
| 217 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRMD), |
| 218 | &sys->CSR_PRMD); |
| 219 | |
| 220 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_EUEN), |
| 221 | &sys->CSR_EUEN); |
| 222 | |
| 223 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MISC), |
| 224 | &sys->CSR_MISC); |
| 225 | |
| 226 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ECFG), |
| 227 | &sys->CSR_ECFG); |
| 228 | |
| 229 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ESTAT), |
| 230 | &sys->CSR_ESTAT); |
| 231 | |
| 232 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ERA), |
| 233 | &sys->CSR_ERA); |
| 234 | |
| 235 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_BADV), |
| 236 | &sys->CSR_BADV); |
| 237 | |
| 238 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_BADI), |
| 239 | &sys->CSR_BADI); |
| 240 | |
| 241 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_EENTRY), |
| 242 | &sys->CSR_EENTRY); |
| 243 | |
| 244 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBIDX), |
| 245 | &sys->CSR_TLBIDX); |
| 246 | |
| 247 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBEHI), |
| 248 | &sys->CSR_TLBEHI); |
| 249 | |
| 250 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBELO0), |
| 251 | &sys->CSR_TLBELO0); |
| 252 | |
| 253 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBELO1), |
| 254 | &sys->CSR_TLBELO1); |
| 255 | |
| 256 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ASID), |
| 257 | &sys->CSR_ASID); |
| 258 | |
| 259 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGDL), |
| 260 | &sys->CSR_PGDL); |
| 261 | |
| 262 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGDH), |
| 263 | &sys->CSR_PGDH); |
| 264 | |
| 265 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGD), |
| 266 | &sys->CSR_PGD); |
| 267 | |
| 268 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PWCL), |
| 269 | &sys->CSR_PWCL); |
| 270 | |
| 271 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PWCH), |
| 272 | &sys->CSR_PWCH); |
| 273 | |
| 274 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_STLBPS), |
| 275 | &sys->CSR_STLBPS); |
| 276 | |
| 277 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_RVACFG), |
| 278 | &sys->CSR_RVACFG); |
| 279 | |
| 280 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CPUID), |
| 281 | &sys->CSR_CPUID); |
| 282 | |
| 283 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG1), |
| 284 | &sys->CSR_PRCFG1); |
| 285 | |
| 286 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG2), |
| 287 | &sys->CSR_PRCFG2); |
| 288 | |
| 289 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG3), |
| 290 | &sys->CSR_PRCFG3); |
| 291 | |
| 292 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(0)), |
| 293 | &sys->CSR_SAVE[0]); |
| 294 | |
| 295 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(1)), |
| 296 | &sys->CSR_SAVE[1]); |
| 297 | |
| 298 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(2)), |
| 299 | &sys->CSR_SAVE[2]); |
| 300 | |
| 301 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(3)), |
| 302 | &sys->CSR_SAVE[3]); |
| 303 | |
| 304 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(4)), |
| 305 | &sys->CSR_SAVE[4]); |
| 306 | |
| 307 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(5)), |
| 308 | &sys->CSR_SAVE[5]); |
| 309 | |
| 310 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(6)), |
| 311 | &sys->CSR_SAVE[6]); |
| 312 | |
| 313 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(7)), |
| 314 | &sys->CSR_SAVE[7]); |
| 315 | |
| 316 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TID), |
| 317 | &sys->CSR_TID); |
| 318 | |
| 319 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CNTC), |
| 320 | &sys->CSR_CNTC); |
| 321 | |
| 322 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TICLR), |
| 323 | &sys->CSR_TICLR); |
| 324 | |
| 325 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_LLBCTL), |
| 326 | &sys->CSR_LLBCTL); |
| 327 | |
| 328 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_IMPCTL1), |
| 329 | &sys->CSR_IMPCTL1); |
| 330 | |
| 331 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_IMPCTL2), |
| 332 | &sys->CSR_IMPCTL2); |
| 333 | |
| 334 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRENTRY), |
| 335 | &sys->CSR_TLBRENTRY); |
| 336 | |
| 337 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRBADV), |
| 338 | &sys->CSR_TLBRBADV); |
| 339 | |
| 340 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRERA), |
| 341 | &sys->CSR_TLBRERA); |
| 342 | |
| 343 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRSAVE), |
| 344 | &sys->CSR_TLBRSAVE); |
| 345 | |
| 346 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRELO0), |
| 347 | &sys->CSR_TLBRELO0); |
| 348 | |
| 349 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRELO1), |
| 350 | &sys->CSR_TLBRELO1); |
| 351 | |
| 352 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBREHI), |
| 353 | &sys->CSR_TLBREHI); |
| 354 | |
| 355 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRPRMD), |
| 356 | &sys->CSR_TLBRPRMD); |
| 357 | |
| 358 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(0)), |
| 359 | &sys->CSR_DMW[0]); |
| 360 | |
| 361 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(1)), |
| 362 | &sys->CSR_DMW[1]); |
| 363 | |
| 364 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(2)), |
| 365 | &sys->CSR_DMW[2]); |
| 366 | |
| 367 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(3)), |
| 368 | &sys->CSR_DMW[3]); |
| 369 | |
| 370 | ret |= kvm_loongarch_get_pmu(cs); |
| 371 | |
| 372 | /* |
| 373 | * CSR register MSGIS getting must be put after CSR register CSR_ESTAT, |
| 374 | * Since register CSR_ESTAT will sync software pending MSGINT status to |
| 375 | * hardware register and modify HW CSR MSGIS registers. |
| 376 | */ |
| 377 | if (kvm_cpu_has_msgint(cs)) { |
| 378 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(0)), |
| 379 | &sys->CSR_MSGIS[0]); |
| 380 | |
| 381 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(1)), |
| 382 | &sys->CSR_MSGIS[1]); |
| 383 | |
| 384 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(2)), |
| 385 | &sys->CSR_MSGIS[2]); |
| 386 | |
| 387 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(3)), |
| 388 | &sys->CSR_MSGIS[3]); |
| 389 | } |
| 390 | |
| 391 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TVAL), |
| 392 | &sys->CSR_TVAL); |
| 393 | |
| 394 | ret |= kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TCFG), |
| 395 | &sys->CSR_TCFG); |
| 396 | |
| 397 | return ret; |
| 398 | } |
| 399 | |
| 400 | static int kvm_loongarch_put_csr(CPUState *cs, KvmPutState level) |
| 401 | { |
| 402 | int ret = 0; |
| 403 | CPULoongArchState *env = cpu_env(cs); |
| 404 | CPUSysState *sys = env_sys(env); |
| 405 | |
| 406 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), |
| 407 | &sys->CSR_CRMD); |
| 408 | |
| 409 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRMD), |
| 410 | &sys->CSR_PRMD); |
| 411 | |
| 412 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_EUEN), |
| 413 | &sys->CSR_EUEN); |
| 414 | |
| 415 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MISC), |
| 416 | &sys->CSR_MISC); |
| 417 | |
| 418 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ECFG), |
| 419 | &sys->CSR_ECFG); |
| 420 | |
| 421 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ESTAT), |
| 422 | &sys->CSR_ESTAT); |
| 423 | |
| 424 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ERA), |
| 425 | &sys->CSR_ERA); |
| 426 | |
| 427 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_BADV), |
| 428 | &sys->CSR_BADV); |
| 429 | |
| 430 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_BADI), |
| 431 | &sys->CSR_BADI); |
| 432 | |
| 433 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_EENTRY), |
| 434 | &sys->CSR_EENTRY); |
| 435 | |
| 436 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBIDX), |
| 437 | &sys->CSR_TLBIDX); |
| 438 | |
| 439 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBEHI), |
| 440 | &sys->CSR_TLBEHI); |
| 441 | |
| 442 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBELO0), |
| 443 | &sys->CSR_TLBELO0); |
| 444 | |
| 445 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBELO1), |
| 446 | &sys->CSR_TLBELO1); |
| 447 | |
| 448 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_ASID), |
| 449 | &sys->CSR_ASID); |
| 450 | |
| 451 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGDL), |
| 452 | &sys->CSR_PGDL); |
| 453 | |
| 454 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGDH), |
| 455 | &sys->CSR_PGDH); |
| 456 | |
| 457 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PGD), |
| 458 | &sys->CSR_PGD); |
| 459 | |
| 460 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PWCL), |
| 461 | &sys->CSR_PWCL); |
| 462 | |
| 463 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PWCH), |
| 464 | &sys->CSR_PWCH); |
| 465 | |
| 466 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_STLBPS), |
| 467 | &sys->CSR_STLBPS); |
| 468 | |
| 469 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_RVACFG), |
| 470 | &sys->CSR_RVACFG); |
| 471 | |
| 472 | /* CPUID is constant after poweron, it should be set only once */ |
| 473 | if (level >= KVM_PUT_FULL_STATE) { |
| 474 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CPUID), |
| 475 | &sys->CSR_CPUID); |
| 476 | } |
| 477 | |
| 478 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG1), |
| 479 | &sys->CSR_PRCFG1); |
| 480 | |
| 481 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG2), |
| 482 | &sys->CSR_PRCFG2); |
| 483 | |
| 484 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_PRCFG3), |
| 485 | &sys->CSR_PRCFG3); |
| 486 | |
| 487 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(0)), |
| 488 | &sys->CSR_SAVE[0]); |
| 489 | |
| 490 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(1)), |
| 491 | &sys->CSR_SAVE[1]); |
| 492 | |
| 493 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(2)), |
| 494 | &sys->CSR_SAVE[2]); |
| 495 | |
| 496 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(3)), |
| 497 | &sys->CSR_SAVE[3]); |
| 498 | |
| 499 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(4)), |
| 500 | &sys->CSR_SAVE[4]); |
| 501 | |
| 502 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(5)), |
| 503 | &sys->CSR_SAVE[5]); |
| 504 | |
| 505 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(6)), |
| 506 | &sys->CSR_SAVE[6]); |
| 507 | |
| 508 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_SAVE(7)), |
| 509 | &sys->CSR_SAVE[7]); |
| 510 | |
| 511 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TID), |
| 512 | &sys->CSR_TID); |
| 513 | |
| 514 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CNTC), |
| 515 | &sys->CSR_CNTC); |
| 516 | |
| 517 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TICLR), |
| 518 | &sys->CSR_TICLR); |
| 519 | |
| 520 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_LLBCTL), |
| 521 | &sys->CSR_LLBCTL); |
| 522 | |
| 523 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_IMPCTL1), |
| 524 | &sys->CSR_IMPCTL1); |
| 525 | |
| 526 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_IMPCTL2), |
| 527 | &sys->CSR_IMPCTL2); |
| 528 | |
| 529 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRENTRY), |
| 530 | &sys->CSR_TLBRENTRY); |
| 531 | |
| 532 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRBADV), |
| 533 | &sys->CSR_TLBRBADV); |
| 534 | |
| 535 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRERA), |
| 536 | &sys->CSR_TLBRERA); |
| 537 | |
| 538 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRSAVE), |
| 539 | &sys->CSR_TLBRSAVE); |
| 540 | |
| 541 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRELO0), |
| 542 | &sys->CSR_TLBRELO0); |
| 543 | |
| 544 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRELO1), |
| 545 | &sys->CSR_TLBRELO1); |
| 546 | |
| 547 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBREHI), |
| 548 | &sys->CSR_TLBREHI); |
| 549 | |
| 550 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TLBRPRMD), |
| 551 | &sys->CSR_TLBRPRMD); |
| 552 | |
| 553 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(0)), |
| 554 | &sys->CSR_DMW[0]); |
| 555 | |
| 556 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(1)), |
| 557 | &sys->CSR_DMW[1]); |
| 558 | |
| 559 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(2)), |
| 560 | &sys->CSR_DMW[2]); |
| 561 | |
| 562 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_DMW(3)), |
| 563 | &sys->CSR_DMW[3]); |
| 564 | |
| 565 | ret |= kvm_loongarch_put_pmu(cs); |
| 566 | |
| 567 | if (kvm_cpu_has_msgint(cs)) { |
| 568 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(0)), |
| 569 | &sys->CSR_MSGIS[0]); |
| 570 | |
| 571 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(1)), |
| 572 | &sys->CSR_MSGIS[1]); |
| 573 | |
| 574 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(2)), |
| 575 | &sys->CSR_MSGIS[2]); |
| 576 | |
| 577 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_MSGIS(3)), |
| 578 | &sys->CSR_MSGIS[3]); |
| 579 | } |
| 580 | |
| 581 | /* |
| 582 | * timer cfg must be put at last since it is used to enable |
| 583 | * guest timer |
| 584 | */ |
| 585 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TVAL), |
| 586 | &sys->CSR_TVAL); |
| 587 | |
| 588 | ret |= kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_TCFG), |
| 589 | &sys->CSR_TCFG); |
| 590 | return ret; |
| 591 | } |
| 592 | |
| 593 | static int kvm_loongarch_get_regs_fp(CPUState *cs) |
| 594 | { |
| 595 | int ret, i; |
| 596 | struct kvm_fpu fpu; |
| 597 | CPULoongArchState *env = cpu_env(cs); |
| 598 | |
| 599 | ret = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); |
| 600 | if (ret < 0) { |
| 601 | trace_kvm_failed_get_fpu(strerror(errno)); |
| 602 | return ret; |
| 603 | } |
| 604 | |
| 605 | env->fcsr0 = fpu.fcsr; |
| 606 | for (i = 0; i < 32; i++) { |
| 607 | env->fpr[i].vreg.UD[0] = fpu.fpr[i].val64[0]; |
| 608 | env->fpr[i].vreg.UD[1] = fpu.fpr[i].val64[1]; |
| 609 | env->fpr[i].vreg.UD[2] = fpu.fpr[i].val64[2]; |
| 610 | env->fpr[i].vreg.UD[3] = fpu.fpr[i].val64[3]; |
| 611 | } |
| 612 | for (i = 0; i < 8; i++) { |
| 613 | env->cf[i] = fpu.fcc & 0xFF; |
| 614 | fpu.fcc = fpu.fcc >> 8; |
| 615 | } |
| 616 | |
| 617 | return ret; |
| 618 | } |
| 619 | |
| 620 | static int kvm_loongarch_put_regs_fp(CPUState *cs) |
| 621 | { |
| 622 | int ret, i; |
| 623 | struct kvm_fpu fpu; |
| 624 | CPULoongArchState *env = cpu_env(cs); |
| 625 | |
| 626 | fpu.fcsr = env->fcsr0; |
| 627 | fpu.fcc = 0; |
| 628 | for (i = 0; i < 32; i++) { |
| 629 | fpu.fpr[i].val64[0] = env->fpr[i].vreg.UD[0]; |
| 630 | fpu.fpr[i].val64[1] = env->fpr[i].vreg.UD[1]; |
| 631 | fpu.fpr[i].val64[2] = env->fpr[i].vreg.UD[2]; |
| 632 | fpu.fpr[i].val64[3] = env->fpr[i].vreg.UD[3]; |
| 633 | } |
| 634 | |
| 635 | for (i = 0; i < 8; i++) { |
| 636 | fpu.fcc |= env->cf[i] << (8 * i); |
| 637 | } |
| 638 | |
| 639 | ret = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
| 640 | if (ret < 0) { |
| 641 | trace_kvm_failed_put_fpu(strerror(errno)); |
| 642 | } |
| 643 | |
| 644 | return ret; |
| 645 | } |
| 646 | |
| 647 | static int kvm_loongarch_put_lbt(CPUState *cs) |
| 648 | { |
| 649 | CPULoongArchState *env = cpu_env(cs); |
| 650 | uint64_t val; |
| 651 | int ret; |
| 652 | |
| 653 | /* check whether vm support LBT firstly */ |
| 654 | if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { |
| 655 | return 0; |
| 656 | } |
| 657 | |
| 658 | /* set six LBT registers including scr0-scr3, eflags, ftop */ |
| 659 | ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); |
| 660 | ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); |
| 661 | ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); |
| 662 | ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); |
| 663 | /* |
| 664 | * Be cautious, KVM_REG_LOONGARCH_LBT_FTOP is defined as 64-bit however |
| 665 | * lbt.ftop is 32-bit; the same with KVM_REG_LOONGARCH_LBT_EFLAGS register |
| 666 | */ |
| 667 | val = env->lbt.eflags; |
| 668 | ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); |
| 669 | val = env->lbt.ftop; |
| 670 | ret |= kvm_set_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); |
| 671 | |
| 672 | return ret; |
| 673 | } |
| 674 | |
| 675 | static int kvm_loongarch_get_lbt(CPUState *cs) |
| 676 | { |
| 677 | CPULoongArchState *env = cpu_env(cs); |
| 678 | uint64_t val; |
| 679 | int ret; |
| 680 | |
| 681 | /* check whether vm support LBT firstly */ |
| 682 | if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LBT_ALL) != 7) { |
| 683 | return 0; |
| 684 | } |
| 685 | |
| 686 | /* get six LBT registers including scr0-scr3, eflags, ftop */ |
| 687 | ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR0, &env->lbt.scr0); |
| 688 | ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR1, &env->lbt.scr1); |
| 689 | ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR2, &env->lbt.scr2); |
| 690 | ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_SCR3, &env->lbt.scr3); |
| 691 | ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_EFLAGS, &val); |
| 692 | env->lbt.eflags = (uint32_t)val; |
| 693 | ret |= kvm_get_one_reg(cs, KVM_REG_LOONGARCH_LBT_FTOP, &val); |
| 694 | env->lbt.ftop = (uint32_t)val; |
| 695 | |
| 696 | return ret; |
| 697 | } |
| 698 | |
| 699 | void kvm_arch_reset_vcpu(CPUState *cs) |
| 700 | { |
| 701 | CPULoongArchState *env = cpu_env(cs); |
| 702 | int ret = 0; |
| 703 | uint64_t unused = 0; |
| 704 | |
| 705 | env->mp_state = KVM_MP_STATE_RUNNABLE; |
| 706 | ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_VCPU_RESET, &unused); |
| 707 | if (ret) { |
| 708 | error_report("Failed to set KVM_REG_LOONGARCH_VCPU_RESET: %s", |
| 709 | strerror(errno)); |
| 710 | exit(EXIT_FAILURE); |
| 711 | } |
| 712 | } |
| 713 | |
| 714 | static int kvm_loongarch_get_mpstate(CPUState *cs) |
| 715 | { |
| 716 | int ret = 0; |
| 717 | struct kvm_mp_state mp_state; |
| 718 | CPULoongArchState *env = cpu_env(cs); |
| 719 | |
| 720 | if (cap_has_mp_state) { |
| 721 | ret = kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state); |
| 722 | if (ret) { |
| 723 | trace_kvm_failed_get_mpstate(strerror(errno)); |
| 724 | return ret; |
| 725 | } |
| 726 | env->mp_state = mp_state.mp_state; |
| 727 | } |
| 728 | |
| 729 | return ret; |
| 730 | } |
| 731 | |
| 732 | static int kvm_loongarch_put_mpstate(CPUState *cs) |
| 733 | { |
| 734 | int ret = 0; |
| 735 | struct kvm_mp_state mp_state = { |
| 736 | .mp_state = cpu_env(cs)->mp_state |
| 737 | }; |
| 738 | |
| 739 | if (cap_has_mp_state) { |
| 740 | ret = kvm_vcpu_ioctl(cs, KVM_SET_MP_STATE, &mp_state); |
| 741 | if (ret) { |
| 742 | trace_kvm_failed_put_mpstate(strerror(errno)); |
| 743 | } |
| 744 | } |
| 745 | |
| 746 | return ret; |
| 747 | } |
| 748 | |
| 749 | static int kvm_loongarch_get_cpucfg(CPUState *cs) |
| 750 | { |
| 751 | int i, ret = 0; |
| 752 | uint64_t val; |
| 753 | CPULoongArchState *env = cpu_env(cs); |
| 754 | |
| 755 | for (i = 0; i < 21; i++) { |
| 756 | int r = kvm_get_one_reg(cs, KVM_IOC_CPUCFG(i), &val); |
| 757 | ret |= r; |
| 758 | if (!r) { |
| 759 | env->cpucfg[i] = (uint32_t)val; |
| 760 | } |
| 761 | } |
| 762 | return ret; |
| 763 | } |
| 764 | |
| 765 | static int kvm_check_cpucfg2(CPUState *cs) |
| 766 | { |
| 767 | int ret; |
| 768 | uint64_t val = 0; |
| 769 | struct kvm_device_attr attr = { |
| 770 | .group = KVM_LOONGARCH_VCPU_CPUCFG, |
| 771 | .attr = 2, |
| 772 | .addr = (uint64_t)&val, |
| 773 | }; |
| 774 | CPULoongArchState *env = cpu_env(cs); |
| 775 | |
| 776 | ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 777 | |
| 778 | if (!ret) { |
| 779 | /* |
| 780 | * The &= mask is best-effort feature negotiation. If HAS succeeded, |
| 781 | * a GET failure is most likely a copy_{from,to}_user issue; warn and |
| 782 | * keep the cpucfg2 the guest already has rather than failing the sync. |
| 783 | */ |
| 784 | int r = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); |
| 785 | if (r) { |
| 786 | warn_report("CPUCFG2: KVM_GET_DEVICE_ATTR: %s", strerror(errno)); |
| 787 | } else { |
| 788 | env->cpucfg[2] &= val; |
| 789 | } |
| 790 | |
| 791 | if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) { |
| 792 | /* The FP minimal version is 1. */ |
| 793 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, FP_VER, 1); |
| 794 | } |
| 795 | |
| 796 | if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LLFTP)) { |
| 797 | /* The LLFTP minimal version is 1. */ |
| 798 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LLFTP_VER, 1); |
| 799 | } |
| 800 | } |
| 801 | |
| 802 | return ret; |
| 803 | } |
| 804 | |
| 805 | static int kvm_loongarch_put_cpucfg(CPUState *cs) |
| 806 | { |
| 807 | int i, ret = 0; |
| 808 | CPULoongArchState *env = cpu_env(cs); |
| 809 | uint64_t val; |
| 810 | |
| 811 | for (i = 0; i < 21; i++) { |
| 812 | if (i == 2) { |
| 813 | int r = kvm_check_cpucfg2(cs); |
| 814 | if (r) { |
| 815 | return r; |
| 816 | } |
| 817 | } |
| 818 | val = env->cpucfg[i]; |
| 819 | ret |= kvm_set_one_reg(cs, KVM_IOC_CPUCFG(i), &val); |
| 820 | } |
| 821 | return ret; |
| 822 | } |
| 823 | |
| 824 | int kvm_arch_get_registers(CPUState *cs, Error **errp) |
| 825 | { |
| 826 | int ret; |
| 827 | |
| 828 | ret = kvm_loongarch_get_regs_core(cs); |
| 829 | if (ret) { |
| 830 | return ret; |
| 831 | } |
| 832 | |
| 833 | ret = kvm_loongarch_get_cpucfg(cs); |
| 834 | if (ret) { |
| 835 | return ret; |
| 836 | } |
| 837 | |
| 838 | ret = kvm_loongarch_get_csr(cs); |
| 839 | if (ret) { |
| 840 | return ret; |
| 841 | } |
| 842 | |
| 843 | ret = kvm_loongarch_get_regs_fp(cs); |
| 844 | if (ret) { |
| 845 | return ret; |
| 846 | } |
| 847 | |
| 848 | ret = kvm_loongarch_get_lbt(cs); |
| 849 | if (ret) { |
| 850 | return ret; |
| 851 | } |
| 852 | |
| 853 | ret = kvm_get_stealtime(cs); |
| 854 | if (ret) { |
| 855 | return ret; |
| 856 | } |
| 857 | |
| 858 | ret = kvm_loongarch_get_mpstate(cs); |
| 859 | return ret; |
| 860 | } |
| 861 | |
| 862 | int kvm_arch_put_registers(CPUState *cs, KvmPutState level, Error **errp) |
| 863 | { |
| 864 | int ret; |
| 865 | static int once; |
| 866 | |
| 867 | ret = kvm_loongarch_put_regs_core(cs); |
| 868 | if (ret) { |
| 869 | return ret; |
| 870 | } |
| 871 | |
| 872 | ret = kvm_loongarch_put_cpucfg(cs); |
| 873 | if (ret) { |
| 874 | return ret; |
| 875 | } |
| 876 | |
| 877 | ret = kvm_loongarch_put_csr(cs, level); |
| 878 | if (ret) { |
| 879 | return ret; |
| 880 | } |
| 881 | |
| 882 | ret = kvm_loongarch_put_regs_fp(cs); |
| 883 | if (ret) { |
| 884 | return ret; |
| 885 | } |
| 886 | |
| 887 | ret = kvm_loongarch_put_lbt(cs); |
| 888 | if (ret) { |
| 889 | return ret; |
| 890 | } |
| 891 | |
| 892 | if (!once) { |
| 893 | ret = kvm_set_pv_features(cs); |
| 894 | if (ret) { |
| 895 | return ret; |
| 896 | } |
| 897 | once = 1; |
| 898 | } |
| 899 | |
| 900 | if (level >= KVM_PUT_FULL_STATE) { |
| 901 | /* |
| 902 | * only KVM_PUT_FULL_STATE is required, kvm kernel will clear |
| 903 | * guest_addr for KVM_PUT_RESET_STATE |
| 904 | */ |
| 905 | ret = kvm_set_stealtime(cs); |
| 906 | if (ret) { |
| 907 | return ret; |
| 908 | } |
| 909 | } |
| 910 | |
| 911 | ret = kvm_loongarch_put_mpstate(cs); |
| 912 | return ret; |
| 913 | } |
| 914 | |
| 915 | static void kvm_loongarch_vm_stage_change(void *opaque, bool running, |
| 916 | RunState state) |
| 917 | { |
| 918 | int ret; |
| 919 | CPUState *cs = opaque; |
| 920 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 921 | |
| 922 | if (running) { |
| 923 | ret = kvm_set_one_reg(cs, KVM_REG_LOONGARCH_COUNTER, |
| 924 | &cpu->kvm_state_counter); |
| 925 | if (ret < 0) { |
| 926 | trace_kvm_failed_put_counter(strerror(errno)); |
| 927 | } |
| 928 | } else { |
| 929 | ret = kvm_get_one_reg(cs, KVM_REG_LOONGARCH_COUNTER, |
| 930 | &cpu->kvm_state_counter); |
| 931 | if (ret < 0) { |
| 932 | trace_kvm_failed_get_counter(strerror(errno)); |
| 933 | } |
| 934 | } |
| 935 | } |
| 936 | |
| 937 | static bool kvm_feature_supported(CPUState *cs, enum loongarch_features feature) |
| 938 | { |
| 939 | int ret; |
| 940 | struct kvm_device_attr attr; |
| 941 | uint64_t val; |
| 942 | |
| 943 | switch (feature) { |
| 944 | case LOONGARCH_FEATURE_LSX: |
| 945 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 946 | attr.attr = KVM_LOONGARCH_VM_FEAT_LSX; |
| 947 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 948 | if (ret == 0) { |
| 949 | return true; |
| 950 | } |
| 951 | |
| 952 | /* Fallback to old kernel detect interface */ |
| 953 | val = 0; |
| 954 | attr.group = KVM_LOONGARCH_VCPU_CPUCFG; |
| 955 | /* Cpucfg2 */ |
| 956 | attr.attr = 2; |
| 957 | attr.addr = (uint64_t)&val; |
| 958 | ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 959 | if (!ret) { |
| 960 | ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); |
| 961 | if (ret) { |
| 962 | return false; |
| 963 | } |
| 964 | |
| 965 | ret = FIELD_EX32((uint32_t)val, CPUCFG2, LSX); |
| 966 | return (ret != 0); |
| 967 | } |
| 968 | return false; |
| 969 | |
| 970 | case LOONGARCH_FEATURE_LASX: |
| 971 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 972 | attr.attr = KVM_LOONGARCH_VM_FEAT_LASX; |
| 973 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 974 | if (ret == 0) { |
| 975 | return true; |
| 976 | } |
| 977 | |
| 978 | /* Fallback to old kernel detect interface */ |
| 979 | val = 0; |
| 980 | attr.group = KVM_LOONGARCH_VCPU_CPUCFG; |
| 981 | /* Cpucfg2 */ |
| 982 | attr.attr = 2; |
| 983 | attr.addr = (uint64_t)&val; |
| 984 | ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); |
| 985 | if (!ret) { |
| 986 | ret = kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr); |
| 987 | if (ret) { |
| 988 | return false; |
| 989 | } |
| 990 | |
| 991 | ret = FIELD_EX32((uint32_t)val, CPUCFG2, LASX); |
| 992 | return (ret != 0); |
| 993 | } |
| 994 | return false; |
| 995 | |
| 996 | case LOONGARCH_FEATURE_LBT: |
| 997 | /* |
| 998 | * Return all if all the LBT features are supported such as: |
| 999 | * KVM_LOONGARCH_VM_FEAT_X86BT |
| 1000 | * KVM_LOONGARCH_VM_FEAT_ARMBT |
| 1001 | * KVM_LOONGARCH_VM_FEAT_MIPSBT |
| 1002 | */ |
| 1003 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1004 | attr.attr = KVM_LOONGARCH_VM_FEAT_X86BT; |
| 1005 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1006 | attr.attr = KVM_LOONGARCH_VM_FEAT_ARMBT; |
| 1007 | ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1008 | attr.attr = KVM_LOONGARCH_VM_FEAT_MIPSBT; |
| 1009 | ret |= kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1010 | return (ret == 0); |
| 1011 | |
| 1012 | case LOONGARCH_FEATURE_PMU: |
| 1013 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1014 | attr.attr = KVM_LOONGARCH_VM_FEAT_PMU; |
| 1015 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1016 | return (ret == 0); |
| 1017 | |
| 1018 | case LOONGARCH_FEATURE_PV_IPI: |
| 1019 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1020 | attr.attr = KVM_LOONGARCH_VM_FEAT_PV_IPI; |
| 1021 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1022 | return (ret == 0); |
| 1023 | |
| 1024 | case LOONGARCH_FEATURE_STEALTIME: |
| 1025 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1026 | attr.attr = KVM_LOONGARCH_VM_FEAT_PV_STEALTIME; |
| 1027 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1028 | return (ret == 0); |
| 1029 | |
| 1030 | case LOONGARCH_FEATURE_PTW: |
| 1031 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1032 | attr.attr = KVM_LOONGARCH_VM_FEAT_PTW; |
| 1033 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1034 | return (ret == 0); |
| 1035 | |
| 1036 | case LOONGARCH_FEATURE_MSGINT: |
| 1037 | attr.group = KVM_LOONGARCH_VM_FEAT_CTRL; |
| 1038 | attr.attr = KVM_LOONGARCH_VM_FEAT_MSGINT; |
| 1039 | ret = kvm_vm_ioctl(kvm_state, KVM_HAS_DEVICE_ATTR, &attr); |
| 1040 | return (ret == 0); |
| 1041 | |
| 1042 | default: |
| 1043 | return false; |
| 1044 | } |
| 1045 | |
| 1046 | return false; |
| 1047 | } |
| 1048 | |
| 1049 | static int kvm_cpu_check_lsx(CPUState *cs, Error **errp) |
| 1050 | { |
| 1051 | CPULoongArchState *env = cpu_env(cs); |
| 1052 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1053 | bool kvm_supported; |
| 1054 | |
| 1055 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LSX); |
| 1056 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 0); |
| 1057 | if (cpu->lsx == ON_OFF_AUTO_ON) { |
| 1058 | if (kvm_supported) { |
| 1059 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); |
| 1060 | } else { |
| 1061 | error_setg(errp, "'lsx' feature not supported by KVM on this host"); |
| 1062 | return -ENOTSUP; |
| 1063 | } |
| 1064 | } else if ((cpu->lsx == ON_OFF_AUTO_AUTO) && kvm_supported) { |
| 1065 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LSX, 1); |
| 1066 | } |
| 1067 | |
| 1068 | return 0; |
| 1069 | } |
| 1070 | |
| 1071 | static int kvm_cpu_check_lasx(CPUState *cs, Error **errp) |
| 1072 | { |
| 1073 | CPULoongArchState *env = cpu_env(cs); |
| 1074 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1075 | bool kvm_supported; |
| 1076 | |
| 1077 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LASX); |
| 1078 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 0); |
| 1079 | if (cpu->lasx == ON_OFF_AUTO_ON) { |
| 1080 | if (kvm_supported) { |
| 1081 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); |
| 1082 | } else { |
| 1083 | error_setg(errp, "'lasx' feature not supported by KVM on host"); |
| 1084 | return -ENOTSUP; |
| 1085 | } |
| 1086 | } else if ((cpu->lasx == ON_OFF_AUTO_AUTO) && kvm_supported) { |
| 1087 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LASX, 1); |
| 1088 | } |
| 1089 | |
| 1090 | return 0; |
| 1091 | } |
| 1092 | |
| 1093 | static int kvm_cpu_check_lbt(CPUState *cs, Error **errp) |
| 1094 | { |
| 1095 | CPULoongArchState *env = cpu_env(cs); |
| 1096 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1097 | bool kvm_supported; |
| 1098 | |
| 1099 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_LBT); |
| 1100 | if (cpu->lbt == ON_OFF_AUTO_ON) { |
| 1101 | if (kvm_supported) { |
| 1102 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); |
| 1103 | } else { |
| 1104 | error_setg(errp, "'lbt' feature not supported by KVM on this host"); |
| 1105 | return -ENOTSUP; |
| 1106 | } |
| 1107 | } else if ((cpu->lbt == ON_OFF_AUTO_AUTO) && kvm_supported) { |
| 1108 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LBT_ALL, 7); |
| 1109 | } |
| 1110 | |
| 1111 | return 0; |
| 1112 | } |
| 1113 | |
| 1114 | static int kvm_cpu_check_pmu(CPUState *cs, Error **errp) |
| 1115 | { |
| 1116 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1117 | CPULoongArchState *env = cpu_env(cs); |
| 1118 | bool kvm_supported; |
| 1119 | |
| 1120 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PMU); |
| 1121 | if (cpu->pmu == ON_OFF_AUTO_ON) { |
| 1122 | if (!kvm_supported) { |
| 1123 | error_setg(errp, "'pmu' feature not supported by KVM on the host"); |
| 1124 | return -ENOTSUP; |
| 1125 | } |
| 1126 | } else if (cpu->pmu != ON_OFF_AUTO_AUTO) { |
| 1127 | /* disable pmu if ON_OFF_AUTO_OFF is set */ |
| 1128 | kvm_supported = false; |
| 1129 | } |
| 1130 | |
| 1131 | if (kvm_supported) { |
| 1132 | /* |
| 1133 | * TODO: Will add supported perf event number query interface |
| 1134 | * from host, set perf event number with 4 by default |
| 1135 | */ |
| 1136 | cpu->pmu = ON_OFF_AUTO_ON; |
| 1137 | env->perf_event_num = 4; |
| 1138 | env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMP, 1); |
| 1139 | env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMNUM, |
| 1140 | env->perf_event_num - 1); |
| 1141 | env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, PMBITS, 63); |
| 1142 | env->cpucfg[6] = FIELD_DP32(env->cpucfg[6], CPUCFG6, UPM, 1); |
| 1143 | } |
| 1144 | return 0; |
| 1145 | } |
| 1146 | |
| 1147 | static int kvm_cpu_check_ptw(CPUState *cs, Error **errp) |
| 1148 | { |
| 1149 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1150 | CPULoongArchState *env = cpu_env(cs); |
| 1151 | bool kvm_supported; |
| 1152 | |
| 1153 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PTW); |
| 1154 | if (cpu->ptw == ON_OFF_AUTO_ON) { |
| 1155 | if (!kvm_supported) { |
| 1156 | error_setg(errp, "'ptw' feature not supported by KVM on the host"); |
| 1157 | return -ENOTSUP; |
| 1158 | } |
| 1159 | } else if (cpu->ptw != ON_OFF_AUTO_AUTO) { |
| 1160 | /* disable pmu if ON_OFF_AUTO_OFF is set */ |
| 1161 | kvm_supported = false; |
| 1162 | } |
| 1163 | |
| 1164 | if (kvm_supported) { |
| 1165 | env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, HPTW, 1); |
| 1166 | } |
| 1167 | return 0; |
| 1168 | } |
| 1169 | |
| 1170 | static int kvm_cpu_check_pv_features(CPUState *cs, Error **errp) |
| 1171 | { |
| 1172 | MachineState *ms = MACHINE(qdev_get_machine()); |
| 1173 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1174 | CPULoongArchState *env = cpu_env(cs); |
| 1175 | bool kvm_supported; |
| 1176 | |
| 1177 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_PV_IPI); |
| 1178 | if (cpu->kvm_pv_ipi == ON_OFF_AUTO_ON) { |
| 1179 | if (!kvm_supported) { |
| 1180 | error_setg(errp, "'pv_ipi' feature not supported by KVM host"); |
| 1181 | return -ENOTSUP; |
| 1182 | } |
| 1183 | } else if (cpu->kvm_pv_ipi != ON_OFF_AUTO_AUTO) { |
| 1184 | kvm_supported = false; |
| 1185 | } |
| 1186 | |
| 1187 | if (kvm_supported) { |
| 1188 | env->pv_features |= BIT(KVM_FEATURE_IPI); |
| 1189 | } |
| 1190 | |
| 1191 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_STEALTIME); |
| 1192 | if (cpu->kvm_steal_time == ON_OFF_AUTO_ON) { |
| 1193 | if (!kvm_supported) { |
| 1194 | error_setg(errp, "'kvm stealtime' feature not supported by KVM host"); |
| 1195 | return -ENOTSUP; |
| 1196 | } |
| 1197 | } else if (cpu->kvm_steal_time != ON_OFF_AUTO_AUTO) { |
| 1198 | kvm_supported = false; |
| 1199 | } |
| 1200 | |
| 1201 | if (kvm_supported) { |
| 1202 | env->pv_features |= BIT(KVM_FEATURE_STEAL_TIME); |
| 1203 | } |
| 1204 | |
| 1205 | if (object_dynamic_cast(OBJECT(ms), TYPE_LOONGARCH_VIRT_MACHINE)) { |
| 1206 | LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(ms); |
| 1207 | |
| 1208 | if (virt_is_veiointc_enabled(lvms)) { |
| 1209 | env->pv_features |= BIT(KVM_FEATURE_VIRT_EXTIOI); |
| 1210 | } |
| 1211 | } |
| 1212 | return 0; |
| 1213 | } |
| 1214 | |
| 1215 | static int kvm_cpu_check_msgint(CPUState *cs, Error **errp) |
| 1216 | { |
| 1217 | CPULoongArchState *env = cpu_env(cs); |
| 1218 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1219 | bool kvm_supported; |
| 1220 | |
| 1221 | kvm_supported = kvm_feature_supported(cs, LOONGARCH_FEATURE_MSGINT); |
| 1222 | env->cpucfg[1] = FIELD_DP32(env->cpucfg[1], CPUCFG1, MSG_INT, 0); |
| 1223 | if (cpu->msgint == ON_OFF_AUTO_ON) { |
| 1224 | if (kvm_supported) { |
| 1225 | env->cpucfg[1] = FIELD_DP32(env->cpucfg[1], CPUCFG1, MSG_INT, 1); |
| 1226 | } else { |
| 1227 | error_setg(errp, "'msgint' feature not supported by KVM on this host"); |
| 1228 | return -ENOTSUP; |
| 1229 | } |
| 1230 | } else if ((cpu->msgint == ON_OFF_AUTO_AUTO) && kvm_supported) { |
| 1231 | env->cpucfg[1] = FIELD_DP32(env->cpucfg[1], CPUCFG1, MSG_INT, 1); |
| 1232 | } |
| 1233 | |
| 1234 | return 0; |
| 1235 | } |
| 1236 | |
| 1237 | int kvm_arch_pre_create_vcpu(CPUState *cpu, Error **errp) |
| 1238 | { |
| 1239 | return 0; |
| 1240 | } |
| 1241 | |
| 1242 | int kvm_arch_init_vcpu(CPUState *cs) |
| 1243 | { |
| 1244 | uint64_t val; |
| 1245 | int ret; |
| 1246 | Error *local_err = NULL; |
| 1247 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1248 | |
| 1249 | cpu->vmsentry = qemu_add_vm_change_state_handler( |
| 1250 | kvm_loongarch_vm_stage_change, cs); |
| 1251 | |
| 1252 | if (!kvm_get_one_reg(cs, KVM_REG_LOONGARCH_DEBUG_INST, &val)) { |
| 1253 | brk_insn = val; |
| 1254 | } |
| 1255 | |
| 1256 | ret = kvm_cpu_check_lsx(cs, &local_err); |
| 1257 | if (ret < 0) { |
| 1258 | error_report_err(local_err); |
| 1259 | return ret; |
| 1260 | } |
| 1261 | |
| 1262 | ret = kvm_cpu_check_lasx(cs, &local_err); |
| 1263 | if (ret < 0) { |
| 1264 | error_report_err(local_err); |
| 1265 | return ret; |
| 1266 | } |
| 1267 | |
| 1268 | ret = kvm_cpu_check_lbt(cs, &local_err); |
| 1269 | if (ret < 0) { |
| 1270 | error_report_err(local_err); |
| 1271 | return ret; |
| 1272 | } |
| 1273 | |
| 1274 | ret = kvm_cpu_check_pmu(cs, &local_err); |
| 1275 | if (ret < 0) { |
| 1276 | error_report_err(local_err); |
| 1277 | return ret; |
| 1278 | } |
| 1279 | |
| 1280 | ret = kvm_cpu_check_pv_features(cs, &local_err); |
| 1281 | if (ret < 0) { |
| 1282 | error_report_err(local_err); |
| 1283 | return ret; |
| 1284 | } |
| 1285 | |
| 1286 | ret = kvm_cpu_check_ptw(cs, &local_err); |
| 1287 | if (ret < 0) { |
| 1288 | error_report_err(local_err); |
| 1289 | return ret; |
| 1290 | } |
| 1291 | |
| 1292 | ret = kvm_cpu_check_msgint(cs, &local_err); |
| 1293 | if (ret < 0) { |
| 1294 | error_report_err(local_err); |
| 1295 | return ret; |
| 1296 | } |
| 1297 | |
| 1298 | return 0; |
| 1299 | } |
| 1300 | |
| 1301 | static bool loongarch_get_lbt(Object *obj, Error **errp) |
| 1302 | { |
| 1303 | return LOONGARCH_CPU(obj)->lbt != ON_OFF_AUTO_OFF; |
| 1304 | } |
| 1305 | |
| 1306 | static void loongarch_set_lbt(Object *obj, bool value, Error **errp) |
| 1307 | { |
| 1308 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 1309 | |
| 1310 | cpu->lbt = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 1311 | } |
| 1312 | |
| 1313 | static bool loongarch_get_pmu(Object *obj, Error **errp) |
| 1314 | { |
| 1315 | return LOONGARCH_CPU(obj)->pmu != ON_OFF_AUTO_OFF; |
| 1316 | } |
| 1317 | |
| 1318 | static void loongarch_set_pmu(Object *obj, bool value, Error **errp) |
| 1319 | { |
| 1320 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 1321 | |
| 1322 | cpu->pmu = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 1323 | } |
| 1324 | |
| 1325 | static bool kvm_pv_ipi_get(Object *obj, Error **errp) |
| 1326 | { |
| 1327 | return LOONGARCH_CPU(obj)->kvm_pv_ipi != ON_OFF_AUTO_OFF; |
| 1328 | } |
| 1329 | |
| 1330 | static void kvm_pv_ipi_set(Object *obj, bool value, Error **errp) |
| 1331 | { |
| 1332 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 1333 | |
| 1334 | cpu->kvm_pv_ipi = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 1335 | } |
| 1336 | |
| 1337 | static bool kvm_steal_time_get(Object *obj, Error **errp) |
| 1338 | { |
| 1339 | return LOONGARCH_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF; |
| 1340 | } |
| 1341 | |
| 1342 | static void kvm_steal_time_set(Object *obj, bool value, Error **errp) |
| 1343 | { |
| 1344 | LoongArchCPU *cpu = LOONGARCH_CPU(obj); |
| 1345 | |
| 1346 | cpu->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; |
| 1347 | } |
| 1348 | |
| 1349 | void kvm_loongarch_cpu_post_init(LoongArchCPU *cpu) |
| 1350 | { |
| 1351 | cpu->lbt = ON_OFF_AUTO_AUTO; |
| 1352 | object_property_add_bool(OBJECT(cpu), "lbt", loongarch_get_lbt, |
| 1353 | loongarch_set_lbt); |
| 1354 | object_property_set_description(OBJECT(cpu), "lbt", |
| 1355 | "Set off to disable Binary Tranlation."); |
| 1356 | |
| 1357 | cpu->pmu = ON_OFF_AUTO_AUTO; |
| 1358 | object_property_add_bool(OBJECT(cpu), "pmu", loongarch_get_pmu, |
| 1359 | loongarch_set_pmu); |
| 1360 | object_property_set_description(OBJECT(cpu), "pmu", |
| 1361 | "Set off to disable performance monitor unit."); |
| 1362 | |
| 1363 | cpu->kvm_pv_ipi = ON_OFF_AUTO_AUTO; |
| 1364 | object_property_add_bool(OBJECT(cpu), "kvm-pv-ipi", kvm_pv_ipi_get, |
| 1365 | kvm_pv_ipi_set); |
| 1366 | object_property_set_description(OBJECT(cpu), "kvm-pv-ipi", |
| 1367 | "Set off to disable KVM paravirt IPI."); |
| 1368 | |
| 1369 | cpu->kvm_steal_time = ON_OFF_AUTO_AUTO; |
| 1370 | object_property_add_bool(OBJECT(cpu), "kvm-steal-time", kvm_steal_time_get, |
| 1371 | kvm_steal_time_set); |
| 1372 | object_property_set_description(OBJECT(cpu), "kvm-steal-time", |
| 1373 | "Set off to disable KVM steal time."); |
| 1374 | } |
| 1375 | |
| 1376 | int kvm_arch_destroy_vcpu(CPUState *cs) |
| 1377 | { |
| 1378 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1379 | |
| 1380 | qemu_del_vm_change_state_handler(cpu->vmsentry); |
| 1381 | return 0; |
| 1382 | } |
| 1383 | |
| 1384 | unsigned long kvm_arch_vcpu_id(CPUState *cs) |
| 1385 | { |
| 1386 | return cs->cpu_index; |
| 1387 | } |
| 1388 | |
| 1389 | int kvm_arch_release_virq_post(int virq) |
| 1390 | { |
| 1391 | return 0; |
| 1392 | } |
| 1393 | |
| 1394 | int kvm_arch_msi_data_to_gsi(uint32_t data) |
| 1395 | { |
| 1396 | abort(); |
| 1397 | } |
| 1398 | |
| 1399 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
| 1400 | uint64_t address, uint32_t data, PCIDevice *dev) |
| 1401 | { |
| 1402 | return 0; |
| 1403 | } |
| 1404 | |
| 1405 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, |
| 1406 | int vector, PCIDevice *dev) |
| 1407 | { |
| 1408 | return 0; |
| 1409 | } |
| 1410 | |
| 1411 | void kvm_arch_init_irq_routing(KVMState *s) |
| 1412 | { |
| 1413 | } |
| 1414 | |
| 1415 | void kvm_loongarch_init_irq_routing(void) |
| 1416 | { |
| 1417 | int i; |
| 1418 | |
| 1419 | kvm_async_interrupts_allowed = true; |
| 1420 | kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled(); |
| 1421 | if (kvm_has_gsi_routing()) { |
| 1422 | for (i = 0; i < KVM_IRQCHIP_NUM_PINS; ++i) { |
| 1423 | kvm_irqchip_add_irq_route(kvm_state, i, 0, i); |
| 1424 | } |
| 1425 | |
| 1426 | kvm_gsi_routing_allowed = true; |
| 1427 | kvm_irqchip_commit_routes(kvm_state); |
| 1428 | } |
| 1429 | } |
| 1430 | |
| 1431 | int kvm_arch_get_default_type(MachineState *ms) |
| 1432 | { |
| 1433 | return 0; |
| 1434 | } |
| 1435 | |
| 1436 | int kvm_arch_init(MachineState *ms, KVMState *s) |
| 1437 | { |
| 1438 | cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); |
| 1439 | return 0; |
| 1440 | } |
| 1441 | |
| 1442 | int kvm_arch_irqchip_create(KVMState *s) |
| 1443 | { |
| 1444 | if (kvm_kernel_irqchip_split()) { |
| 1445 | error_report("kernel_irqchip=split is not supported on LoongArch"); |
| 1446 | exit(1); |
| 1447 | } |
| 1448 | |
| 1449 | return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL); |
| 1450 | } |
| 1451 | |
| 1452 | void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) |
| 1453 | { |
| 1454 | } |
| 1455 | |
| 1456 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
| 1457 | { |
| 1458 | return MEMTXATTRS_UNSPECIFIED; |
| 1459 | } |
| 1460 | |
| 1461 | int kvm_arch_process_async_events(CPUState *cs) |
| 1462 | { |
| 1463 | return cs->halted; |
| 1464 | } |
| 1465 | |
| 1466 | bool kvm_arch_stop_on_emulation_error(CPUState *cs) |
| 1467 | { |
| 1468 | return true; |
| 1469 | } |
| 1470 | |
| 1471 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) |
| 1472 | { |
| 1473 | if (kvm_sw_breakpoints_active(cpu)) { |
| 1474 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; |
| 1475 | } |
| 1476 | } |
| 1477 | |
| 1478 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
| 1479 | { |
| 1480 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) || |
| 1481 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk_insn, 4, 1)) { |
| 1482 | error_report("%s failed", __func__); |
| 1483 | return -EINVAL; |
| 1484 | } |
| 1485 | return 0; |
| 1486 | } |
| 1487 | |
| 1488 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
| 1489 | { |
| 1490 | static uint32_t brk; |
| 1491 | |
| 1492 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk, 4, 0) || |
| 1493 | brk != brk_insn || |
| 1494 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 1)) { |
| 1495 | error_report("%s failed", __func__); |
| 1496 | return -EINVAL; |
| 1497 | } |
| 1498 | return 0; |
| 1499 | } |
| 1500 | |
| 1501 | int kvm_arch_insert_gdbstub_hw_breakpoint(vaddr addr, vaddr len, |
| 1502 | GdbBreakpointType type) |
| 1503 | { |
| 1504 | return -ENOSYS; |
| 1505 | } |
| 1506 | |
| 1507 | int kvm_arch_remove_gdbstub_hw_breakpoint(vaddr addr, vaddr len, |
| 1508 | GdbBreakpointType type) |
| 1509 | { |
| 1510 | return -ENOSYS; |
| 1511 | } |
| 1512 | |
| 1513 | void kvm_arch_remove_all_gdbstub_hw_breakpoints(void) |
| 1514 | { |
| 1515 | } |
| 1516 | |
| 1517 | static bool kvm_loongarch_handle_debug(CPUState *cs, struct kvm_run *run) |
| 1518 | { |
| 1519 | LoongArchCPU *cpu = LOONGARCH_CPU(cs); |
| 1520 | CPULoongArchState *env = &cpu->env; |
| 1521 | |
| 1522 | kvm_cpu_synchronize_state(cs); |
| 1523 | if (cpu_single_stepping(cs)) { |
| 1524 | return true; |
| 1525 | } |
| 1526 | |
| 1527 | if (kvm_find_sw_breakpoint(cs, env->pc)) { |
| 1528 | return true; |
| 1529 | } |
| 1530 | |
| 1531 | return false; |
| 1532 | } |
| 1533 | |
| 1534 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
| 1535 | { |
| 1536 | int ret = 0; |
| 1537 | CPULoongArchState *env = cpu_env(cs); |
| 1538 | MemTxAttrs attrs = {}; |
| 1539 | |
| 1540 | attrs.requester_id = env_cpu(env)->cpu_index; |
| 1541 | |
| 1542 | trace_kvm_arch_handle_exit(run->exit_reason); |
| 1543 | switch (run->exit_reason) { |
| 1544 | case KVM_EXIT_LOONGARCH_IOCSR: |
| 1545 | address_space_rw(env->address_space_iocsr, |
| 1546 | run->iocsr_io.phys_addr, |
| 1547 | attrs, |
| 1548 | run->iocsr_io.data, |
| 1549 | run->iocsr_io.len, |
| 1550 | run->iocsr_io.is_write); |
| 1551 | break; |
| 1552 | |
| 1553 | case KVM_EXIT_DEBUG: |
| 1554 | if (kvm_loongarch_handle_debug(cs, run)) { |
| 1555 | ret = EXCP_DEBUG; |
| 1556 | } |
| 1557 | break; |
| 1558 | |
| 1559 | default: |
| 1560 | ret = -1; |
| 1561 | warn_report("KVM: unknown exit reason %d", run->exit_reason); |
| 1562 | break; |
| 1563 | } |
| 1564 | return ret; |
| 1565 | } |
| 1566 | |
| 1567 | int kvm_loongarch_set_interrupt(LoongArchCPU *cpu, int irq, int level) |
| 1568 | { |
| 1569 | struct kvm_interrupt intr; |
| 1570 | CPUState *cs = CPU(cpu); |
| 1571 | |
| 1572 | if (level) { |
| 1573 | intr.irq = irq; |
| 1574 | } else { |
| 1575 | intr.irq = -irq; |
| 1576 | } |
| 1577 | |
| 1578 | trace_kvm_set_intr(irq, level); |
| 1579 | return kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &intr); |
| 1580 | } |
| 1581 | |
| 1582 | void kvm_arch_accel_class_init(ObjectClass *oc) |
| 1583 | { |
| 1584 | } |