| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Copyright (c) 2021 Loongson Technology Corporation Limited |
| 4 | */ |
| 5 | |
| 6 | #include "csr.h" |
| 7 | static bool trans_break(DisasContext *ctx, arg_break *a) |
| 8 | { |
| 9 | generate_exception(ctx, EXCCODE_BRK); |
| 10 | return true; |
| 11 | } |
| 12 | |
| 13 | static bool trans_syscall(DisasContext *ctx, arg_syscall *a) |
| 14 | { |
| 15 | generate_exception(ctx, EXCCODE_SYS); |
| 16 | return true; |
| 17 | } |
| 18 | |
| 19 | static bool trans_asrtle_d(DisasContext *ctx, arg_asrtle_d * a) |
| 20 | { |
| 21 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); |
| 22 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); |
| 23 | |
| 24 | if (!avail_64(ctx)) { |
| 25 | return false; |
| 26 | } |
| 27 | |
| 28 | gen_helper_asrtle_d(tcg_env, src1, src2); |
| 29 | return true; |
| 30 | } |
| 31 | |
| 32 | static bool trans_asrtgt_d(DisasContext *ctx, arg_asrtgt_d * a) |
| 33 | { |
| 34 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); |
| 35 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); |
| 36 | |
| 37 | if (!avail_64(ctx)) { |
| 38 | return false; |
| 39 | } |
| 40 | |
| 41 | gen_helper_asrtgt_d(tcg_env, src1, src2); |
| 42 | return true; |
| 43 | } |
| 44 | |
| 45 | static bool gen_rdtime(DisasContext *ctx, arg_rr *a, |
| 46 | bool word, bool high) |
| 47 | { |
| 48 | TCGv dst1 = gpr_dst(ctx, a->rd, EXT_NONE); |
| 49 | TCGv dst2 = gpr_dst(ctx, a->rj, EXT_NONE); |
| 50 | tcg_target_long offset; |
| 51 | |
| 52 | translator_io_start(&ctx->base); |
| 53 | gen_helper_rdtime_d(dst1, tcg_env); |
| 54 | if (word) { |
| 55 | tcg_gen_sextract_tl(dst1, dst1, high ? 32 : 0, 32); |
| 56 | } |
| 57 | |
| 58 | offset = CPU_CSR_OFFSET(CSR_TID, 0); |
| 59 | tcg_gen_ld_i64(dst2, tcg_env, offset); |
| 60 | |
| 61 | return true; |
| 62 | } |
| 63 | |
| 64 | static bool trans_rdtimel_w(DisasContext *ctx, arg_rdtimel_w *a) |
| 65 | { |
| 66 | return gen_rdtime(ctx, a, 1, 0); |
| 67 | } |
| 68 | |
| 69 | static bool trans_rdtimeh_w(DisasContext *ctx, arg_rdtimeh_w *a) |
| 70 | { |
| 71 | return gen_rdtime(ctx, a, 1, 1); |
| 72 | } |
| 73 | |
| 74 | static bool trans_rdtime_d(DisasContext *ctx, arg_rdtime_d *a) |
| 75 | { |
| 76 | if (!avail_64(ctx)) { |
| 77 | return false; |
| 78 | } |
| 79 | |
| 80 | return gen_rdtime(ctx, a, 0, 0); |
| 81 | } |
| 82 | |
| 83 | static bool trans_cpucfg(DisasContext *ctx, arg_cpucfg *a) |
| 84 | { |
| 85 | TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE); |
| 86 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); |
| 87 | |
| 88 | gen_helper_cpucfg(dest, tcg_env, src1); |
| 89 | gen_set_gpr(a->rd, dest, EXT_NONE); |
| 90 | |
| 91 | return true; |
| 92 | } |
| 93 | |
| 94 | static bool gen_crc(DisasContext *ctx, arg_rrr *a, |
| 95 | void (*func)(TCGv, TCGv, TCGv, TCGv), |
| 96 | TCGv tsz) |
| 97 | { |
| 98 | TCGv dest = gpr_dst(ctx, a->rd, EXT_SIGN); |
| 99 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); |
| 100 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); |
| 101 | |
| 102 | func(dest, src2, src1, tsz); |
| 103 | gen_set_gpr(a->rd, dest, EXT_SIGN); |
| 104 | |
| 105 | return true; |
| 106 | } |
| 107 | |
| 108 | TRANS(crc_w_b_w, CRC, gen_crc, gen_helper_crc32, tcg_constant_tl(1)) |
| 109 | TRANS(crc_w_h_w, CRC, gen_crc, gen_helper_crc32, tcg_constant_tl(2)) |
| 110 | TRANS(crc_w_w_w, CRC, gen_crc, gen_helper_crc32, tcg_constant_tl(4)) |
| 111 | TRANS64(crc_w_d_w, CRC, gen_crc, gen_helper_crc32, tcg_constant_tl(8)) |
| 112 | TRANS(crcc_w_b_w, CRC, gen_crc, gen_helper_crc32c, tcg_constant_tl(1)) |
| 113 | TRANS(crcc_w_h_w, CRC, gen_crc, gen_helper_crc32c, tcg_constant_tl(2)) |
| 114 | TRANS(crcc_w_w_w, CRC, gen_crc, gen_helper_crc32c, tcg_constant_tl(4)) |
| 115 | TRANS64(crcc_w_d_w, CRC, gen_crc, gen_helper_crc32c, tcg_constant_tl(8)) |