| 1 | /* |
| 2 | * Loongson CSR instructions translation routines |
| 3 | * |
| 4 | * Copyright (c) 2023 Jiaxun Yang <jiaxun.yang@flygoat.com> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #include "qemu/osdep.h" |
| 10 | #include "cpu.h" |
| 11 | #include "tcg/tcg-op.h" |
| 12 | #include "tcg/tcg-op-gvec.h" |
| 13 | #include "exec/helper-gen.h" |
| 14 | #include "translate.h" |
| 15 | |
| 16 | /* Include the auto-generated decoder. */ |
| 17 | #include "decode-lcsr.c.inc" |
| 18 | |
| 19 | static bool trans_CPUCFG(DisasContext *ctx, arg_CPUCFG *a) |
| 20 | { |
| 21 | TCGv_i64 dest = tcg_temp_new_i64(); |
| 22 | TCGv_i64 src1 = tcg_temp_new_i64(); |
| 23 | |
| 24 | gen_load_gpr(src1, a->rs); |
| 25 | gen_helper_lcsr_cpucfg(dest, tcg_env, src1); |
| 26 | gen_store_gpr(dest, a->rd); |
| 27 | |
| 28 | return true; |
| 29 | } |
| 30 | |
| 31 | #ifndef CONFIG_USER_ONLY |
| 32 | static bool gen_rdcsr(DisasContext *ctx, arg_r *a, |
| 33 | void (*func)(TCGv_i64, TCGv_ptr, TCGv_i64)) |
| 34 | { |
| 35 | TCGv_i64 dest = tcg_temp_new_i64(); |
| 36 | TCGv_i64 src1 = tcg_temp_new_i64(); |
| 37 | |
| 38 | check_cp0_enabled(ctx); |
| 39 | gen_load_gpr(src1, a->rs); |
| 40 | func(dest, tcg_env, src1); |
| 41 | gen_store_gpr(dest, a->rd); |
| 42 | |
| 43 | return true; |
| 44 | } |
| 45 | |
| 46 | static bool gen_wrcsr(DisasContext *ctx, arg_r *a, |
| 47 | void (*func)(TCGv_ptr, TCGv_i64, TCGv_i64)) |
| 48 | { |
| 49 | TCGv_i64 val = tcg_temp_new_i64(); |
| 50 | TCGv_i64 addr = tcg_temp_new_i64(); |
| 51 | |
| 52 | check_cp0_enabled(ctx); |
| 53 | gen_load_gpr(addr, a->rs); |
| 54 | gen_load_gpr(val, a->rd); |
| 55 | func(tcg_env, addr, val); |
| 56 | |
| 57 | return true; |
| 58 | } |
| 59 | |
| 60 | TRANS(RDCSR, gen_rdcsr, gen_helper_lcsr_rdcsr) |
| 61 | TRANS(DRDCSR, gen_rdcsr, gen_helper_lcsr_drdcsr) |
| 62 | TRANS(WRCSR, gen_wrcsr, gen_helper_lcsr_wrcsr) |
| 63 | TRANS(DWRCSR, gen_wrcsr, gen_helper_lcsr_dwrcsr) |
| 64 | #else |
| 65 | #define GEN_FALSE_TRANS(name) \ |
| 66 | static bool trans_##name(DisasContext *ctx, arg_##name * a) \ |
| 67 | { \ |
| 68 | return false; \ |
| 69 | } |
| 70 | |
| 71 | GEN_FALSE_TRANS(RDCSR) |
| 72 | GEN_FALSE_TRANS(DRDCSR) |
| 73 | GEN_FALSE_TRANS(WRCSR) |
| 74 | GEN_FALSE_TRANS(DWRCSR) |
| 75 | #endif |