| 1 | /* |
| 2 | * PowerPC internal definitions for qemu. |
| 3 | * |
| 4 | * This library is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU Lesser General Public |
| 6 | * License as published by the Free Software Foundation; either |
| 7 | * version 2.1 of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This library is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 12 | * Lesser General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU Lesser General Public |
| 15 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef PPC_INTERNAL_H |
| 19 | #define PPC_INTERNAL_H |
| 20 | |
| 21 | #include "exec/breakpoint.h" |
| 22 | #include "exec/memop.h" |
| 23 | #include "hw/core/registerfields.h" |
| 24 | #include "exec/page-protection.h" |
| 25 | |
| 26 | static inline bool ppc_env_is_little_endian(const CPUPPCState *env) |
| 27 | { |
| 28 | return FIELD_EX64(env->msr, MSR, LE); |
| 29 | } |
| 30 | |
| 31 | /** |
| 32 | * ppc_data_endian_env: |
| 33 | * @env: the cpu context |
| 34 | * |
| 35 | * Return the MemOp endianness of the DATA path. |
| 36 | */ |
| 37 | static inline MemOp ppc_data_endian_env(const CPUPPCState *env) |
| 38 | { |
| 39 | return ppc_env_is_little_endian(env) ? MO_LE : MO_BE; |
| 40 | } |
| 41 | |
| 42 | /* PM instructions */ |
| 43 | typedef enum { |
| 44 | PPC_PM_DOZE, |
| 45 | PPC_PM_NAP, |
| 46 | PPC_PM_SLEEP, |
| 47 | PPC_PM_RVWINKLE, |
| 48 | PPC_PM_STOP, |
| 49 | } powerpc_pm_insn_t; |
| 50 | |
| 51 | #define FUNC_MASK(name, ret_type, size, max_val) \ |
| 52 | static inline ret_type name(uint##size##_t start, \ |
| 53 | uint##size##_t end) \ |
| 54 | { \ |
| 55 | ret_type ret, max_bit = size - 1; \ |
| 56 | \ |
| 57 | if (likely(start == 0)) { \ |
| 58 | ret = max_val << (max_bit - end); \ |
| 59 | } else if (likely(end == max_bit)) { \ |
| 60 | ret = max_val >> start; \ |
| 61 | } else { \ |
| 62 | ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \ |
| 63 | (((uint##size##_t)(-1ULL) >> (end)) >> 1); \ |
| 64 | if (unlikely(start > end)) { \ |
| 65 | return ~ret; \ |
| 66 | } \ |
| 67 | } \ |
| 68 | \ |
| 69 | return ret; \ |
| 70 | } |
| 71 | |
| 72 | #if defined(TARGET_PPC64) |
| 73 | FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX); |
| 74 | #else |
| 75 | FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX); |
| 76 | #endif |
| 77 | FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX); |
| 78 | FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX); |
| 79 | |
| 80 | /*****************************************************************************/ |
| 81 | /*** Instruction decoding ***/ |
| 82 | #define EXTRACT_HELPER(name, shift, nb) \ |
| 83 | static inline uint32_t name(uint32_t opcode) \ |
| 84 | { \ |
| 85 | return extract32(opcode, shift, nb); \ |
| 86 | } |
| 87 | |
| 88 | #define EXTRACT_SHELPER(name, shift, nb) \ |
| 89 | static inline int32_t name(uint32_t opcode) \ |
| 90 | { \ |
| 91 | return sextract32(opcode, shift, nb); \ |
| 92 | } |
| 93 | |
| 94 | #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \ |
| 95 | static inline uint32_t name(uint32_t opcode) \ |
| 96 | { \ |
| 97 | return extract32(opcode, shift1, nb1) << nb2 | \ |
| 98 | extract32(opcode, shift2, nb2); \ |
| 99 | } |
| 100 | |
| 101 | #define EXTRACT_HELPER_SPLIT_3(name, \ |
| 102 | d0_bits, shift_op_d0, shift_d0, \ |
| 103 | d1_bits, shift_op_d1, shift_d1, \ |
| 104 | d2_bits, shift_op_d2, shift_d2) \ |
| 105 | static inline int16_t name(uint32_t opcode) \ |
| 106 | { \ |
| 107 | return \ |
| 108 | (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \ |
| 109 | (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \ |
| 110 | (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2)); \ |
| 111 | } |
| 112 | |
| 113 | |
| 114 | /* Opcode part 1 */ |
| 115 | EXTRACT_HELPER(opc1, 26, 6); |
| 116 | /* Opcode part 2 */ |
| 117 | EXTRACT_HELPER(opc2, 1, 5); |
| 118 | /* Opcode part 3 */ |
| 119 | EXTRACT_HELPER(opc3, 6, 5); |
| 120 | /* Opcode part 4 */ |
| 121 | EXTRACT_HELPER(opc4, 16, 5); |
| 122 | /* Update Cr0 flags */ |
| 123 | EXTRACT_HELPER(Rc, 0, 1); |
| 124 | /* Update Cr6 flags (Altivec) */ |
| 125 | EXTRACT_HELPER(Rc21, 10, 1); |
| 126 | /* Destination */ |
| 127 | EXTRACT_HELPER(rD, 21, 5); |
| 128 | /* Source */ |
| 129 | EXTRACT_HELPER(rS, 21, 5); |
| 130 | /* First operand */ |
| 131 | EXTRACT_HELPER(rA, 16, 5); |
| 132 | /* Second operand */ |
| 133 | EXTRACT_HELPER(rB, 11, 5); |
| 134 | /* Third operand */ |
| 135 | EXTRACT_HELPER(rC, 6, 5); |
| 136 | /*** Get CRn ***/ |
| 137 | EXTRACT_HELPER(crfD, 23, 3); |
| 138 | EXTRACT_HELPER(BF, 23, 3); |
| 139 | EXTRACT_HELPER(crfS, 18, 3); |
| 140 | EXTRACT_HELPER(crbD, 21, 5); |
| 141 | EXTRACT_HELPER(crbA, 16, 5); |
| 142 | EXTRACT_HELPER(crbB, 11, 5); |
| 143 | /* SPR / TBL */ |
| 144 | EXTRACT_HELPER(_SPR, 11, 10); |
| 145 | static inline uint32_t SPR(uint32_t opcode) |
| 146 | { |
| 147 | uint32_t sprn = _SPR(opcode); |
| 148 | |
| 149 | return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); |
| 150 | } |
| 151 | /*** Get constants ***/ |
| 152 | /* 16 bits signed immediate value */ |
| 153 | EXTRACT_SHELPER(SIMM, 0, 16); |
| 154 | /* 16 bits unsigned immediate value */ |
| 155 | EXTRACT_HELPER(UIMM, 0, 16); |
| 156 | /* 5 bits signed immediate value */ |
| 157 | EXTRACT_SHELPER(SIMM5, 16, 5); |
| 158 | /* 5 bits signed immediate value */ |
| 159 | EXTRACT_HELPER(UIMM5, 16, 5); |
| 160 | /* 4 bits unsigned immediate value */ |
| 161 | EXTRACT_HELPER(UIMM4, 16, 4); |
| 162 | /* Bit count */ |
| 163 | EXTRACT_HELPER(NB, 11, 5); |
| 164 | /* Shift count */ |
| 165 | EXTRACT_HELPER(SH, 11, 5); |
| 166 | /* lwat/stwat/ldat/lwat */ |
| 167 | EXTRACT_HELPER(FC, 11, 5); |
| 168 | /* Vector shift count */ |
| 169 | EXTRACT_HELPER(VSH, 6, 4); |
| 170 | /* Mask start */ |
| 171 | EXTRACT_HELPER(MB, 6, 5); |
| 172 | /* Mask end */ |
| 173 | EXTRACT_HELPER(ME, 1, 5); |
| 174 | /* Trap operand */ |
| 175 | EXTRACT_HELPER(TO, 21, 5); |
| 176 | |
| 177 | EXTRACT_HELPER(CRM, 12, 8); |
| 178 | |
| 179 | #ifndef CONFIG_USER_ONLY |
| 180 | EXTRACT_HELPER(SR, 16, 4); |
| 181 | #endif |
| 182 | |
| 183 | /* mtfsf/mtfsfi */ |
| 184 | EXTRACT_HELPER(FPBF, 23, 3); |
| 185 | EXTRACT_HELPER(FPIMM, 12, 4); |
| 186 | EXTRACT_HELPER(FPL, 25, 1); |
| 187 | EXTRACT_HELPER(FPFLM, 17, 8); |
| 188 | EXTRACT_HELPER(FPW, 16, 1); |
| 189 | |
| 190 | /* addpcis */ |
| 191 | EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) |
| 192 | #if defined(TARGET_PPC64) |
| 193 | /* darn */ |
| 194 | EXTRACT_HELPER(L, 16, 2); |
| 195 | #endif |
| 196 | /* wait */ |
| 197 | EXTRACT_HELPER(WC, 21, 2); |
| 198 | EXTRACT_HELPER(PL, 16, 2); |
| 199 | |
| 200 | static inline uint32_t BD(uint32_t opcode) |
| 201 | { |
| 202 | return (opcode >> 0) & 0xFFFC; |
| 203 | } |
| 204 | |
| 205 | EXTRACT_HELPER(BO, 21, 5); |
| 206 | EXTRACT_HELPER(BI, 16, 5); |
| 207 | /* Absolute/relative address */ |
| 208 | EXTRACT_HELPER(AA, 1, 1); |
| 209 | /* Link */ |
| 210 | EXTRACT_HELPER(LK, 0, 1); |
| 211 | |
| 212 | /* DFP Z22-form */ |
| 213 | EXTRACT_HELPER(DCM, 10, 6) |
| 214 | |
| 215 | /* DFP Z23-form */ |
| 216 | EXTRACT_HELPER(RMC, 9, 2) |
| 217 | EXTRACT_HELPER(Rrm, 16, 1) |
| 218 | |
| 219 | EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5); |
| 220 | EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5); |
| 221 | EXTRACT_HELPER_SPLIT(xS, 0, 1, 21, 5); |
| 222 | EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5); |
| 223 | EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5); |
| 224 | EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5); |
| 225 | EXTRACT_HELPER(DM, 8, 2); |
| 226 | EXTRACT_HELPER(UIM, 16, 2); |
| 227 | EXTRACT_HELPER(SHW, 8, 2); |
| 228 | EXTRACT_HELPER(SP, 19, 2); |
| 229 | EXTRACT_HELPER(IMM8, 11, 8); |
| 230 | EXTRACT_HELPER(DCMX, 16, 7); |
| 231 | EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); |
| 232 | |
| 233 | void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); |
| 234 | void helper_compute_fprf_float32(CPUPPCState *env, float32 arg); |
| 235 | void helper_compute_fprf_float128(CPUPPCState *env, float128 arg); |
| 236 | |
| 237 | /* translate.c */ |
| 238 | |
| 239 | int ppc_fixup_cpu(PowerPCCPU *cpu); |
| 240 | void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp); |
| 241 | void destroy_ppc_opcodes(PowerPCCPU *cpu); |
| 242 | |
| 243 | /* gdbstub.c */ |
| 244 | void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc); |
| 245 | const gchar *ppc_gdb_arch_name(CPUState *cs); |
| 246 | |
| 247 | #ifndef CONFIG_USER_ONLY |
| 248 | |
| 249 | /* Check if permission bit required for the access_type is set in prot */ |
| 250 | static inline int check_prot_access_type(int prot, MMUAccessType access_type) |
| 251 | { |
| 252 | return prot & (1 << access_type); |
| 253 | } |
| 254 | |
| 255 | /* PowerPC MMU emulation */ |
| 256 | |
| 257 | bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, |
| 258 | hwaddr *raddrp, int *psizep, int *protp, |
| 259 | int mmu_idx, bool guest_visible); |
| 260 | |
| 261 | /* Software driven TLB helpers */ |
| 262 | int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr, |
| 263 | int way, int is_code); |
| 264 | |
| 265 | #endif /* !CONFIG_USER_ONLY */ |
| 266 | |
| 267 | /* Common routines used by software and hardware TLBs emulation */ |
| 268 | static inline int pte_is_valid(target_ulong pte0) |
| 269 | { |
| 270 | return pte0 & 0x80000000 ? 1 : 0; |
| 271 | } |
| 272 | |
| 273 | static inline void pte_invalidate(target_ulong *pte0) |
| 274 | { |
| 275 | *pte0 &= ~0x80000000; |
| 276 | } |
| 277 | |
| 278 | #define PTE_PTEM_MASK 0x7FFFFFBF |
| 279 | #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B) |
| 280 | |
| 281 | uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr); |
| 282 | |
| 283 | #ifdef CONFIG_USER_ONLY |
| 284 | void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr, |
| 285 | MMUAccessType access_type, |
| 286 | bool maperr, uintptr_t ra); |
| 287 | #else |
| 288 | bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, |
| 289 | MMUAccessType access_type, int mmu_idx, |
| 290 | bool probe, uintptr_t retaddr); |
| 291 | G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, |
| 292 | MMUAccessType access_type, int mmu_idx, |
| 293 | uintptr_t retaddr); |
| 294 | void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, |
| 295 | vaddr addr, unsigned size, |
| 296 | MMUAccessType access_type, |
| 297 | int mmu_idx, MemTxAttrs attrs, |
| 298 | MemTxResult response, uintptr_t retaddr); |
| 299 | void ppc_cpu_debug_excp_handler(CPUState *cs); |
| 300 | bool ppc_cpu_debug_check_breakpoint(CPUState *cs); |
| 301 | bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); |
| 302 | |
| 303 | G_NORETURN void powerpc_checkstop(CPUPPCState *env, const char *reason); |
| 304 | void powerpc_excp(PowerPCCPU *cpu, int excp); |
| 305 | |
| 306 | #endif /* !CONFIG_USER_ONLY */ |
| 307 | |
| 308 | FIELD(GER_MSK, XMSK, 0, 4) |
| 309 | FIELD(GER_MSK, YMSK, 4, 4) |
| 310 | FIELD(GER_MSK, PMSK, 8, 8) |
| 311 | |
| 312 | static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk) |
| 313 | { |
| 314 | int msk = 0; |
| 315 | msk = FIELD_DP32(msk, GER_MSK, XMSK, xmsk); |
| 316 | msk = FIELD_DP32(msk, GER_MSK, YMSK, ymsk); |
| 317 | msk = FIELD_DP32(msk, GER_MSK, PMSK, pmsk); |
| 318 | return msk; |
| 319 | } |
| 320 | |
| 321 | #ifdef CONFIG_TCG |
| 322 | #include "accel/tcg/tb-cpu-state.h" |
| 323 | |
| 324 | TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs); |
| 325 | #endif |
| 326 | |
| 327 | #endif /* PPC_INTERNAL_H */ |