| 1 | /* |
| 2 | * PMU emulation helpers for TCG IBM POWER chips |
| 3 | * |
| 4 | * Copyright IBM Corp. 2021 |
| 5 | * |
| 6 | * Authors: |
| 7 | * Daniel Henrique Barboza <danielhb413@gmail.com> |
| 8 | * |
| 9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 10 | * See the COPYING file in the top-level directory. |
| 11 | */ |
| 12 | |
| 13 | #ifndef POWER8_PMU_H |
| 14 | #define POWER8_PMU_H |
| 15 | |
| 16 | #define BHRB_TYPE_NORECORD 0x00 |
| 17 | #define BHRB_TYPE_CALL 0x01 |
| 18 | #define BHRB_TYPE_INDIRECT 0x02 |
| 19 | #define BHRB_TYPE_COND 0x04 |
| 20 | #define BHRB_TYPE_OTHER 0x08 |
| 21 | #define BHRB_TYPE_XL_FORM 0x10 |
| 22 | |
| 23 | #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) |
| 24 | |
| 25 | #define PMC_COUNTER_NEGATIVE_VAL 0x80000000UL |
| 26 | |
| 27 | void cpu_ppc_pmu_init(CPUPPCState *env); |
| 28 | void pmu_mmcr01a_updated(CPUPPCState *env); |
| 29 | #else |
| 30 | static inline void cpu_ppc_pmu_init(CPUPPCState *env) { } |
| 31 | static inline void pmu_mmcr01a_updated(CPUPPCState *env) { } |
| 32 | #endif |
| 33 | |
| 34 | #endif |