| 1 | #ifndef TARGET_RISCV_CPU_VENDORID_H |
| 2 | #define TARGET_RISCV_CPU_VENDORID_H |
| 3 | |
| 4 | #define THEAD_VENDOR_ID 0x5b7 |
| 5 | #define MIPS_VENDOR_ID 0x127 |
| 6 | |
| 7 | #define VEYRON_V1_MARCHID 0x8000000000010000 |
| 8 | #define VEYRON_V1_MIMPID 0x111 |
| 9 | #define VEYRON_V1_MVENDORID 0x61f |
| 10 | |
| 11 | #define TENSTORRENT_VENDOR_ID 0x7a1 |
| 12 | |
| 13 | #endif /* TARGET_RISCV_CPU_VENDORID_H */ |