| 1 | /* |
| 2 | * S/390 CPU dump to FILE |
| 3 | * |
| 4 | * Copyright (c) 2009 Ulrich Hecht |
| 5 | * Copyright (c) 2011 Alexander Graf |
| 6 | * |
| 7 | * This library is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU Lesser General Public |
| 9 | * License as published by the Free Software Foundation; either |
| 10 | * version 2.1 of the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This library is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * Lesser General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU Lesser General Public |
| 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include "qemu/osdep.h" |
| 23 | #include "cpu.h" |
| 24 | #include "s390x-internal.h" |
| 25 | #include "qemu/qemu-print.h" |
| 26 | #include "system/tcg.h" |
| 27 | |
| 28 | void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags) |
| 29 | { |
| 30 | CPUS390XState *env = cpu_env(cs); |
| 31 | int i; |
| 32 | |
| 33 | qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64, |
| 34 | s390_cpu_get_psw_mask(env), env->psw.addr); |
| 35 | if (!tcg_enabled()) { |
| 36 | qemu_fprintf(f, "\n"); |
| 37 | } else if (env->cc_op > 3) { |
| 38 | qemu_fprintf(f, " cc %15s\n", cc_name(env->cc_op)); |
| 39 | } else { |
| 40 | qemu_fprintf(f, " cc %02x\n", env->cc_op); |
| 41 | } |
| 42 | |
| 43 | for (i = 0; i < 16; i++) { |
| 44 | qemu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]); |
| 45 | if ((i % 4) == 3) { |
| 46 | qemu_fprintf(f, "\n"); |
| 47 | } else { |
| 48 | qemu_fprintf(f, " "); |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | if (flags & CPU_DUMP_FPU) { |
| 53 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
| 54 | for (i = 0; i < 32; i++) { |
| 55 | qemu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c", |
| 56 | i, env->vregs[i][0], env->vregs[i][1], |
| 57 | i % 2 ? '\n' : ' '); |
| 58 | } |
| 59 | } else { |
| 60 | for (i = 0; i < 16; i++) { |
| 61 | qemu_fprintf(f, "F%02d=%016" PRIx64 "%c", |
| 62 | i, *get_freg(env, i), |
| 63 | (i % 4) == 3 ? '\n' : ' '); |
| 64 | } |
| 65 | } |
| 66 | qemu_fprintf(f, "FPC=%08" PRIx32 "\n", env->fpc); |
| 67 | } |
| 68 | |
| 69 | #ifndef CONFIG_USER_ONLY |
| 70 | for (i = 0; i < 16; i++) { |
| 71 | qemu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]); |
| 72 | if ((i % 4) == 3) { |
| 73 | qemu_fprintf(f, "\n"); |
| 74 | } else { |
| 75 | qemu_fprintf(f, " "); |
| 76 | } |
| 77 | } |
| 78 | #endif |
| 79 | |
| 80 | #ifdef DEBUG_INLINE_BRANCHES |
| 81 | for (i = 0; i < CC_OP_MAX; i++) { |
| 82 | qemu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i), |
| 83 | inline_branch_miss[i], inline_branch_hit[i]); |
| 84 | } |
| 85 | #endif |
| 86 | |
| 87 | qemu_fprintf(f, "\n"); |
| 88 | } |
| 89 | |
| 90 | const char *cc_name(enum cc_op cc_op) |
| 91 | { |
| 92 | static const char * const cc_names[] = { |
| 93 | [CC_OP_CONST0] = "CC_OP_CONST0", |
| 94 | [CC_OP_CONST1] = "CC_OP_CONST1", |
| 95 | [CC_OP_CONST2] = "CC_OP_CONST2", |
| 96 | [CC_OP_CONST3] = "CC_OP_CONST3", |
| 97 | [CC_OP_DYNAMIC] = "CC_OP_DYNAMIC", |
| 98 | [CC_OP_STATIC] = "CC_OP_STATIC", |
| 99 | [CC_OP_NZ] = "CC_OP_NZ", |
| 100 | [CC_OP_ADDU] = "CC_OP_ADDU", |
| 101 | [CC_OP_SUBU] = "CC_OP_SUBU", |
| 102 | [CC_OP_LTGT_32] = "CC_OP_LTGT_32", |
| 103 | [CC_OP_LTGT_64] = "CC_OP_LTGT_64", |
| 104 | [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32", |
| 105 | [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64", |
| 106 | [CC_OP_LTGT0_32] = "CC_OP_LTGT0_32", |
| 107 | [CC_OP_LTGT0_64] = "CC_OP_LTGT0_64", |
| 108 | [CC_OP_ADD_64] = "CC_OP_ADD_64", |
| 109 | [CC_OP_SUB_64] = "CC_OP_SUB_64", |
| 110 | [CC_OP_ABS_64] = "CC_OP_ABS_64", |
| 111 | [CC_OP_NABS_64] = "CC_OP_NABS_64", |
| 112 | [CC_OP_ADD_32] = "CC_OP_ADD_32", |
| 113 | [CC_OP_SUB_32] = "CC_OP_SUB_32", |
| 114 | [CC_OP_ABS_32] = "CC_OP_ABS_32", |
| 115 | [CC_OP_NABS_32] = "CC_OP_NABS_32", |
| 116 | [CC_OP_COMP_32] = "CC_OP_COMP_32", |
| 117 | [CC_OP_COMP_64] = "CC_OP_COMP_64", |
| 118 | [CC_OP_TM_32] = "CC_OP_TM_32", |
| 119 | [CC_OP_TM_64] = "CC_OP_TM_64", |
| 120 | [CC_OP_NZ_F32] = "CC_OP_NZ_F32", |
| 121 | [CC_OP_NZ_F64] = "CC_OP_NZ_F64", |
| 122 | [CC_OP_NZ_F128] = "CC_OP_NZ_F128", |
| 123 | [CC_OP_ICM] = "CC_OP_ICM", |
| 124 | [CC_OP_SLA] = "CC_OP_SLA", |
| 125 | [CC_OP_FLOGR] = "CC_OP_FLOGR", |
| 126 | [CC_OP_LCBB] = "CC_OP_LCBB", |
| 127 | [CC_OP_VC] = "CC_OP_VC", |
| 128 | [CC_OP_MULS_32] = "CC_OP_MULS_32", |
| 129 | [CC_OP_MULS_64] = "CC_OP_MULS_64", |
| 130 | }; |
| 131 | |
| 132 | return cc_names[cc_op]; |
| 133 | } |