| 1 | /* |
| 2 | * QEMU S/390 CPU |
| 3 | * |
| 4 | * Copyright (c) 2009 Ulrich Hecht |
| 5 | * Copyright (c) 2011 Alexander Graf |
| 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
| 7 | * Copyright (c) 2012 IBM Corp. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
| 21 | */ |
| 22 | |
| 23 | #include "qemu/osdep.h" |
| 24 | #include "qapi/error.h" |
| 25 | #include "cpu.h" |
| 26 | #include "s390x-internal.h" |
| 27 | #include "kvm/kvm_s390x.h" |
| 28 | #include "system/kvm.h" |
| 29 | #include "qemu/module.h" |
| 30 | #include "trace.h" |
| 31 | #include "qapi/qapi-types-machine.h" |
| 32 | #include "system/hw_accel.h" |
| 33 | #include "hw/core/qdev-properties.h" |
| 34 | #include "hw/core/qdev-properties-system.h" |
| 35 | #include "hw/core/resettable.h" |
| 36 | #include "fpu/softfloat-helpers.h" |
| 37 | #include "disas/capstone.h" |
| 38 | #include "system/tcg.h" |
| 39 | #ifndef CONFIG_USER_ONLY |
| 40 | #include "system/reset.h" |
| 41 | #endif |
| 42 | #include "hw/s390x/cpu-topology.h" |
| 43 | #include "tcg/tcg_s390x.h" |
| 44 | |
| 45 | #define CR0_RESET 0xE0UL |
| 46 | #define CR14_RESET 0xC2000000UL; |
| 47 | |
| 48 | #ifndef CONFIG_USER_ONLY |
| 49 | static bool is_early_exception_psw(uint64_t mask, uint64_t addr) |
| 50 | { |
| 51 | if (mask & PSW_MASK_RESERVED) { |
| 52 | return true; |
| 53 | } |
| 54 | |
| 55 | switch (mask & (PSW_MASK_32 | PSW_MASK_64)) { |
| 56 | case 0: |
| 57 | return addr & ~0xffffffULL; |
| 58 | case PSW_MASK_32: |
| 59 | return addr & ~0x7fffffffULL; |
| 60 | case PSW_MASK_32 | PSW_MASK_64: |
| 61 | return false; |
| 62 | default: /* PSW_MASK_64 */ |
| 63 | return true; |
| 64 | } |
| 65 | } |
| 66 | #endif |
| 67 | |
| 68 | void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) |
| 69 | { |
| 70 | #ifndef CONFIG_USER_ONLY |
| 71 | uint64_t old_mask = env->psw.mask; |
| 72 | #endif |
| 73 | |
| 74 | env->psw.addr = addr; |
| 75 | env->psw.mask = mask; |
| 76 | |
| 77 | /* KVM will handle all WAITs and trigger a WAIT exit on disabled_wait */ |
| 78 | if (tcg_enabled()) { |
| 79 | env->cc_op = (mask >> 44) & 3; |
| 80 | |
| 81 | #ifndef CONFIG_USER_ONLY |
| 82 | if (is_early_exception_psw(mask, addr)) { |
| 83 | env->int_pgm_ilen = 0; |
| 84 | trigger_pgm_exception(env, PGM_SPECIFICATION); |
| 85 | return; |
| 86 | } |
| 87 | |
| 88 | if ((old_mask ^ mask) & PSW_MASK_PER) { |
| 89 | s390_cpu_recompute_watchpoints(env_cpu(env)); |
| 90 | } |
| 91 | |
| 92 | if (mask & PSW_MASK_WAIT) { |
| 93 | s390_handle_wait(env_archcpu(env)); |
| 94 | } |
| 95 | #endif |
| 96 | } |
| 97 | } |
| 98 | |
| 99 | uint64_t s390_cpu_get_psw_mask(CPUS390XState *env) |
| 100 | { |
| 101 | uint64_t r = env->psw.mask; |
| 102 | |
| 103 | if (tcg_enabled()) { |
| 104 | uint64_t cc = calc_cc(env, env->cc_op, env->cc_src, |
| 105 | env->cc_dst, env->cc_vr); |
| 106 | |
| 107 | assert(cc <= 3); |
| 108 | r &= ~PSW_MASK_CC; |
| 109 | r |= cc << 44; |
| 110 | } |
| 111 | |
| 112 | return r; |
| 113 | } |
| 114 | |
| 115 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
| 116 | { |
| 117 | S390CPU *cpu = S390_CPU(cs); |
| 118 | |
| 119 | cpu->env.psw.addr = value; |
| 120 | } |
| 121 | |
| 122 | static vaddr s390_cpu_get_pc(CPUState *cs) |
| 123 | { |
| 124 | S390CPU *cpu = S390_CPU(cs); |
| 125 | |
| 126 | return cpu->env.psw.addr; |
| 127 | } |
| 128 | |
| 129 | static void s390_query_cpu_fast(CPUState *cpu, CpuInfoFast *value) |
| 130 | { |
| 131 | S390CPU *s390_cpu = S390_CPU(cpu); |
| 132 | |
| 133 | value->u.s390x.cpu_state = s390_cpu->env.cpu_state; |
| 134 | #if !defined(CONFIG_USER_ONLY) |
| 135 | if (s390_has_topology()) { |
| 136 | value->u.s390x.has_dedicated = true; |
| 137 | value->u.s390x.dedicated = s390_cpu->env.dedicated; |
| 138 | value->u.s390x.has_entitlement = true; |
| 139 | value->u.s390x.entitlement = s390_cpu->env.entitlement; |
| 140 | } |
| 141 | #endif |
| 142 | } |
| 143 | |
| 144 | void s390_do_cpu_full_reset(CPUState *cs, run_on_cpu_data arg) |
| 145 | { |
| 146 | cpu_reset(cs); |
| 147 | } |
| 148 | |
| 149 | /* S390CPUClass Resettable reset_hold phase method */ |
| 150 | static void s390_cpu_reset_hold(Object *obj, ResetType type) |
| 151 | { |
| 152 | S390CPU *cpu = S390_CPU(obj); |
| 153 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); |
| 154 | CPUS390XState *env = &cpu->env; |
| 155 | |
| 156 | if (scc->parent_phases.hold) { |
| 157 | scc->parent_phases.hold(obj, type); |
| 158 | } |
| 159 | cpu->env.sigp_order = 0; |
| 160 | s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); |
| 161 | |
| 162 | switch (type) { |
| 163 | default: |
| 164 | /* RESET_TYPE_COLD: power on or "clear" reset */ |
| 165 | memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields)); |
| 166 | /* fall through */ |
| 167 | case RESET_TYPE_S390_CPU_INITIAL: |
| 168 | /* initial reset does not clear everything! */ |
| 169 | memset(&env->start_initial_reset_fields, 0, |
| 170 | offsetof(CPUS390XState, start_normal_reset_fields) - |
| 171 | offsetof(CPUS390XState, start_initial_reset_fields)); |
| 172 | |
| 173 | /* architectured initial value for Breaking-Event-Address register */ |
| 174 | env->gbea = 1; |
| 175 | |
| 176 | /* architectured initial values for CR 0 and 14 */ |
| 177 | env->cregs[0] = CR0_RESET; |
| 178 | env->cregs[14] = CR14_RESET; |
| 179 | |
| 180 | #if defined(CONFIG_USER_ONLY) |
| 181 | /* user mode should always be allowed to use the full FPU */ |
| 182 | env->cregs[0] |= CR0_AFP; |
| 183 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
| 184 | env->cregs[0] |= CR0_VECTOR; |
| 185 | } |
| 186 | #endif |
| 187 | |
| 188 | /* tininess for underflow is detected before rounding */ |
| 189 | set_float_detect_tininess(float_tininess_before_rounding, |
| 190 | &env->fpu_status); |
| 191 | set_float_2nan_prop_rule(float_2nan_prop_s_ab, &env->fpu_status); |
| 192 | set_float_3nan_prop_rule(float_3nan_prop_s_abc, &env->fpu_status); |
| 193 | set_float_infzeronan_rule(float_infzeronan_dnan_always, |
| 194 | &env->fpu_status); |
| 195 | /* Default NaN value: sign bit clear, frac msb set */ |
| 196 | set_float_default_nan_pattern(0b01000000, &env->fpu_status); |
| 197 | /* fall through */ |
| 198 | case RESET_TYPE_S390_CPU_NORMAL: |
| 199 | env->psw.mask &= ~PSW_MASK_RI; |
| 200 | memset(&env->start_normal_reset_fields, 0, |
| 201 | offsetof(CPUS390XState, end_reset_fields) - |
| 202 | offsetof(CPUS390XState, start_normal_reset_fields)); |
| 203 | |
| 204 | env->pfault_token = -1UL; |
| 205 | env->bpbc = false; |
| 206 | break; |
| 207 | } |
| 208 | |
| 209 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
| 210 | if (kvm_enabled()) { |
| 211 | switch (type) { |
| 212 | default: |
| 213 | kvm_s390_reset_vcpu_clear(cpu); |
| 214 | break; |
| 215 | case RESET_TYPE_S390_CPU_INITIAL: |
| 216 | kvm_s390_reset_vcpu_initial(cpu); |
| 217 | break; |
| 218 | case RESET_TYPE_S390_CPU_NORMAL: |
| 219 | kvm_s390_reset_vcpu_normal(cpu); |
| 220 | break; |
| 221 | } |
| 222 | } |
| 223 | } |
| 224 | |
| 225 | static void s390_cpu_disas_set_info(const CPUState *cpu, disassemble_info *info) |
| 226 | { |
| 227 | info->mach = bfd_mach_s390_64; |
| 228 | info->cap_arch = CS_ARCH_SYSTEMZ; |
| 229 | info->endian = BFD_ENDIAN_BIG; |
| 230 | info->cap_insn_unit = 2; |
| 231 | info->cap_insn_split = 6; |
| 232 | /* Disassemble everything, even if the cpu would trap on the insn. */ |
| 233 | info->cap_mode = CS_MODE_SYSTEMZ_ARCH14; |
| 234 | } |
| 235 | |
| 236 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
| 237 | { |
| 238 | CPUState *cs = CPU(dev); |
| 239 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
| 240 | Error *err = NULL; |
| 241 | |
| 242 | /* the model has to be realized before qemu_init_vcpu() due to kvm */ |
| 243 | s390_realize_cpu_model(cs, &err); |
| 244 | if (err) { |
| 245 | goto out; |
| 246 | } |
| 247 | |
| 248 | #if !defined(CONFIG_USER_ONLY) |
| 249 | if (!s390_cpu_system_realize(dev, &err)) { |
| 250 | goto out; |
| 251 | } |
| 252 | #endif |
| 253 | |
| 254 | cpu_common_realize(cs, &err); |
| 255 | if (err != NULL) { |
| 256 | goto out; |
| 257 | } |
| 258 | |
| 259 | #if !defined(CONFIG_USER_ONLY) |
| 260 | qemu_register_reset(s390_cpu_machine_reset_cb, S390_CPU(dev)); |
| 261 | #endif |
| 262 | s390_cpu_gdb_init(cs); |
| 263 | qemu_init_vcpu(cs); |
| 264 | |
| 265 | /* |
| 266 | * KVM requires the initial CPU reset ioctl to be executed on the target |
| 267 | * CPU thread. CPU hotplug under single-threaded TCG will not work with |
| 268 | * run_on_cpu(), as run_on_cpu() will not work properly if called while |
| 269 | * the main thread is already running but the CPU hasn't been realized. |
| 270 | */ |
| 271 | if (kvm_enabled()) { |
| 272 | run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL); |
| 273 | } else { |
| 274 | cpu_reset(cs); |
| 275 | } |
| 276 | |
| 277 | scc->parent_realize(dev, &err); |
| 278 | out: |
| 279 | error_propagate(errp, err); |
| 280 | } |
| 281 | |
| 282 | static void s390_cpu_initfn(Object *obj) |
| 283 | { |
| 284 | CPUState *cs = CPU(obj); |
| 285 | |
| 286 | cs->exception_index = EXCP_HLT; |
| 287 | |
| 288 | #if !defined(CONFIG_USER_ONLY) |
| 289 | s390_cpu_system_init(obj); |
| 290 | #endif |
| 291 | } |
| 292 | |
| 293 | static const gchar *s390_gdb_arch_name(CPUState *cs) |
| 294 | { |
| 295 | return "s390:64-bit"; |
| 296 | } |
| 297 | |
| 298 | #ifndef CONFIG_USER_ONLY |
| 299 | static const Property s390x_cpu_properties[] = { |
| 300 | DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0), |
| 301 | DEFINE_PROP_INT32("socket-id", S390CPU, env.socket_id, -1), |
| 302 | DEFINE_PROP_INT32("book-id", S390CPU, env.book_id, -1), |
| 303 | DEFINE_PROP_INT32("drawer-id", S390CPU, env.drawer_id, -1), |
| 304 | DEFINE_PROP_BOOL("dedicated", S390CPU, env.dedicated, false), |
| 305 | DEFINE_PROP_CPUS390ENTITLEMENT("entitlement", S390CPU, env.entitlement, |
| 306 | S390_CPU_ENTITLEMENT_AUTO), |
| 307 | }; |
| 308 | #endif |
| 309 | |
| 310 | #ifdef CONFIG_TCG |
| 311 | #include "accel/tcg/cpu-ops.h" |
| 312 | #include "tcg/tcg_s390x.h" |
| 313 | |
| 314 | static int s390x_cpu_mmu_index(CPUState *cs, bool ifetch) |
| 315 | { |
| 316 | return s390x_env_mmu_index(cpu_env(cs), ifetch); |
| 317 | } |
| 318 | |
| 319 | static TCGTBCPUState s390x_get_tb_cpu_state(CPUState *cs) |
| 320 | { |
| 321 | CPUS390XState *env = cpu_env(cs); |
| 322 | uint32_t flags; |
| 323 | |
| 324 | if (env->psw.addr & 1) { |
| 325 | /* |
| 326 | * Instructions must be at even addresses. |
| 327 | * This needs to be checked before address translation. |
| 328 | */ |
| 329 | env->int_pgm_ilen = 2; /* see s390_cpu_tlb_fill() */ |
| 330 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, 0); |
| 331 | } |
| 332 | |
| 333 | flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; |
| 334 | if (env->psw.mask & PSW_MASK_PER) { |
| 335 | flags |= env->cregs[9] & (FLAG_MASK_PER_BRANCH | |
| 336 | FLAG_MASK_PER_IFETCH | |
| 337 | FLAG_MASK_PER_IFETCH_NULLIFY); |
| 338 | if ((env->cregs[9] & PER_CR9_EVENT_STORE) && |
| 339 | (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) { |
| 340 | flags |= FLAG_MASK_PER_STORE_REAL; |
| 341 | } |
| 342 | } |
| 343 | if (env->cregs[0] & CR0_AFP) { |
| 344 | flags |= FLAG_MASK_AFP; |
| 345 | } |
| 346 | if (env->cregs[0] & CR0_VECTOR) { |
| 347 | flags |= FLAG_MASK_VECTOR; |
| 348 | } |
| 349 | |
| 350 | return (TCGTBCPUState){ |
| 351 | .pc = env->psw.addr, |
| 352 | .flags = flags, |
| 353 | .cs_base = env->ex_value, |
| 354 | }; |
| 355 | } |
| 356 | |
| 357 | #ifndef CONFIG_USER_ONLY |
| 358 | static vaddr s390_pointer_wrap(CPUState *cs, int mmu_idx, |
| 359 | vaddr result, vaddr base) |
| 360 | { |
| 361 | return wrap_address(cpu_env(cs), result); |
| 362 | } |
| 363 | #endif |
| 364 | |
| 365 | static const TCGCPUOps s390_tcg_ops = { |
| 366 | .mttcg_supported = true, |
| 367 | .precise_smc = true, |
| 368 | /* |
| 369 | * The z/Architecture has a strong memory model with some |
| 370 | * store-after-load re-ordering. |
| 371 | */ |
| 372 | .guest_default_memory_order = TCG_MO_ALL & ~TCG_MO_ST_LD, |
| 373 | |
| 374 | .initialize = s390x_translate_init, |
| 375 | .translate_code = s390x_translate_code, |
| 376 | .get_tb_cpu_state = s390x_get_tb_cpu_state, |
| 377 | .restore_state_to_opc = s390x_restore_state_to_opc, |
| 378 | .mmu_index = s390x_cpu_mmu_index, |
| 379 | |
| 380 | #ifdef CONFIG_USER_ONLY |
| 381 | .record_sigsegv = s390_cpu_record_sigsegv, |
| 382 | .record_sigbus = s390_cpu_record_sigbus, |
| 383 | #else |
| 384 | .tlb_fill = s390_cpu_tlb_fill, |
| 385 | .pointer_wrap = s390_pointer_wrap, |
| 386 | .cpu_exec_interrupt = s390_cpu_exec_interrupt, |
| 387 | .cpu_exec_halt = s390_cpu_has_work, |
| 388 | .cpu_exec_reset = cpu_reset, |
| 389 | .do_interrupt = s390_cpu_do_interrupt, |
| 390 | .debug_excp_handler = s390x_cpu_debug_excp_handler, |
| 391 | .do_unaligned_access = s390x_cpu_do_unaligned_access, |
| 392 | #endif /* !CONFIG_USER_ONLY */ |
| 393 | }; |
| 394 | #endif /* CONFIG_TCG */ |
| 395 | |
| 396 | static void s390_cpu_class_init(ObjectClass *oc, const void *data) |
| 397 | { |
| 398 | S390CPUClass *scc = S390_CPU_CLASS(oc); |
| 399 | CPUClass *cc = CPU_CLASS(scc); |
| 400 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 401 | ResettableClass *rc = RESETTABLE_CLASS(oc); |
| 402 | |
| 403 | device_class_set_parent_realize(dc, s390_cpu_realizefn, |
| 404 | &scc->parent_realize); |
| 405 | dc->user_creatable = true; |
| 406 | |
| 407 | resettable_class_set_parent_phases(rc, NULL, s390_cpu_reset_hold, NULL, |
| 408 | &scc->parent_phases); |
| 409 | |
| 410 | cc->class_by_name = s390_cpu_class_by_name; |
| 411 | cc->list_cpus = s390_cpu_list; |
| 412 | cc->dump_state = s390_cpu_dump_state; |
| 413 | cc->query_cpu_fast = s390_query_cpu_fast; |
| 414 | cc->set_pc = s390_cpu_set_pc; |
| 415 | cc->get_pc = s390_cpu_get_pc; |
| 416 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
| 417 | cc->gdb_write_register = s390_cpu_gdb_write_register; |
| 418 | #ifndef CONFIG_USER_ONLY |
| 419 | device_class_set_props(dc, s390x_cpu_properties); |
| 420 | s390_cpu_system_class_init(cc); |
| 421 | #endif |
| 422 | cc->disas_set_info = s390_cpu_disas_set_info; |
| 423 | cc->gdb_core_xml_file = "s390x-core64.xml"; |
| 424 | cc->gdb_arch_name = s390_gdb_arch_name; |
| 425 | |
| 426 | s390_cpu_model_class_register_props(oc); |
| 427 | |
| 428 | #ifdef CONFIG_TCG |
| 429 | cc->tcg_ops = &s390_tcg_ops; |
| 430 | #endif /* CONFIG_TCG */ |
| 431 | } |
| 432 | |
| 433 | static const TypeInfo s390_cpu_type_info = { |
| 434 | .name = TYPE_S390_CPU, |
| 435 | .parent = TYPE_CPU, |
| 436 | .instance_size = sizeof(S390CPU), |
| 437 | .instance_align = __alignof__(S390CPU), |
| 438 | .instance_init = s390_cpu_initfn, |
| 439 | |
| 440 | #ifndef CONFIG_USER_ONLY |
| 441 | .instance_finalize = s390_cpu_finalize, |
| 442 | #endif /* !CONFIG_USER_ONLY */ |
| 443 | |
| 444 | .abstract = true, |
| 445 | .class_size = sizeof(S390CPUClass), |
| 446 | .class_init = s390_cpu_class_init, |
| 447 | }; |
| 448 | |
| 449 | static void s390_cpu_register_types(void) |
| 450 | { |
| 451 | type_register_static(&s390_cpu_type_info); |
| 452 | } |
| 453 | |
| 454 | type_init(s390_cpu_register_types) |