| 1 | /* |
| 2 | * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn |
| 3 | * |
| 4 | * This library is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU Lesser General Public |
| 6 | * License as published by the Free Software Foundation; either |
| 7 | * version 2.1 of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This library is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 12 | * Lesser General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU Lesser General Public |
| 15 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #include "qemu/osdep.h" |
| 19 | #include "qemu/log.h" |
| 20 | #include "hw/core/registerfields.h" |
| 21 | #include "cpu.h" |
| 22 | #include "exec/cputlb.h" |
| 23 | #include "accel/tcg/cpu-loop.h" |
| 24 | #include "accel/tcg/cpu-mmu-index.h" |
| 25 | #include "exec/page-protection.h" |
| 26 | #include "exec/target_page.h" |
| 27 | #include "fpu/softfloat-helpers.h" |
| 28 | #include "qemu/qemu-print.h" |
| 29 | |
| 30 | enum { |
| 31 | TLBRET_DIRTY = -4, |
| 32 | TLBRET_INVALID = -3, |
| 33 | TLBRET_NOMATCH = -2, |
| 34 | TLBRET_BADADDR = -1, |
| 35 | TLBRET_MATCH = 0 |
| 36 | }; |
| 37 | |
| 38 | static int get_physical_address(CPUTriCoreState *env, hwaddr *physical, |
| 39 | int *prot, vaddr address, |
| 40 | MMUAccessType access_type, int mmu_idx) |
| 41 | { |
| 42 | int ret = TLBRET_MATCH; |
| 43 | |
| 44 | *physical = address & 0xFFFFFFFF; |
| 45 | *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
| 46 | |
| 47 | return ret; |
| 48 | } |
| 49 | |
| 50 | hwaddr tricore_cpu_get_phys_addr_debug(CPUState *cs, vaddr addr) |
| 51 | { |
| 52 | TriCoreCPU *cpu = TRICORE_CPU(cs); |
| 53 | hwaddr phys_addr; |
| 54 | int prot; |
| 55 | int mmu_idx = cpu_mmu_index(cs, false); |
| 56 | |
| 57 | if (get_physical_address(&cpu->env, &phys_addr, &prot, addr, |
| 58 | MMU_DATA_LOAD, mmu_idx)) { |
| 59 | return -1; |
| 60 | } |
| 61 | return phys_addr; |
| 62 | } |
| 63 | |
| 64 | /* TODO: Add exception support */ |
| 65 | static void raise_mmu_exception(CPUTriCoreState *env, vaddr address, |
| 66 | int rw, int tlb_error) |
| 67 | { |
| 68 | } |
| 69 | |
| 70 | bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, |
| 71 | MMUAccessType rw, int mmu_idx, |
| 72 | bool probe, uintptr_t retaddr) |
| 73 | { |
| 74 | CPUTriCoreState *env = cpu_env(cs); |
| 75 | hwaddr physical; |
| 76 | int prot; |
| 77 | int ret = 0; |
| 78 | |
| 79 | rw &= 1; |
| 80 | ret = get_physical_address(env, &physical, &prot, |
| 81 | address, rw, mmu_idx); |
| 82 | |
| 83 | qemu_log_mask(CPU_LOG_MMU, "%s address=0x%" VADDR_PRIx " ret %d physical " |
| 84 | HWADDR_FMT_plx " prot %d\n", |
| 85 | __func__, address, ret, physical, prot); |
| 86 | |
| 87 | if (ret == TLBRET_MATCH) { |
| 88 | tlb_set_page(cs, address & TARGET_PAGE_MASK, |
| 89 | physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, |
| 90 | mmu_idx, TARGET_PAGE_SIZE); |
| 91 | return true; |
| 92 | } else { |
| 93 | assert(ret < 0); |
| 94 | if (probe) { |
| 95 | return false; |
| 96 | } |
| 97 | raise_mmu_exception(env, address, rw, ret); |
| 98 | cpu_loop_exit_restore(cs, retaddr); |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | void fpu_set_state(CPUTriCoreState *env) |
| 103 | { |
| 104 | switch (extract32(env->PSW, 24, 2)) { |
| 105 | case 0: |
| 106 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
| 107 | break; |
| 108 | case 1: |
| 109 | set_float_rounding_mode(float_round_up, &env->fp_status); |
| 110 | break; |
| 111 | case 2: |
| 112 | set_float_rounding_mode(float_round_down, &env->fp_status); |
| 113 | break; |
| 114 | case 3: |
| 115 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
| 116 | break; |
| 117 | } |
| 118 | |
| 119 | set_flush_inputs_to_zero(1, &env->fp_status); |
| 120 | set_flush_to_zero(1, &env->fp_status); |
| 121 | set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status); |
| 122 | set_float_ftz_detection(float_ftz_before_rounding, &env->fp_status); |
| 123 | set_default_nan_mode(1, &env->fp_status); |
| 124 | /* Default NaN pattern: sign bit clear, frac msb set */ |
| 125 | set_float_default_nan_pattern(0b01000000, &env->fp_status); |
| 126 | } |
| 127 | |
| 128 | uint32_t psw_read(CPUTriCoreState *env) |
| 129 | { |
| 130 | /* clear all USB bits */ |
| 131 | env->PSW &= 0x7ffffff; |
| 132 | /* now set them from the cache */ |
| 133 | env->PSW |= ((env->PSW_USB_C != 0) << 31); |
| 134 | env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1); |
| 135 | env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2); |
| 136 | env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3); |
| 137 | env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4); |
| 138 | |
| 139 | return env->PSW; |
| 140 | } |
| 141 | |
| 142 | void psw_write(CPUTriCoreState *env, uint32_t val) |
| 143 | { |
| 144 | env->PSW_USB_C = (val & MASK_USB_C); |
| 145 | env->PSW_USB_V = (val & MASK_USB_V) << 1; |
| 146 | env->PSW_USB_SV = (val & MASK_USB_SV) << 2; |
| 147 | env->PSW_USB_AV = (val & MASK_USB_AV) << 3; |
| 148 | env->PSW_USB_SAV = (val & MASK_USB_SAV) << 4; |
| 149 | env->PSW = val; |
| 150 | |
| 151 | fpu_set_state(env); |
| 152 | } |
| 153 | |
| 154 | #define FIELD_GETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \ |
| 155 | uint32_t NAME(CPUTriCoreState *env) \ |
| 156 | { \ |
| 157 | if (tricore_has_feature(env, TRICORE_FEATURE_##FEATURE)) { \ |
| 158 | return FIELD_EX32(env->REG, REG, FIELD ## _ ## FEATURE); \ |
| 159 | } \ |
| 160 | return FIELD_EX32(env->REG, REG, FIELD ## _13); \ |
| 161 | } |
| 162 | |
| 163 | #define FIELD_GETTER(NAME, REG, FIELD) \ |
| 164 | uint32_t NAME(CPUTriCoreState *env) \ |
| 165 | { \ |
| 166 | return FIELD_EX32(env->REG, REG, FIELD); \ |
| 167 | } |
| 168 | |
| 169 | #define FIELD_SETTER_WITH_FEATURE(NAME, REG, FIELD, FEATURE) \ |
| 170 | void NAME(CPUTriCoreState *env, uint32_t val) \ |
| 171 | { \ |
| 172 | if (tricore_has_feature(env, TRICORE_FEATURE_##FEATURE)) { \ |
| 173 | env->REG = FIELD_DP32(env->REG, REG, FIELD ## _ ## FEATURE, val); \ |
| 174 | } \ |
| 175 | env->REG = FIELD_DP32(env->REG, REG, FIELD ## _13, val); \ |
| 176 | } |
| 177 | |
| 178 | #define FIELD_SETTER(NAME, REG, FIELD) \ |
| 179 | void NAME(CPUTriCoreState *env, uint32_t val) \ |
| 180 | { \ |
| 181 | env->REG = FIELD_DP32(env->REG, REG, FIELD, val); \ |
| 182 | } |
| 183 | |
| 184 | FIELD_GETTER_WITH_FEATURE(pcxi_get_pcpn, PCXI, PCPN, 161) |
| 185 | FIELD_SETTER_WITH_FEATURE(pcxi_set_pcpn, PCXI, PCPN, 161) |
| 186 | FIELD_GETTER_WITH_FEATURE(pcxi_get_pie, PCXI, PIE, 161) |
| 187 | FIELD_SETTER_WITH_FEATURE(pcxi_set_pie, PCXI, PIE, 161) |
| 188 | FIELD_GETTER_WITH_FEATURE(pcxi_get_ul, PCXI, UL, 161) |
| 189 | FIELD_SETTER_WITH_FEATURE(pcxi_set_ul, PCXI, UL, 161) |
| 190 | FIELD_GETTER(pcxi_get_pcxs, PCXI, PCXS) |
| 191 | FIELD_GETTER(pcxi_get_pcxo, PCXI, PCXO) |
| 192 | |
| 193 | FIELD_GETTER_WITH_FEATURE(icr_get_ie, ICR, IE, 161) |
| 194 | FIELD_SETTER_WITH_FEATURE(icr_set_ie, ICR, IE, 161) |
| 195 | FIELD_GETTER(icr_get_ccpn, ICR, CCPN) |
| 196 | FIELD_SETTER(icr_set_ccpn, ICR, CCPN) |