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1 /*
2 * Xtensa gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2013 SUSE LINUX Products GmbH
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "gdbstub/helpers.h"
23 #include "qemu/log.h"
24
25 enum {
26 xtRegisterTypeArRegfile = 1, /* Register File ar0..arXX. */
27 xtRegisterTypeSpecialReg, /* CPU states, such as PS, Booleans, (rsr). */
28 xtRegisterTypeUserReg, /* User defined registers (rur). */
29 xtRegisterTypeTieRegfile, /* User define register files. */
30 xtRegisterTypeTieState, /* TIE States (mapped on user regs). */
31 xtRegisterTypeMapped, /* Mapped on Special Registers. */
32 xtRegisterTypeUnmapped, /* Special case of masked registers. */
33 xtRegisterTypeWindow, /* Live window registers (a0..a15). */
34 xtRegisterTypeVirtual, /* PC, FP. */
35 xtRegisterTypeUnknown
36 };
37
38 #define XTENSA_REGISTER_FLAGS_PRIVILEGED 0x0001
39 #define XTENSA_REGISTER_FLAGS_READABLE 0x0002
40 #define XTENSA_REGISTER_FLAGS_WRITABLE 0x0004
41 #define XTENSA_REGISTER_FLAGS_VOLATILE 0x0008
42
43 void xtensa_count_regs(const XtensaConfig *config,
44 unsigned *n_regs, unsigned *n_core_regs)
45 {
46 unsigned i;
47 bool count_core_regs = true;
48
49 for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
50 if (config->gdb_regmap.reg[i].type != xtRegisterTypeTieState &&
51 config->gdb_regmap.reg[i].type != xtRegisterTypeMapped &&
52 config->gdb_regmap.reg[i].type != xtRegisterTypeUnmapped) {
53 ++*n_regs;
54 if (count_core_regs) {
55 if ((config->gdb_regmap.reg[i].flags &
56 XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
57 ++*n_core_regs;
58 } else {
59 count_core_regs = false;
60 }
61 }
62 }
63 }
64 }
65
66 int xtensa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
67 {
68 CPUXtensaState *env = cpu_env(cs);
69 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
70 #ifdef CONFIG_USER_ONLY
71 int num_regs = env->config->gdb_regmap.num_core_regs;
72 #else
73 int num_regs = env->config->gdb_regmap.num_regs;
74 #endif
75 unsigned i;
76
77 if (n < 0 || n >= num_regs) {
78 return 0;
79 }
80
81 switch (reg->type) {
82 case xtRegisterTypeVirtual: /*pc*/
83 return gdb_get_reg32(mem_buf, env->pc);
84
85 case xtRegisterTypeArRegfile: /*ar*/
86 xtensa_sync_phys_from_window(env);
87 return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff)
88 % env->config->nareg]);
89
90 case xtRegisterTypeSpecialReg: /*SR*/
91 return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]);
92
93 case xtRegisterTypeUserReg: /*UR*/
94 return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]);
95
96 case xtRegisterTypeTieRegfile: /*f*/
97 i = reg->targno & 0x0f;
98 switch (reg->size) {
99 case 4:
100 return gdb_get_reg32(mem_buf,
101 float32_val(env->fregs[i].f32[FP_F32_LOW]));
102 case 8:
103 return gdb_get_reg64(mem_buf, float64_val(env->fregs[i].f64));
104 default:
105 qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported size %d\n",
106 __func__, n, reg->size);
107 return gdb_get_zeroes(mem_buf, reg->size);
108 }
109
110 case xtRegisterTypeWindow: /*a*/
111 return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]);
112
113 default:
114 qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported type %d\n",
115 __func__, n, reg->type);
116 return gdb_get_zeroes(mem_buf, reg->size);
117 }
118 }
119
120 int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
121 {
122 CPUXtensaState *env = cpu_env(cs);
123 uint32_t tmp;
124 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
125 #ifdef CONFIG_USER_ONLY
126 int num_regs = env->config->gdb_regmap.num_core_regs;
127 #else
128 int num_regs = env->config->gdb_regmap.num_regs;
129 #endif
130
131 if (n < 0 || n >= num_regs) {
132 return 0;
133 }
134
135 tmp = ldl_p(mem_buf);
136
137 switch (reg->type) {
138 case xtRegisterTypeVirtual: /*pc*/
139 env->pc = tmp;
140 break;
141
142 case xtRegisterTypeArRegfile: /*ar*/
143 env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
144 xtensa_sync_window_from_phys(env);
145 break;
146
147 case xtRegisterTypeSpecialReg: /*SR*/
148 env->sregs[reg->targno & 0xff] = tmp;
149 break;
150
151 case xtRegisterTypeUserReg: /*UR*/
152 env->uregs[reg->targno & 0xff] = tmp;
153 break;
154
155 case xtRegisterTypeTieRegfile: /*f*/
156 switch (reg->size) {
157 case 4:
158 env->fregs[reg->targno & 0x0f].f32[FP_F32_LOW] = make_float32(tmp);
159 return 4;
160 case 8:
161 env->fregs[reg->targno & 0x0f].f64 = make_float64(tmp);
162 return 8;
163 default:
164 qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported size %d\n",
165 __func__, n, reg->size);
166 return reg->size;
167 }
168
169 case xtRegisterTypeWindow: /*a*/
170 env->regs[reg->targno & 0x0f] = tmp;
171 break;
172
173 default:
174 qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported type %d\n",
175 __func__, n, reg->type);
176 return reg->size;
177 }
178
179 return 4;
180 }