| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * Define AArch64 target-specific operand constraints. |
| 4 | * Copyright (c) 2021 Linaro |
| 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Define constraint letters for register sets: |
| 9 | * REGS(letter, register_mask) |
| 10 | */ |
| 11 | REGS('r', ALL_GENERAL_REGS) |
| 12 | REGS('w', ALL_VECTOR_REGS) |
| 13 | |
| 14 | /* |
| 15 | * Define constraint letters for constants: |
| 16 | * CONST(letter, TCG_CT_CONST_* bit set) |
| 17 | */ |
| 18 | CONST('A', TCG_CT_CONST_AIMM) |
| 19 | CONST('C', TCG_CT_CONST_CMP) |
| 20 | CONST('L', TCG_CT_CONST_LIMM) |
| 21 | CONST('M', TCG_CT_CONST_MONE) |
| 22 | CONST('O', TCG_CT_CONST_ORRI) |
| 23 | CONST('N', TCG_CT_CONST_ANDI) |
| 24 | CONST('S', TCG_CT_CONST_S8) |
| 25 | CONST('U', TCG_CT_CONST_U8) |
| 26 | CONST('Z', TCG_CT_CONST_ZERO) |