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1 /* SPDX-License-Identifier: MIT */
2 /*
3 * LoongArch instruction formats, opcodes, and encoders for TCG use.
4 *
5 * This file is auto-generated by genqemutcgdefs from
6 * https://github.com/loongson-community/loongarch-opcodes,
7 * from commit 1b95bb8c443ad71e266120fd97bd227df2d8ecfc.
8 * DO NOT EDIT.
9 */
10
11 typedef enum {
12 OPC_MOVGR2SCR = 0x00000800,
13 OPC_MOVSCR2GR = 0x00000c00,
14 OPC_CLZ_W = 0x00001400,
15 OPC_CTZ_W = 0x00001c00,
16 OPC_CLZ_D = 0x00002400,
17 OPC_CTZ_D = 0x00002c00,
18 OPC_REVB_2H = 0x00003000,
19 OPC_REVB_2W = 0x00003800,
20 OPC_REVB_D = 0x00003c00,
21 OPC_REVBIT_4B = 0x00004800,
22 OPC_REVBIT_8B = 0x00004c00,
23 OPC_REVBIT_W = 0x00005000,
24 OPC_REVBIT_D = 0x00005400,
25 OPC_SEXT_H = 0x00005800,
26 OPC_SEXT_B = 0x00005c00,
27 OPC_ADD_W = 0x00100000,
28 OPC_ADD_D = 0x00108000,
29 OPC_SUB_W = 0x00110000,
30 OPC_SUB_D = 0x00118000,
31 OPC_SLT = 0x00120000,
32 OPC_SLTU = 0x00128000,
33 OPC_MASKEQZ = 0x00130000,
34 OPC_MASKNEZ = 0x00138000,
35 OPC_NOR = 0x00140000,
36 OPC_AND = 0x00148000,
37 OPC_OR = 0x00150000,
38 OPC_XOR = 0x00158000,
39 OPC_ORN = 0x00160000,
40 OPC_ANDN = 0x00168000,
41 OPC_SLL_W = 0x00170000,
42 OPC_SRL_W = 0x00178000,
43 OPC_SRA_W = 0x00180000,
44 OPC_SLL_D = 0x00188000,
45 OPC_SRL_D = 0x00190000,
46 OPC_SRA_D = 0x00198000,
47 OPC_ROTR_B = 0x001a0000,
48 OPC_ROTR_H = 0x001a8000,
49 OPC_ROTR_W = 0x001b0000,
50 OPC_ROTR_D = 0x001b8000,
51 OPC_MUL_W = 0x001c0000,
52 OPC_MULH_W = 0x001c8000,
53 OPC_MULH_WU = 0x001d0000,
54 OPC_MUL_D = 0x001d8000,
55 OPC_MULH_D = 0x001e0000,
56 OPC_MULH_DU = 0x001e8000,
57 OPC_DIV_W = 0x00200000,
58 OPC_MOD_W = 0x00208000,
59 OPC_DIV_WU = 0x00210000,
60 OPC_MOD_WU = 0x00218000,
61 OPC_DIV_D = 0x00220000,
62 OPC_MOD_D = 0x00228000,
63 OPC_DIV_DU = 0x00230000,
64 OPC_MOD_DU = 0x00238000,
65 OPC_SLLI_W = 0x00408000,
66 OPC_SLLI_D = 0x00410000,
67 OPC_SRLI_W = 0x00448000,
68 OPC_SRLI_D = 0x00450000,
69 OPC_SRAI_W = 0x00488000,
70 OPC_SRAI_D = 0x00490000,
71 OPC_ROTRI_B = 0x004c2000,
72 OPC_ROTRI_H = 0x004c4000,
73 OPC_ROTRI_W = 0x004c8000,
74 OPC_ROTRI_D = 0x004d0000,
75 OPC_BSTRINS_W = 0x00600000,
76 OPC_BSTRPICK_W = 0x00608000,
77 OPC_BSTRINS_D = 0x00800000,
78 OPC_BSTRPICK_D = 0x00c00000,
79 OPC_FMOV_D = 0x01149800,
80 OPC_MOVGR2FR_D = 0x0114a800,
81 OPC_MOVFR2GR_D = 0x0114b800,
82 OPC_SLTI = 0x02000000,
83 OPC_SLTUI = 0x02400000,
84 OPC_ADDI_W = 0x02800000,
85 OPC_ADDI_D = 0x02c00000,
86 OPC_CU52I_D = 0x03000000,
87 OPC_ANDI = 0x03400000,
88 OPC_ORI = 0x03800000,
89 OPC_XORI = 0x03c00000,
90 OPC_VBITSEL_V = 0x0d100000,
91 OPC_XVBITSEL_V = 0x0d200000,
92 OPC_VSHUF_B = 0x0d500000,
93 OPC_XVSHUF_B = 0x0d600000,
94 OPC_ADDU16I_D = 0x10000000,
95 OPC_LU12I_W = 0x14000000,
96 OPC_CU32I_D = 0x16000000,
97 OPC_PCADDU2I = 0x18000000,
98 OPC_PCALAU12I = 0x1a000000,
99 OPC_PCADDU12I = 0x1c000000,
100 OPC_PCADDU18I = 0x1e000000,
101 OPC_LD_B = 0x28000000,
102 OPC_LD_H = 0x28400000,
103 OPC_LD_W = 0x28800000,
104 OPC_LD_D = 0x28c00000,
105 OPC_ST_B = 0x29000000,
106 OPC_ST_H = 0x29400000,
107 OPC_ST_W = 0x29800000,
108 OPC_ST_D = 0x29c00000,
109 OPC_LD_BU = 0x2a000000,
110 OPC_LD_HU = 0x2a400000,
111 OPC_LD_WU = 0x2a800000,
112 OPC_FLD_S = 0x2b000000,
113 OPC_FST_S = 0x2b400000,
114 OPC_FLD_D = 0x2b800000,
115 OPC_FST_D = 0x2bc00000,
116 OPC_VLD = 0x2c000000,
117 OPC_VST = 0x2c400000,
118 OPC_XVLD = 0x2c800000,
119 OPC_XVST = 0x2cc00000,
120 OPC_VLDREPL_D = 0x30100000,
121 OPC_VLDREPL_W = 0x30200000,
122 OPC_VLDREPL_H = 0x30400000,
123 OPC_VLDREPL_B = 0x30800000,
124 OPC_VSTELM_D = 0x31100000,
125 OPC_VSTELM_W = 0x31200000,
126 OPC_VSTELM_H = 0x31400000,
127 OPC_VSTELM_B = 0x31800000,
128 OPC_XVLDREPL_D = 0x32100000,
129 OPC_XVLDREPL_W = 0x32200000,
130 OPC_XVLDREPL_H = 0x32400000,
131 OPC_XVLDREPL_B = 0x32800000,
132 OPC_XVSTELM_D = 0x33100000,
133 OPC_XVSTELM_W = 0x33200000,
134 OPC_XVSTELM_H = 0x33400000,
135 OPC_XVSTELM_B = 0x33800000,
136 OPC_LDX_B = 0x38000000,
137 OPC_LDX_H = 0x38040000,
138 OPC_LDX_W = 0x38080000,
139 OPC_LDX_D = 0x380c0000,
140 OPC_STX_B = 0x38100000,
141 OPC_STX_H = 0x38140000,
142 OPC_STX_W = 0x38180000,
143 OPC_STX_D = 0x381c0000,
144 OPC_LDX_BU = 0x38200000,
145 OPC_LDX_HU = 0x38240000,
146 OPC_LDX_WU = 0x38280000,
147 OPC_FLDX_S = 0x38300000,
148 OPC_FLDX_D = 0x38340000,
149 OPC_FSTX_S = 0x38380000,
150 OPC_FSTX_D = 0x383c0000,
151 OPC_VLDX = 0x38400000,
152 OPC_VSTX = 0x38440000,
153 OPC_XVLDX = 0x38480000,
154 OPC_XVSTX = 0x384c0000,
155 OPC_DBAR = 0x38720000,
156 OPC_JISCR0 = 0x48000200,
157 OPC_JISCR1 = 0x48000300,
158 OPC_JIRL = 0x4c000000,
159 OPC_B = 0x50000000,
160 OPC_BL = 0x54000000,
161 OPC_BEQ = 0x58000000,
162 OPC_BNE = 0x5c000000,
163 OPC_BGT = 0x60000000,
164 OPC_BLE = 0x64000000,
165 OPC_BGTU = 0x68000000,
166 OPC_BLEU = 0x6c000000,
167 OPC_VSEQ_B = 0x70000000,
168 OPC_VSEQ_H = 0x70008000,
169 OPC_VSEQ_W = 0x70010000,
170 OPC_VSEQ_D = 0x70018000,
171 OPC_VSLE_B = 0x70020000,
172 OPC_VSLE_H = 0x70028000,
173 OPC_VSLE_W = 0x70030000,
174 OPC_VSLE_D = 0x70038000,
175 OPC_VSLE_BU = 0x70040000,
176 OPC_VSLE_HU = 0x70048000,
177 OPC_VSLE_WU = 0x70050000,
178 OPC_VSLE_DU = 0x70058000,
179 OPC_VSLT_B = 0x70060000,
180 OPC_VSLT_H = 0x70068000,
181 OPC_VSLT_W = 0x70070000,
182 OPC_VSLT_D = 0x70078000,
183 OPC_VSLT_BU = 0x70080000,
184 OPC_VSLT_HU = 0x70088000,
185 OPC_VSLT_WU = 0x70090000,
186 OPC_VSLT_DU = 0x70098000,
187 OPC_VADD_B = 0x700a0000,
188 OPC_VADD_H = 0x700a8000,
189 OPC_VADD_W = 0x700b0000,
190 OPC_VADD_D = 0x700b8000,
191 OPC_VSUB_B = 0x700c0000,
192 OPC_VSUB_H = 0x700c8000,
193 OPC_VSUB_W = 0x700d0000,
194 OPC_VSUB_D = 0x700d8000,
195 OPC_VSADD_B = 0x70460000,
196 OPC_VSADD_H = 0x70468000,
197 OPC_VSADD_W = 0x70470000,
198 OPC_VSADD_D = 0x70478000,
199 OPC_VSSUB_B = 0x70480000,
200 OPC_VSSUB_H = 0x70488000,
201 OPC_VSSUB_W = 0x70490000,
202 OPC_VSSUB_D = 0x70498000,
203 OPC_VSADD_BU = 0x704a0000,
204 OPC_VSADD_HU = 0x704a8000,
205 OPC_VSADD_WU = 0x704b0000,
206 OPC_VSADD_DU = 0x704b8000,
207 OPC_VSSUB_BU = 0x704c0000,
208 OPC_VSSUB_HU = 0x704c8000,
209 OPC_VSSUB_WU = 0x704d0000,
210 OPC_VSSUB_DU = 0x704d8000,
211 OPC_VMAX_B = 0x70700000,
212 OPC_VMAX_H = 0x70708000,
213 OPC_VMAX_W = 0x70710000,
214 OPC_VMAX_D = 0x70718000,
215 OPC_VMIN_B = 0x70720000,
216 OPC_VMIN_H = 0x70728000,
217 OPC_VMIN_W = 0x70730000,
218 OPC_VMIN_D = 0x70738000,
219 OPC_VMAX_BU = 0x70740000,
220 OPC_VMAX_HU = 0x70748000,
221 OPC_VMAX_WU = 0x70750000,
222 OPC_VMAX_DU = 0x70758000,
223 OPC_VMIN_BU = 0x70760000,
224 OPC_VMIN_HU = 0x70768000,
225 OPC_VMIN_WU = 0x70770000,
226 OPC_VMIN_DU = 0x70778000,
227 OPC_VMUL_B = 0x70840000,
228 OPC_VMUL_H = 0x70848000,
229 OPC_VMUL_W = 0x70850000,
230 OPC_VMUL_D = 0x70858000,
231 OPC_VSLL_B = 0x70e80000,
232 OPC_VSLL_H = 0x70e88000,
233 OPC_VSLL_W = 0x70e90000,
234 OPC_VSLL_D = 0x70e98000,
235 OPC_VSRL_B = 0x70ea0000,
236 OPC_VSRL_H = 0x70ea8000,
237 OPC_VSRL_W = 0x70eb0000,
238 OPC_VSRL_D = 0x70eb8000,
239 OPC_VSRA_B = 0x70ec0000,
240 OPC_VSRA_H = 0x70ec8000,
241 OPC_VSRA_W = 0x70ed0000,
242 OPC_VSRA_D = 0x70ed8000,
243 OPC_VROTR_B = 0x70ee0000,
244 OPC_VROTR_H = 0x70ee8000,
245 OPC_VROTR_W = 0x70ef0000,
246 OPC_VROTR_D = 0x70ef8000,
247 OPC_VREPLVE_B = 0x71220000,
248 OPC_VREPLVE_H = 0x71228000,
249 OPC_VREPLVE_W = 0x71230000,
250 OPC_VREPLVE_D = 0x71238000,
251 OPC_VAND_V = 0x71260000,
252 OPC_VOR_V = 0x71268000,
253 OPC_VXOR_V = 0x71270000,
254 OPC_VNOR_V = 0x71278000,
255 OPC_VANDN_V = 0x71280000,
256 OPC_VORN_V = 0x71288000,
257 OPC_VSEQI_B = 0x72800000,
258 OPC_VSEQI_H = 0x72808000,
259 OPC_VSEQI_W = 0x72810000,
260 OPC_VSEQI_D = 0x72818000,
261 OPC_VSLEI_B = 0x72820000,
262 OPC_VSLEI_H = 0x72828000,
263 OPC_VSLEI_W = 0x72830000,
264 OPC_VSLEI_D = 0x72838000,
265 OPC_VSLEI_BU = 0x72840000,
266 OPC_VSLEI_HU = 0x72848000,
267 OPC_VSLEI_WU = 0x72850000,
268 OPC_VSLEI_DU = 0x72858000,
269 OPC_VSLTI_B = 0x72860000,
270 OPC_VSLTI_H = 0x72868000,
271 OPC_VSLTI_W = 0x72870000,
272 OPC_VSLTI_D = 0x72878000,
273 OPC_VSLTI_BU = 0x72880000,
274 OPC_VSLTI_HU = 0x72888000,
275 OPC_VSLTI_WU = 0x72890000,
276 OPC_VSLTI_DU = 0x72898000,
277 OPC_VADDI_BU = 0x728a0000,
278 OPC_VADDI_HU = 0x728a8000,
279 OPC_VADDI_WU = 0x728b0000,
280 OPC_VADDI_DU = 0x728b8000,
281 OPC_VSUBI_BU = 0x728c0000,
282 OPC_VSUBI_HU = 0x728c8000,
283 OPC_VSUBI_WU = 0x728d0000,
284 OPC_VSUBI_DU = 0x728d8000,
285 OPC_VMAXI_B = 0x72900000,
286 OPC_VMAXI_H = 0x72908000,
287 OPC_VMAXI_W = 0x72910000,
288 OPC_VMAXI_D = 0x72918000,
289 OPC_VMINI_B = 0x72920000,
290 OPC_VMINI_H = 0x72928000,
291 OPC_VMINI_W = 0x72930000,
292 OPC_VMINI_D = 0x72938000,
293 OPC_VMAXI_BU = 0x72940000,
294 OPC_VMAXI_HU = 0x72948000,
295 OPC_VMAXI_WU = 0x72950000,
296 OPC_VMAXI_DU = 0x72958000,
297 OPC_VMINI_BU = 0x72960000,
298 OPC_VMINI_HU = 0x72968000,
299 OPC_VMINI_WU = 0x72970000,
300 OPC_VMINI_DU = 0x72978000,
301 OPC_VNEG_B = 0x729c3000,
302 OPC_VNEG_H = 0x729c3400,
303 OPC_VNEG_W = 0x729c3800,
304 OPC_VNEG_D = 0x729c3c00,
305 OPC_VREPLGR2VR_B = 0x729f0000,
306 OPC_VREPLGR2VR_H = 0x729f0400,
307 OPC_VREPLGR2VR_W = 0x729f0800,
308 OPC_VREPLGR2VR_D = 0x729f0c00,
309 OPC_VROTRI_B = 0x72a02000,
310 OPC_VROTRI_H = 0x72a04000,
311 OPC_VROTRI_W = 0x72a08000,
312 OPC_VROTRI_D = 0x72a10000,
313 OPC_VINSGR2VR_B = 0x72eb8000,
314 OPC_VINSGR2VR_H = 0x72ebc000,
315 OPC_VINSGR2VR_W = 0x72ebe000,
316 OPC_VINSGR2VR_D = 0x72ebf000,
317 OPC_VPICKVE2GR_B = 0x72ef8000,
318 OPC_VPICKVE2GR_H = 0x72efc000,
319 OPC_VPICKVE2GR_W = 0x72efe000,
320 OPC_VPICKVE2GR_D = 0x72eff000,
321 OPC_VPICKVE2GR_BU = 0x72f38000,
322 OPC_VPICKVE2GR_HU = 0x72f3c000,
323 OPC_VPICKVE2GR_WU = 0x72f3e000,
324 OPC_VPICKVE2GR_DU = 0x72f3f000,
325 OPC_VREPLVEI_B = 0x72f78000,
326 OPC_VREPLVEI_H = 0x72f7c000,
327 OPC_VREPLVEI_W = 0x72f7e000,
328 OPC_VREPLVEI_D = 0x72f7f000,
329 OPC_VBITCLRI_B = 0x73102000,
330 OPC_VBITCLRI_H = 0x73104000,
331 OPC_VBITCLRI_W = 0x73108000,
332 OPC_VBITCLRI_D = 0x73110000,
333 OPC_VBITSETI_B = 0x73142000,
334 OPC_VBITSETI_H = 0x73144000,
335 OPC_VBITSETI_W = 0x73148000,
336 OPC_VBITSETI_D = 0x73150000,
337 OPC_VBITREVI_B = 0x73182000,
338 OPC_VBITREVI_H = 0x73184000,
339 OPC_VBITREVI_W = 0x73188000,
340 OPC_VBITREVI_D = 0x73190000,
341 OPC_VSLLI_B = 0x732c2000,
342 OPC_VSLLI_H = 0x732c4000,
343 OPC_VSLLI_W = 0x732c8000,
344 OPC_VSLLI_D = 0x732d0000,
345 OPC_VSRLI_B = 0x73302000,
346 OPC_VSRLI_H = 0x73304000,
347 OPC_VSRLI_W = 0x73308000,
348 OPC_VSRLI_D = 0x73310000,
349 OPC_VSRAI_B = 0x73342000,
350 OPC_VSRAI_H = 0x73344000,
351 OPC_VSRAI_W = 0x73348000,
352 OPC_VSRAI_D = 0x73350000,
353 OPC_VBITSELI_B = 0x73c40000,
354 OPC_VANDI_B = 0x73d00000,
355 OPC_VORI_B = 0x73d40000,
356 OPC_VXORI_B = 0x73d80000,
357 OPC_VNORI_B = 0x73dc0000,
358 OPC_VLDI = 0x73e00000,
359 OPC_XVSEQ_B = 0x74000000,
360 OPC_XVSEQ_H = 0x74008000,
361 OPC_XVSEQ_W = 0x74010000,
362 OPC_XVSEQ_D = 0x74018000,
363 OPC_XVSLE_B = 0x74020000,
364 OPC_XVSLE_H = 0x74028000,
365 OPC_XVSLE_W = 0x74030000,
366 OPC_XVSLE_D = 0x74038000,
367 OPC_XVSLE_BU = 0x74040000,
368 OPC_XVSLE_HU = 0x74048000,
369 OPC_XVSLE_WU = 0x74050000,
370 OPC_XVSLE_DU = 0x74058000,
371 OPC_XVSLT_B = 0x74060000,
372 OPC_XVSLT_H = 0x74068000,
373 OPC_XVSLT_W = 0x74070000,
374 OPC_XVSLT_D = 0x74078000,
375 OPC_XVSLT_BU = 0x74080000,
376 OPC_XVSLT_HU = 0x74088000,
377 OPC_XVSLT_WU = 0x74090000,
378 OPC_XVSLT_DU = 0x74098000,
379 OPC_XVADD_B = 0x740a0000,
380 OPC_XVADD_H = 0x740a8000,
381 OPC_XVADD_W = 0x740b0000,
382 OPC_XVADD_D = 0x740b8000,
383 OPC_XVSUB_B = 0x740c0000,
384 OPC_XVSUB_H = 0x740c8000,
385 OPC_XVSUB_W = 0x740d0000,
386 OPC_XVSUB_D = 0x740d8000,
387 OPC_XVSADD_B = 0x74460000,
388 OPC_XVSADD_H = 0x74468000,
389 OPC_XVSADD_W = 0x74470000,
390 OPC_XVSADD_D = 0x74478000,
391 OPC_XVSSUB_B = 0x74480000,
392 OPC_XVSSUB_H = 0x74488000,
393 OPC_XVSSUB_W = 0x74490000,
394 OPC_XVSSUB_D = 0x74498000,
395 OPC_XVSADD_BU = 0x744a0000,
396 OPC_XVSADD_HU = 0x744a8000,
397 OPC_XVSADD_WU = 0x744b0000,
398 OPC_XVSADD_DU = 0x744b8000,
399 OPC_XVSSUB_BU = 0x744c0000,
400 OPC_XVSSUB_HU = 0x744c8000,
401 OPC_XVSSUB_WU = 0x744d0000,
402 OPC_XVSSUB_DU = 0x744d8000,
403 OPC_XVMAX_B = 0x74700000,
404 OPC_XVMAX_H = 0x74708000,
405 OPC_XVMAX_W = 0x74710000,
406 OPC_XVMAX_D = 0x74718000,
407 OPC_XVMIN_B = 0x74720000,
408 OPC_XVMIN_H = 0x74728000,
409 OPC_XVMIN_W = 0x74730000,
410 OPC_XVMIN_D = 0x74738000,
411 OPC_XVMAX_BU = 0x74740000,
412 OPC_XVMAX_HU = 0x74748000,
413 OPC_XVMAX_WU = 0x74750000,
414 OPC_XVMAX_DU = 0x74758000,
415 OPC_XVMIN_BU = 0x74760000,
416 OPC_XVMIN_HU = 0x74768000,
417 OPC_XVMIN_WU = 0x74770000,
418 OPC_XVMIN_DU = 0x74778000,
419 OPC_XVMUL_B = 0x74840000,
420 OPC_XVMUL_H = 0x74848000,
421 OPC_XVMUL_W = 0x74850000,
422 OPC_XVMUL_D = 0x74858000,
423 OPC_XVSLL_B = 0x74e80000,
424 OPC_XVSLL_H = 0x74e88000,
425 OPC_XVSLL_W = 0x74e90000,
426 OPC_XVSLL_D = 0x74e98000,
427 OPC_XVSRL_B = 0x74ea0000,
428 OPC_XVSRL_H = 0x74ea8000,
429 OPC_XVSRL_W = 0x74eb0000,
430 OPC_XVSRL_D = 0x74eb8000,
431 OPC_XVSRA_B = 0x74ec0000,
432 OPC_XVSRA_H = 0x74ec8000,
433 OPC_XVSRA_W = 0x74ed0000,
434 OPC_XVSRA_D = 0x74ed8000,
435 OPC_XVROTR_B = 0x74ee0000,
436 OPC_XVROTR_H = 0x74ee8000,
437 OPC_XVROTR_W = 0x74ef0000,
438 OPC_XVROTR_D = 0x74ef8000,
439 OPC_XVREPLVE_B = 0x75220000,
440 OPC_XVREPLVE_H = 0x75228000,
441 OPC_XVREPLVE_W = 0x75230000,
442 OPC_XVREPLVE_D = 0x75238000,
443 OPC_XVAND_V = 0x75260000,
444 OPC_XVOR_V = 0x75268000,
445 OPC_XVXOR_V = 0x75270000,
446 OPC_XVNOR_V = 0x75278000,
447 OPC_XVANDN_V = 0x75280000,
448 OPC_XVORN_V = 0x75288000,
449 OPC_XVSEQI_B = 0x76800000,
450 OPC_XVSEQI_H = 0x76808000,
451 OPC_XVSEQI_W = 0x76810000,
452 OPC_XVSEQI_D = 0x76818000,
453 OPC_XVSLEI_B = 0x76820000,
454 OPC_XVSLEI_H = 0x76828000,
455 OPC_XVSLEI_W = 0x76830000,
456 OPC_XVSLEI_D = 0x76838000,
457 OPC_XVSLEI_BU = 0x76840000,
458 OPC_XVSLEI_HU = 0x76848000,
459 OPC_XVSLEI_WU = 0x76850000,
460 OPC_XVSLEI_DU = 0x76858000,
461 OPC_XVSLTI_B = 0x76860000,
462 OPC_XVSLTI_H = 0x76868000,
463 OPC_XVSLTI_W = 0x76870000,
464 OPC_XVSLTI_D = 0x76878000,
465 OPC_XVSLTI_BU = 0x76880000,
466 OPC_XVSLTI_HU = 0x76888000,
467 OPC_XVSLTI_WU = 0x76890000,
468 OPC_XVSLTI_DU = 0x76898000,
469 OPC_XVADDI_BU = 0x768a0000,
470 OPC_XVADDI_HU = 0x768a8000,
471 OPC_XVADDI_WU = 0x768b0000,
472 OPC_XVADDI_DU = 0x768b8000,
473 OPC_XVSUBI_BU = 0x768c0000,
474 OPC_XVSUBI_HU = 0x768c8000,
475 OPC_XVSUBI_WU = 0x768d0000,
476 OPC_XVSUBI_DU = 0x768d8000,
477 OPC_XVMAXI_B = 0x76900000,
478 OPC_XVMAXI_H = 0x76908000,
479 OPC_XVMAXI_W = 0x76910000,
480 OPC_XVMAXI_D = 0x76918000,
481 OPC_XVMINI_B = 0x76920000,
482 OPC_XVMINI_H = 0x76928000,
483 OPC_XVMINI_W = 0x76930000,
484 OPC_XVMINI_D = 0x76938000,
485 OPC_XVMAXI_BU = 0x76940000,
486 OPC_XVMAXI_HU = 0x76948000,
487 OPC_XVMAXI_WU = 0x76950000,
488 OPC_XVMAXI_DU = 0x76958000,
489 OPC_XVMINI_BU = 0x76960000,
490 OPC_XVMINI_HU = 0x76968000,
491 OPC_XVMINI_WU = 0x76970000,
492 OPC_XVMINI_DU = 0x76978000,
493 OPC_XVNEG_B = 0x769c3000,
494 OPC_XVNEG_H = 0x769c3400,
495 OPC_XVNEG_W = 0x769c3800,
496 OPC_XVNEG_D = 0x769c3c00,
497 OPC_XVREPLGR2VR_B = 0x769f0000,
498 OPC_XVREPLGR2VR_H = 0x769f0400,
499 OPC_XVREPLGR2VR_W = 0x769f0800,
500 OPC_XVREPLGR2VR_D = 0x769f0c00,
501 OPC_XVROTRI_B = 0x76a02000,
502 OPC_XVROTRI_H = 0x76a04000,
503 OPC_XVROTRI_W = 0x76a08000,
504 OPC_XVROTRI_D = 0x76a10000,
505 OPC_XVINSGR2VR_W = 0x76ebc000,
506 OPC_XVINSGR2VR_D = 0x76ebe000,
507 OPC_XVPICKVE2GR_W = 0x76efc000,
508 OPC_XVPICKVE2GR_D = 0x76efe000,
509 OPC_XVPICKVE2GR_WU = 0x76f3c000,
510 OPC_XVPICKVE2GR_DU = 0x76f3e000,
511 OPC_XVREPL128VEI_B = 0x76f78000,
512 OPC_XVREPL128VEI_H = 0x76f7c000,
513 OPC_XVREPL128VEI_W = 0x76f7e000,
514 OPC_XVREPL128VEI_D = 0x76f7f000,
515 OPC_XVREPLVE0_B = 0x77070000,
516 OPC_XVREPLVE0_H = 0x77078000,
517 OPC_XVREPLVE0_W = 0x7707c000,
518 OPC_XVREPLVE0_D = 0x7707e000,
519 OPC_XVREPLVE0_Q = 0x7707f000,
520 OPC_XVBITCLRI_B = 0x77102000,
521 OPC_XVBITCLRI_H = 0x77104000,
522 OPC_XVBITCLRI_W = 0x77108000,
523 OPC_XVBITCLRI_D = 0x77110000,
524 OPC_XVBITSETI_B = 0x77142000,
525 OPC_XVBITSETI_H = 0x77144000,
526 OPC_XVBITSETI_W = 0x77148000,
527 OPC_XVBITSETI_D = 0x77150000,
528 OPC_XVBITREVI_B = 0x77182000,
529 OPC_XVBITREVI_H = 0x77184000,
530 OPC_XVBITREVI_W = 0x77188000,
531 OPC_XVBITREVI_D = 0x77190000,
532 OPC_XVSLLI_B = 0x772c2000,
533 OPC_XVSLLI_H = 0x772c4000,
534 OPC_XVSLLI_W = 0x772c8000,
535 OPC_XVSLLI_D = 0x772d0000,
536 OPC_XVSRLI_B = 0x77302000,
537 OPC_XVSRLI_H = 0x77304000,
538 OPC_XVSRLI_W = 0x77308000,
539 OPC_XVSRLI_D = 0x77310000,
540 OPC_XVSRAI_B = 0x77342000,
541 OPC_XVSRAI_H = 0x77344000,
542 OPC_XVSRAI_W = 0x77348000,
543 OPC_XVSRAI_D = 0x77350000,
544 OPC_XVBITSELI_B = 0x77c40000,
545 OPC_XVANDI_B = 0x77d00000,
546 OPC_XVORI_B = 0x77d40000,
547 OPC_XVXORI_B = 0x77d80000,
548 OPC_XVNORI_B = 0x77dc0000,
549 OPC_XVLDI = 0x77e00000,
550 } LoongArchInsn;
551
552 static int32_t __attribute__((unused)) encode_d_slot(LoongArchInsn opc,
553 uint32_t d)
554 {
555 return opc | d;
556 }
557
558 static int32_t __attribute__((unused)) encode_dj_slots(LoongArchInsn opc,
559 uint32_t d, uint32_t j)
560 {
561 return opc | d | j << 5;
562 }
563
564 static int32_t __attribute__((unused))
565 encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k)
566 {
567 return opc | d | j << 5 | k << 10;
568 }
569
570 static int32_t __attribute__((unused)) encode_djka_slots(LoongArchInsn opc,
571 uint32_t d, uint32_t j,
572 uint32_t k, uint32_t a)
573 {
574 return opc | d | j << 5 | k << 10 | a << 15;
575 }
576
577 static int32_t __attribute__((unused)) encode_djkm_slots(LoongArchInsn opc,
578 uint32_t d, uint32_t j,
579 uint32_t k, uint32_t m)
580 {
581 return opc | d | j << 5 | k << 10 | m << 16;
582 }
583
584 static int32_t __attribute__((unused)) encode_djkn_slots(LoongArchInsn opc,
585 uint32_t d, uint32_t j,
586 uint32_t k, uint32_t n)
587 {
588 return opc | d | j << 5 | k << 10 | n << 18;
589 }
590
591 static int32_t __attribute__((unused)) encode_dk_slots(LoongArchInsn opc,
592 uint32_t d, uint32_t k)
593 {
594 return opc | d | k << 10;
595 }
596
597 static int32_t __attribute__((unused)) encode_dfj_insn(LoongArchInsn opc,
598 TCGReg d, TCGReg fj)
599 {
600 tcg_debug_assert(d >= 0 && d <= 0x1f);
601 tcg_debug_assert(fj >= 0x20 && fj <= 0x3f);
602 return encode_dj_slots(opc, d, fj & 0x1f);
603 }
604
605 static int32_t __attribute__((unused)) encode_dj_insn(LoongArchInsn opc,
606 TCGReg d, TCGReg j)
607 {
608 tcg_debug_assert(d >= 0 && d <= 0x1f);
609 tcg_debug_assert(j >= 0 && j <= 0x1f);
610 return encode_dj_slots(opc, d, j);
611 }
612
613 static int32_t __attribute__((unused))
614 encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k)
615 {
616 tcg_debug_assert(d >= 0 && d <= 0x1f);
617 tcg_debug_assert(j >= 0 && j <= 0x1f);
618 tcg_debug_assert(k >= 0 && k <= 0x1f);
619 return encode_djk_slots(opc, d, j, k);
620 }
621
622 static int32_t __attribute__((unused))
623 encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk12)
624 {
625 tcg_debug_assert(d >= 0 && d <= 0x1f);
626 tcg_debug_assert(j >= 0 && j <= 0x1f);
627 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
628 return encode_djk_slots(opc, d, j, sk12 & 0xfff);
629 }
630
631 static int32_t __attribute__((unused))
632 encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk16)
633 {
634 tcg_debug_assert(d >= 0 && d <= 0x1f);
635 tcg_debug_assert(j >= 0 && j <= 0x1f);
636 tcg_debug_assert(sk16 >= -0x8000 && sk16 <= 0x7fff);
637 return encode_djk_slots(opc, d, j, sk16 & 0xffff);
638 }
639
640 static int32_t __attribute__((unused))
641 encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk12)
642 {
643 tcg_debug_assert(d >= 0 && d <= 0x1f);
644 tcg_debug_assert(j >= 0 && j <= 0x1f);
645 tcg_debug_assert(uk12 <= 0xfff);
646 return encode_djk_slots(opc, d, j, uk12);
647 }
648
649 static int32_t __attribute__((unused))
650 encode_djuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk3)
651 {
652 tcg_debug_assert(d >= 0 && d <= 0x1f);
653 tcg_debug_assert(j >= 0 && j <= 0x1f);
654 tcg_debug_assert(uk3 <= 0x7);
655 return encode_djk_slots(opc, d, j, uk3);
656 }
657
658 static int32_t __attribute__((unused))
659 encode_djuk4_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk4)
660 {
661 tcg_debug_assert(d >= 0 && d <= 0x1f);
662 tcg_debug_assert(j >= 0 && j <= 0x1f);
663 tcg_debug_assert(uk4 <= 0xf);
664 return encode_djk_slots(opc, d, j, uk4);
665 }
666
667 static int32_t __attribute__((unused))
668 encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5)
669 {
670 tcg_debug_assert(d >= 0 && d <= 0x1f);
671 tcg_debug_assert(j >= 0 && j <= 0x1f);
672 tcg_debug_assert(uk5 <= 0x1f);
673 return encode_djk_slots(opc, d, j, uk5);
674 }
675
676 static int32_t __attribute__((unused)) encode_djuk5um5_insn(LoongArchInsn opc,
677 TCGReg d, TCGReg j,
678 uint32_t uk5,
679 uint32_t um5)
680 {
681 tcg_debug_assert(d >= 0 && d <= 0x1f);
682 tcg_debug_assert(j >= 0 && j <= 0x1f);
683 tcg_debug_assert(uk5 <= 0x1f);
684 tcg_debug_assert(um5 <= 0x1f);
685 return encode_djkm_slots(opc, d, j, uk5, um5);
686 }
687
688 static int32_t __attribute__((unused))
689 encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6)
690 {
691 tcg_debug_assert(d >= 0 && d <= 0x1f);
692 tcg_debug_assert(j >= 0 && j <= 0x1f);
693 tcg_debug_assert(uk6 <= 0x3f);
694 return encode_djk_slots(opc, d, j, uk6);
695 }
696
697 static int32_t __attribute__((unused)) encode_djuk6um6_insn(LoongArchInsn opc,
698 TCGReg d, TCGReg j,
699 uint32_t uk6,
700 uint32_t um6)
701 {
702 tcg_debug_assert(d >= 0 && d <= 0x1f);
703 tcg_debug_assert(j >= 0 && j <= 0x1f);
704 tcg_debug_assert(uk6 <= 0x3f);
705 tcg_debug_assert(um6 <= 0x3f);
706 return encode_djkm_slots(opc, d, j, uk6, um6);
707 }
708
709 static int32_t __attribute__((unused)) encode_dsj20_insn(LoongArchInsn opc,
710 TCGReg d, int32_t sj20)
711 {
712 tcg_debug_assert(d >= 0 && d <= 0x1f);
713 tcg_debug_assert(sj20 >= -0x80000 && sj20 <= 0x7ffff);
714 return encode_dj_slots(opc, d, sj20 & 0xfffff);
715 }
716
717 static int32_t __attribute__((unused)) encode_dtj_insn(LoongArchInsn opc,
718 TCGReg d, TCGReg tj)
719 {
720 tcg_debug_assert(d >= 0 && d <= 0x1f);
721 tcg_debug_assert(tj >= 0 && tj <= 0x3);
722 return encode_dj_slots(opc, d, tj);
723 }
724
725 static int32_t __attribute__((unused))
726 encode_dvjuk1_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk1)
727 {
728 tcg_debug_assert(d >= 0 && d <= 0x1f);
729 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
730 tcg_debug_assert(uk1 <= 0x1);
731 return encode_djk_slots(opc, d, vj & 0x1f, uk1);
732 }
733
734 static int32_t __attribute__((unused))
735 encode_dvjuk2_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk2)
736 {
737 tcg_debug_assert(d >= 0 && d <= 0x1f);
738 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
739 tcg_debug_assert(uk2 <= 0x3);
740 return encode_djk_slots(opc, d, vj & 0x1f, uk2);
741 }
742
743 static int32_t __attribute__((unused))
744 encode_dvjuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk3)
745 {
746 tcg_debug_assert(d >= 0 && d <= 0x1f);
747 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
748 tcg_debug_assert(uk3 <= 0x7);
749 return encode_djk_slots(opc, d, vj & 0x1f, uk3);
750 }
751
752 static int32_t __attribute__((unused))
753 encode_dvjuk4_insn(LoongArchInsn opc, TCGReg d, TCGReg vj, uint32_t uk4)
754 {
755 tcg_debug_assert(d >= 0 && d <= 0x1f);
756 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
757 tcg_debug_assert(uk4 <= 0xf);
758 return encode_djk_slots(opc, d, vj & 0x1f, uk4);
759 }
760
761 static int32_t __attribute__((unused))
762 encode_dxjuk2_insn(LoongArchInsn opc, TCGReg d, TCGReg xj, uint32_t uk2)
763 {
764 tcg_debug_assert(d >= 0 && d <= 0x1f);
765 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
766 tcg_debug_assert(uk2 <= 0x3);
767 return encode_djk_slots(opc, d, xj & 0x1f, uk2);
768 }
769
770 static int32_t __attribute__((unused))
771 encode_dxjuk3_insn(LoongArchInsn opc, TCGReg d, TCGReg xj, uint32_t uk3)
772 {
773 tcg_debug_assert(d >= 0 && d <= 0x1f);
774 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
775 tcg_debug_assert(uk3 <= 0x7);
776 return encode_djk_slots(opc, d, xj & 0x1f, uk3);
777 }
778
779 static int32_t __attribute__((unused)) encode_fdfj_insn(LoongArchInsn opc,
780 TCGReg fd, TCGReg fj)
781 {
782 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f);
783 tcg_debug_assert(fj >= 0x20 && fj <= 0x3f);
784 return encode_dj_slots(opc, fd & 0x1f, fj & 0x1f);
785 }
786
787 static int32_t __attribute__((unused)) encode_fdj_insn(LoongArchInsn opc,
788 TCGReg fd, TCGReg j)
789 {
790 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f);
791 tcg_debug_assert(j >= 0 && j <= 0x1f);
792 return encode_dj_slots(opc, fd & 0x1f, j);
793 }
794
795 static int32_t __attribute__((unused))
796 encode_fdjk_insn(LoongArchInsn opc, TCGReg fd, TCGReg j, TCGReg k)
797 {
798 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f);
799 tcg_debug_assert(j >= 0 && j <= 0x1f);
800 tcg_debug_assert(k >= 0 && k <= 0x1f);
801 return encode_djk_slots(opc, fd & 0x1f, j, k);
802 }
803
804 static int32_t __attribute__((unused))
805 encode_fdjsk12_insn(LoongArchInsn opc, TCGReg fd, TCGReg j, int32_t sk12)
806 {
807 tcg_debug_assert(fd >= 0x20 && fd <= 0x3f);
808 tcg_debug_assert(j >= 0 && j <= 0x1f);
809 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
810 return encode_djk_slots(opc, fd & 0x1f, j, sk12 & 0xfff);
811 }
812
813 static int32_t __attribute__((unused)) encode_sd10k16_insn(LoongArchInsn opc,
814 int32_t sd10k16)
815 {
816 tcg_debug_assert(sd10k16 >= -0x2000000 && sd10k16 <= 0x1ffffff);
817 return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff);
818 }
819
820 static int32_t __attribute__((unused)) encode_sd5k16_insn(LoongArchInsn opc,
821 int32_t sd5k16)
822 {
823 tcg_debug_assert(sd5k16 >= -0x100000 && sd5k16 <= 0xfffff);
824 return encode_dk_slots(opc, (sd5k16 >> 16) & 0x1f, sd5k16 & 0xffff);
825 }
826
827 static int32_t __attribute__((unused)) encode_tdj_insn(LoongArchInsn opc,
828 TCGReg td, TCGReg j)
829 {
830 tcg_debug_assert(td >= 0 && td <= 0x3);
831 tcg_debug_assert(j >= 0 && j <= 0x1f);
832 return encode_dj_slots(opc, td, j);
833 }
834
835 static int32_t __attribute__((unused)) encode_ud15_insn(LoongArchInsn opc,
836 uint32_t ud15)
837 {
838 tcg_debug_assert(ud15 <= 0x7fff);
839 return encode_d_slot(opc, ud15);
840 }
841
842 static int32_t __attribute__((unused)) encode_vdj_insn(LoongArchInsn opc,
843 TCGReg vd, TCGReg j)
844 {
845 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
846 tcg_debug_assert(j >= 0 && j <= 0x1f);
847 return encode_dj_slots(opc, vd & 0x1f, j);
848 }
849
850 static int32_t __attribute__((unused))
851 encode_vdjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, TCGReg k)
852 {
853 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
854 tcg_debug_assert(j >= 0 && j <= 0x1f);
855 tcg_debug_assert(k >= 0 && k <= 0x1f);
856 return encode_djk_slots(opc, vd & 0x1f, j, k);
857 }
858
859 static int32_t __attribute__((unused))
860 encode_vdjsk10_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk10)
861 {
862 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
863 tcg_debug_assert(j >= 0 && j <= 0x1f);
864 tcg_debug_assert(sk10 >= -0x200 && sk10 <= 0x1ff);
865 return encode_djk_slots(opc, vd & 0x1f, j, sk10 & 0x3ff);
866 }
867
868 static int32_t __attribute__((unused))
869 encode_vdjsk11_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk11)
870 {
871 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
872 tcg_debug_assert(j >= 0 && j <= 0x1f);
873 tcg_debug_assert(sk11 >= -0x400 && sk11 <= 0x3ff);
874 return encode_djk_slots(opc, vd & 0x1f, j, sk11 & 0x7ff);
875 }
876
877 static int32_t __attribute__((unused))
878 encode_vdjsk12_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk12)
879 {
880 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
881 tcg_debug_assert(j >= 0 && j <= 0x1f);
882 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
883 return encode_djk_slots(opc, vd & 0x1f, j, sk12 & 0xfff);
884 }
885
886 static int32_t __attribute__((unused))
887 encode_vdjsk8un1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
888 uint32_t un1)
889 {
890 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
891 tcg_debug_assert(j >= 0 && j <= 0x1f);
892 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
893 tcg_debug_assert(un1 <= 0x1);
894 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un1);
895 }
896
897 static int32_t __attribute__((unused))
898 encode_vdjsk8un2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
899 uint32_t un2)
900 {
901 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
902 tcg_debug_assert(j >= 0 && j <= 0x1f);
903 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
904 tcg_debug_assert(un2 <= 0x3);
905 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un2);
906 }
907
908 static int32_t __attribute__((unused))
909 encode_vdjsk8un3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
910 uint32_t un3)
911 {
912 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
913 tcg_debug_assert(j >= 0 && j <= 0x1f);
914 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
915 tcg_debug_assert(un3 <= 0x7);
916 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un3);
917 }
918
919 static int32_t __attribute__((unused))
920 encode_vdjsk8un4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk8,
921 uint32_t un4)
922 {
923 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
924 tcg_debug_assert(j >= 0 && j <= 0x1f);
925 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
926 tcg_debug_assert(un4 <= 0xf);
927 return encode_djkn_slots(opc, vd & 0x1f, j, sk8 & 0xff, un4);
928 }
929
930 static int32_t __attribute__((unused))
931 encode_vdjsk9_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, int32_t sk9)
932 {
933 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
934 tcg_debug_assert(j >= 0 && j <= 0x1f);
935 tcg_debug_assert(sk9 >= -0x100 && sk9 <= 0xff);
936 return encode_djk_slots(opc, vd & 0x1f, j, sk9 & 0x1ff);
937 }
938
939 static int32_t __attribute__((unused))
940 encode_vdjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk1)
941 {
942 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
943 tcg_debug_assert(j >= 0 && j <= 0x1f);
944 tcg_debug_assert(uk1 <= 0x1);
945 return encode_djk_slots(opc, vd & 0x1f, j, uk1);
946 }
947
948 static int32_t __attribute__((unused))
949 encode_vdjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk2)
950 {
951 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
952 tcg_debug_assert(j >= 0 && j <= 0x1f);
953 tcg_debug_assert(uk2 <= 0x3);
954 return encode_djk_slots(opc, vd & 0x1f, j, uk2);
955 }
956
957 static int32_t __attribute__((unused))
958 encode_vdjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk3)
959 {
960 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
961 tcg_debug_assert(j >= 0 && j <= 0x1f);
962 tcg_debug_assert(uk3 <= 0x7);
963 return encode_djk_slots(opc, vd & 0x1f, j, uk3);
964 }
965
966 static int32_t __attribute__((unused))
967 encode_vdjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg j, uint32_t uk4)
968 {
969 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
970 tcg_debug_assert(j >= 0 && j <= 0x1f);
971 tcg_debug_assert(uk4 <= 0xf);
972 return encode_djk_slots(opc, vd & 0x1f, j, uk4);
973 }
974
975 static int32_t __attribute__((unused))
976 encode_vdsj13_insn(LoongArchInsn opc, TCGReg vd, int32_t sj13)
977 {
978 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
979 tcg_debug_assert(sj13 >= -0x1000 && sj13 <= 0xfff);
980 return encode_dj_slots(opc, vd & 0x1f, sj13 & 0x1fff);
981 }
982
983 static int32_t __attribute__((unused)) encode_vdvj_insn(LoongArchInsn opc,
984 TCGReg vd, TCGReg vj)
985 {
986 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
987 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
988 return encode_dj_slots(opc, vd & 0x1f, vj & 0x1f);
989 }
990
991 static int32_t __attribute__((unused))
992 encode_vdvjk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg k)
993 {
994 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
995 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
996 tcg_debug_assert(k >= 0 && k <= 0x1f);
997 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, k);
998 }
999
1000 static int32_t __attribute__((unused))
1001 encode_vdvjsk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, int32_t sk5)
1002 {
1003 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1004 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1005 tcg_debug_assert(sk5 >= -0x10 && sk5 <= 0xf);
1006 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, sk5 & 0x1f);
1007 }
1008
1009 static int32_t __attribute__((unused))
1010 encode_vdvjuk1_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk1)
1011 {
1012 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1013 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1014 tcg_debug_assert(uk1 <= 0x1);
1015 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk1);
1016 }
1017
1018 static int32_t __attribute__((unused))
1019 encode_vdvjuk2_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk2)
1020 {
1021 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1022 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1023 tcg_debug_assert(uk2 <= 0x3);
1024 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk2);
1025 }
1026
1027 static int32_t __attribute__((unused))
1028 encode_vdvjuk3_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk3)
1029 {
1030 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1031 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1032 tcg_debug_assert(uk3 <= 0x7);
1033 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk3);
1034 }
1035
1036 static int32_t __attribute__((unused))
1037 encode_vdvjuk4_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk4)
1038 {
1039 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1040 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1041 tcg_debug_assert(uk4 <= 0xf);
1042 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk4);
1043 }
1044
1045 static int32_t __attribute__((unused))
1046 encode_vdvjuk5_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk5)
1047 {
1048 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1049 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1050 tcg_debug_assert(uk5 <= 0x1f);
1051 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk5);
1052 }
1053
1054 static int32_t __attribute__((unused))
1055 encode_vdvjuk6_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk6)
1056 {
1057 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1058 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1059 tcg_debug_assert(uk6 <= 0x3f);
1060 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk6);
1061 }
1062
1063 static int32_t __attribute__((unused))
1064 encode_vdvjuk8_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, uint32_t uk8)
1065 {
1066 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1067 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1068 tcg_debug_assert(uk8 <= 0xff);
1069 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, uk8);
1070 }
1071
1072 static int32_t __attribute__((unused))
1073 encode_vdvjvk_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk)
1074 {
1075 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1076 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1077 tcg_debug_assert(vk >= 0x20 && vk <= 0x3f);
1078 return encode_djk_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f);
1079 }
1080
1081 static int32_t __attribute__((unused))
1082 encode_vdvjvkva_insn(LoongArchInsn opc, TCGReg vd, TCGReg vj, TCGReg vk,
1083 TCGReg va)
1084 {
1085 tcg_debug_assert(vd >= 0x20 && vd <= 0x3f);
1086 tcg_debug_assert(vj >= 0x20 && vj <= 0x3f);
1087 tcg_debug_assert(vk >= 0x20 && vk <= 0x3f);
1088 tcg_debug_assert(va >= 0x20 && va <= 0x3f);
1089 return encode_djka_slots(opc, vd & 0x1f, vj & 0x1f, vk & 0x1f, va & 0x1f);
1090 }
1091
1092 static int32_t __attribute__((unused)) encode_xdj_insn(LoongArchInsn opc,
1093 TCGReg xd, TCGReg j)
1094 {
1095 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1096 tcg_debug_assert(j >= 0 && j <= 0x1f);
1097 return encode_dj_slots(opc, xd & 0x1f, j);
1098 }
1099
1100 static int32_t __attribute__((unused))
1101 encode_xdjk_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, TCGReg k)
1102 {
1103 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1104 tcg_debug_assert(j >= 0 && j <= 0x1f);
1105 tcg_debug_assert(k >= 0 && k <= 0x1f);
1106 return encode_djk_slots(opc, xd & 0x1f, j, k);
1107 }
1108
1109 static int32_t __attribute__((unused))
1110 encode_xdjsk10_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk10)
1111 {
1112 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1113 tcg_debug_assert(j >= 0 && j <= 0x1f);
1114 tcg_debug_assert(sk10 >= -0x200 && sk10 <= 0x1ff);
1115 return encode_djk_slots(opc, xd & 0x1f, j, sk10 & 0x3ff);
1116 }
1117
1118 static int32_t __attribute__((unused))
1119 encode_xdjsk11_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk11)
1120 {
1121 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1122 tcg_debug_assert(j >= 0 && j <= 0x1f);
1123 tcg_debug_assert(sk11 >= -0x400 && sk11 <= 0x3ff);
1124 return encode_djk_slots(opc, xd & 0x1f, j, sk11 & 0x7ff);
1125 }
1126
1127 static int32_t __attribute__((unused))
1128 encode_xdjsk12_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk12)
1129 {
1130 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1131 tcg_debug_assert(j >= 0 && j <= 0x1f);
1132 tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
1133 return encode_djk_slots(opc, xd & 0x1f, j, sk12 & 0xfff);
1134 }
1135
1136 static int32_t __attribute__((unused))
1137 encode_xdjsk8un2_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8,
1138 uint32_t un2)
1139 {
1140 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1141 tcg_debug_assert(j >= 0 && j <= 0x1f);
1142 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1143 tcg_debug_assert(un2 <= 0x3);
1144 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un2);
1145 }
1146
1147 static int32_t __attribute__((unused))
1148 encode_xdjsk8un3_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8,
1149 uint32_t un3)
1150 {
1151 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1152 tcg_debug_assert(j >= 0 && j <= 0x1f);
1153 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1154 tcg_debug_assert(un3 <= 0x7);
1155 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un3);
1156 }
1157
1158 static int32_t __attribute__((unused))
1159 encode_xdjsk8un4_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8,
1160 uint32_t un4)
1161 {
1162 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1163 tcg_debug_assert(j >= 0 && j <= 0x1f);
1164 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1165 tcg_debug_assert(un4 <= 0xf);
1166 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un4);
1167 }
1168
1169 static int32_t __attribute__((unused))
1170 encode_xdjsk8un5_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk8,
1171 uint32_t un5)
1172 {
1173 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1174 tcg_debug_assert(j >= 0 && j <= 0x1f);
1175 tcg_debug_assert(sk8 >= -0x80 && sk8 <= 0x7f);
1176 tcg_debug_assert(un5 <= 0x1f);
1177 return encode_djkn_slots(opc, xd & 0x1f, j, sk8 & 0xff, un5);
1178 }
1179
1180 static int32_t __attribute__((unused))
1181 encode_xdjsk9_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, int32_t sk9)
1182 {
1183 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1184 tcg_debug_assert(j >= 0 && j <= 0x1f);
1185 tcg_debug_assert(sk9 >= -0x100 && sk9 <= 0xff);
1186 return encode_djk_slots(opc, xd & 0x1f, j, sk9 & 0x1ff);
1187 }
1188
1189 static int32_t __attribute__((unused))
1190 encode_xdjuk2_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, uint32_t uk2)
1191 {
1192 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1193 tcg_debug_assert(j >= 0 && j <= 0x1f);
1194 tcg_debug_assert(uk2 <= 0x3);
1195 return encode_djk_slots(opc, xd & 0x1f, j, uk2);
1196 }
1197
1198 static int32_t __attribute__((unused))
1199 encode_xdjuk3_insn(LoongArchInsn opc, TCGReg xd, TCGReg j, uint32_t uk3)
1200 {
1201 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1202 tcg_debug_assert(j >= 0 && j <= 0x1f);
1203 tcg_debug_assert(uk3 <= 0x7);
1204 return encode_djk_slots(opc, xd & 0x1f, j, uk3);
1205 }
1206
1207 static int32_t __attribute__((unused))
1208 encode_xdsj13_insn(LoongArchInsn opc, TCGReg xd, int32_t sj13)
1209 {
1210 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1211 tcg_debug_assert(sj13 >= -0x1000 && sj13 <= 0xfff);
1212 return encode_dj_slots(opc, xd & 0x1f, sj13 & 0x1fff);
1213 }
1214
1215 static int32_t __attribute__((unused)) encode_xdxj_insn(LoongArchInsn opc,
1216 TCGReg xd, TCGReg xj)
1217 {
1218 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1219 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1220 return encode_dj_slots(opc, xd & 0x1f, xj & 0x1f);
1221 }
1222
1223 static int32_t __attribute__((unused))
1224 encode_xdxjk_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg k)
1225 {
1226 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1227 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1228 tcg_debug_assert(k >= 0 && k <= 0x1f);
1229 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, k);
1230 }
1231
1232 static int32_t __attribute__((unused))
1233 encode_xdxjsk5_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, int32_t sk5)
1234 {
1235 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1236 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1237 tcg_debug_assert(sk5 >= -0x10 && sk5 <= 0xf);
1238 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, sk5 & 0x1f);
1239 }
1240
1241 static int32_t __attribute__((unused))
1242 encode_xdxjuk1_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk1)
1243 {
1244 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1245 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1246 tcg_debug_assert(uk1 <= 0x1);
1247 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk1);
1248 }
1249
1250 static int32_t __attribute__((unused))
1251 encode_xdxjuk2_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk2)
1252 {
1253 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1254 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1255 tcg_debug_assert(uk2 <= 0x3);
1256 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk2);
1257 }
1258
1259 static int32_t __attribute__((unused))
1260 encode_xdxjuk3_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk3)
1261 {
1262 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1263 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1264 tcg_debug_assert(uk3 <= 0x7);
1265 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk3);
1266 }
1267
1268 static int32_t __attribute__((unused))
1269 encode_xdxjuk4_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk4)
1270 {
1271 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1272 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1273 tcg_debug_assert(uk4 <= 0xf);
1274 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk4);
1275 }
1276
1277 static int32_t __attribute__((unused))
1278 encode_xdxjuk5_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk5)
1279 {
1280 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1281 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1282 tcg_debug_assert(uk5 <= 0x1f);
1283 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk5);
1284 }
1285
1286 static int32_t __attribute__((unused))
1287 encode_xdxjuk6_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk6)
1288 {
1289 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1290 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1291 tcg_debug_assert(uk6 <= 0x3f);
1292 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk6);
1293 }
1294
1295 static int32_t __attribute__((unused))
1296 encode_xdxjuk8_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, uint32_t uk8)
1297 {
1298 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1299 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1300 tcg_debug_assert(uk8 <= 0xff);
1301 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, uk8);
1302 }
1303
1304 static int32_t __attribute__((unused))
1305 encode_xdxjxk_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg xk)
1306 {
1307 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1308 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1309 tcg_debug_assert(xk >= 0x20 && xk <= 0x3f);
1310 return encode_djk_slots(opc, xd & 0x1f, xj & 0x1f, xk & 0x1f);
1311 }
1312
1313 static int32_t __attribute__((unused))
1314 encode_xdxjxkxa_insn(LoongArchInsn opc, TCGReg xd, TCGReg xj, TCGReg xk,
1315 TCGReg xa)
1316 {
1317 tcg_debug_assert(xd >= 0x20 && xd <= 0x3f);
1318 tcg_debug_assert(xj >= 0x20 && xj <= 0x3f);
1319 tcg_debug_assert(xk >= 0x20 && xk <= 0x3f);
1320 tcg_debug_assert(xa >= 0x20 && xa <= 0x3f);
1321 return encode_djka_slots(opc, xd & 0x1f, xj & 0x1f, xk & 0x1f, xa & 0x1f);
1322 }
1323
1324 /* Emits the `movgr2scr td, j` instruction. */
1325 static void __attribute__((unused)) tcg_out_opc_movgr2scr(TCGContext *s,
1326 TCGReg td, TCGReg j)
1327 {
1328 tcg_out32(s, encode_tdj_insn(OPC_MOVGR2SCR, td, j));
1329 }
1330
1331 /* Emits the `movscr2gr d, tj` instruction. */
1332 static void __attribute__((unused)) tcg_out_opc_movscr2gr(TCGContext *s,
1333 TCGReg d, TCGReg tj)
1334 {
1335 tcg_out32(s, encode_dtj_insn(OPC_MOVSCR2GR, d, tj));
1336 }
1337
1338 /* Emits the `clz.w d, j` instruction. */
1339 static void __attribute__((unused)) tcg_out_opc_clz_w(TCGContext *s, TCGReg d,
1340 TCGReg j)
1341 {
1342 tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j));
1343 }
1344
1345 /* Emits the `ctz.w d, j` instruction. */
1346 static void __attribute__((unused)) tcg_out_opc_ctz_w(TCGContext *s, TCGReg d,
1347 TCGReg j)
1348 {
1349 tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j));
1350 }
1351
1352 /* Emits the `clz.d d, j` instruction. */
1353 static void __attribute__((unused)) tcg_out_opc_clz_d(TCGContext *s, TCGReg d,
1354 TCGReg j)
1355 {
1356 tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j));
1357 }
1358
1359 /* Emits the `ctz.d d, j` instruction. */
1360 static void __attribute__((unused)) tcg_out_opc_ctz_d(TCGContext *s, TCGReg d,
1361 TCGReg j)
1362 {
1363 tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j));
1364 }
1365
1366 /* Emits the `revb.2h d, j` instruction. */
1367 static void __attribute__((unused)) tcg_out_opc_revb_2h(TCGContext *s, TCGReg d,
1368 TCGReg j)
1369 {
1370 tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j));
1371 }
1372
1373 /* Emits the `revb.2w d, j` instruction. */
1374 static void __attribute__((unused)) tcg_out_opc_revb_2w(TCGContext *s, TCGReg d,
1375 TCGReg j)
1376 {
1377 tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j));
1378 }
1379
1380 /* Emits the `revb.d d, j` instruction. */
1381 static void __attribute__((unused)) tcg_out_opc_revb_d(TCGContext *s, TCGReg d,
1382 TCGReg j)
1383 {
1384 tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j));
1385 }
1386
1387 /* Emits the `revbit.4b d, j` instruction. */
1388 static void __attribute__((unused)) tcg_out_opc_revbit_4b(TCGContext *s,
1389 TCGReg d, TCGReg j)
1390 {
1391 tcg_out32(s, encode_dj_insn(OPC_REVBIT_4B, d, j));
1392 }
1393
1394 /* Emits the `revbit.8b d, j` instruction. */
1395 static void __attribute__((unused)) tcg_out_opc_revbit_8b(TCGContext *s,
1396 TCGReg d, TCGReg j)
1397 {
1398 tcg_out32(s, encode_dj_insn(OPC_REVBIT_8B, d, j));
1399 }
1400
1401 /* Emits the `revbit.w d, j` instruction. */
1402 static void __attribute__((unused)) tcg_out_opc_revbit_w(TCGContext *s,
1403 TCGReg d, TCGReg j)
1404 {
1405 tcg_out32(s, encode_dj_insn(OPC_REVBIT_W, d, j));
1406 }
1407
1408 /* Emits the `revbit.d d, j` instruction. */
1409 static void __attribute__((unused)) tcg_out_opc_revbit_d(TCGContext *s,
1410 TCGReg d, TCGReg j)
1411 {
1412 tcg_out32(s, encode_dj_insn(OPC_REVBIT_D, d, j));
1413 }
1414
1415 /* Emits the `sext.h d, j` instruction. */
1416 static void __attribute__((unused)) tcg_out_opc_sext_h(TCGContext *s, TCGReg d,
1417 TCGReg j)
1418 {
1419 tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j));
1420 }
1421
1422 /* Emits the `sext.b d, j` instruction. */
1423 static void __attribute__((unused)) tcg_out_opc_sext_b(TCGContext *s, TCGReg d,
1424 TCGReg j)
1425 {
1426 tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j));
1427 }
1428
1429 /* Emits the `add.w d, j, k` instruction. */
1430 static void __attribute__((unused)) tcg_out_opc_add_w(TCGContext *s, TCGReg d,
1431 TCGReg j, TCGReg k)
1432 {
1433 tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k));
1434 }
1435
1436 /* Emits the `add.d d, j, k` instruction. */
1437 static void __attribute__((unused)) tcg_out_opc_add_d(TCGContext *s, TCGReg d,
1438 TCGReg j, TCGReg k)
1439 {
1440 tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k));
1441 }
1442
1443 /* Emits the `sub.w d, j, k` instruction. */
1444 static void __attribute__((unused)) tcg_out_opc_sub_w(TCGContext *s, TCGReg d,
1445 TCGReg j, TCGReg k)
1446 {
1447 tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k));
1448 }
1449
1450 /* Emits the `sub.d d, j, k` instruction. */
1451 static void __attribute__((unused)) tcg_out_opc_sub_d(TCGContext *s, TCGReg d,
1452 TCGReg j, TCGReg k)
1453 {
1454 tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k));
1455 }
1456
1457 /* Emits the `slt d, j, k` instruction. */
1458 static void __attribute__((unused)) tcg_out_opc_slt(TCGContext *s, TCGReg d,
1459 TCGReg j, TCGReg k)
1460 {
1461 tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k));
1462 }
1463
1464 /* Emits the `sltu d, j, k` instruction. */
1465 static void __attribute__((unused)) tcg_out_opc_sltu(TCGContext *s, TCGReg d,
1466 TCGReg j, TCGReg k)
1467 {
1468 tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k));
1469 }
1470
1471 /* Emits the `maskeqz d, j, k` instruction. */
1472 static void __attribute__((unused)) tcg_out_opc_maskeqz(TCGContext *s, TCGReg d,
1473 TCGReg j, TCGReg k)
1474 {
1475 tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k));
1476 }
1477
1478 /* Emits the `masknez d, j, k` instruction. */
1479 static void __attribute__((unused)) tcg_out_opc_masknez(TCGContext *s, TCGReg d,
1480 TCGReg j, TCGReg k)
1481 {
1482 tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k));
1483 }
1484
1485 /* Emits the `nor d, j, k` instruction. */
1486 static void __attribute__((unused)) tcg_out_opc_nor(TCGContext *s, TCGReg d,
1487 TCGReg j, TCGReg k)
1488 {
1489 tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k));
1490 }
1491
1492 /* Emits the `and d, j, k` instruction. */
1493 static void __attribute__((unused)) tcg_out_opc_and(TCGContext *s, TCGReg d,
1494 TCGReg j, TCGReg k)
1495 {
1496 tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k));
1497 }
1498
1499 /* Emits the `or d, j, k` instruction. */
1500 static void __attribute__((unused)) tcg_out_opc_or(TCGContext *s, TCGReg d,
1501 TCGReg j, TCGReg k)
1502 {
1503 tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k));
1504 }
1505
1506 /* Emits the `xor d, j, k` instruction. */
1507 static void __attribute__((unused)) tcg_out_opc_xor(TCGContext *s, TCGReg d,
1508 TCGReg j, TCGReg k)
1509 {
1510 tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k));
1511 }
1512
1513 /* Emits the `orn d, j, k` instruction. */
1514 static void __attribute__((unused)) tcg_out_opc_orn(TCGContext *s, TCGReg d,
1515 TCGReg j, TCGReg k)
1516 {
1517 tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k));
1518 }
1519
1520 /* Emits the `andn d, j, k` instruction. */
1521 static void __attribute__((unused)) tcg_out_opc_andn(TCGContext *s, TCGReg d,
1522 TCGReg j, TCGReg k)
1523 {
1524 tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k));
1525 }
1526
1527 /* Emits the `sll.w d, j, k` instruction. */
1528 static void __attribute__((unused)) tcg_out_opc_sll_w(TCGContext *s, TCGReg d,
1529 TCGReg j, TCGReg k)
1530 {
1531 tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k));
1532 }
1533
1534 /* Emits the `srl.w d, j, k` instruction. */
1535 static void __attribute__((unused)) tcg_out_opc_srl_w(TCGContext *s, TCGReg d,
1536 TCGReg j, TCGReg k)
1537 {
1538 tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k));
1539 }
1540
1541 /* Emits the `sra.w d, j, k` instruction. */
1542 static void __attribute__((unused)) tcg_out_opc_sra_w(TCGContext *s, TCGReg d,
1543 TCGReg j, TCGReg k)
1544 {
1545 tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k));
1546 }
1547
1548 /* Emits the `sll.d d, j, k` instruction. */
1549 static void __attribute__((unused)) tcg_out_opc_sll_d(TCGContext *s, TCGReg d,
1550 TCGReg j, TCGReg k)
1551 {
1552 tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k));
1553 }
1554
1555 /* Emits the `srl.d d, j, k` instruction. */
1556 static void __attribute__((unused)) tcg_out_opc_srl_d(TCGContext *s, TCGReg d,
1557 TCGReg j, TCGReg k)
1558 {
1559 tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k));
1560 }
1561
1562 /* Emits the `sra.d d, j, k` instruction. */
1563 static void __attribute__((unused)) tcg_out_opc_sra_d(TCGContext *s, TCGReg d,
1564 TCGReg j, TCGReg k)
1565 {
1566 tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k));
1567 }
1568
1569 /* Emits the `rotr.b d, j, k` instruction. */
1570 static void __attribute__((unused)) tcg_out_opc_rotr_b(TCGContext *s, TCGReg d,
1571 TCGReg j, TCGReg k)
1572 {
1573 tcg_out32(s, encode_djk_insn(OPC_ROTR_B, d, j, k));
1574 }
1575
1576 /* Emits the `rotr.h d, j, k` instruction. */
1577 static void __attribute__((unused)) tcg_out_opc_rotr_h(TCGContext *s, TCGReg d,
1578 TCGReg j, TCGReg k)
1579 {
1580 tcg_out32(s, encode_djk_insn(OPC_ROTR_H, d, j, k));
1581 }
1582
1583 /* Emits the `rotr.w d, j, k` instruction. */
1584 static void __attribute__((unused)) tcg_out_opc_rotr_w(TCGContext *s, TCGReg d,
1585 TCGReg j, TCGReg k)
1586 {
1587 tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k));
1588 }
1589
1590 /* Emits the `rotr.d d, j, k` instruction. */
1591 static void __attribute__((unused)) tcg_out_opc_rotr_d(TCGContext *s, TCGReg d,
1592 TCGReg j, TCGReg k)
1593 {
1594 tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k));
1595 }
1596
1597 /* Emits the `mul.w d, j, k` instruction. */
1598 static void __attribute__((unused)) tcg_out_opc_mul_w(TCGContext *s, TCGReg d,
1599 TCGReg j, TCGReg k)
1600 {
1601 tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k));
1602 }
1603
1604 /* Emits the `mulh.w d, j, k` instruction. */
1605 static void __attribute__((unused)) tcg_out_opc_mulh_w(TCGContext *s, TCGReg d,
1606 TCGReg j, TCGReg k)
1607 {
1608 tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k));
1609 }
1610
1611 /* Emits the `mulh.wu d, j, k` instruction. */
1612 static void __attribute__((unused)) tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d,
1613 TCGReg j, TCGReg k)
1614 {
1615 tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k));
1616 }
1617
1618 /* Emits the `mul.d d, j, k` instruction. */
1619 static void __attribute__((unused)) tcg_out_opc_mul_d(TCGContext *s, TCGReg d,
1620 TCGReg j, TCGReg k)
1621 {
1622 tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k));
1623 }
1624
1625 /* Emits the `mulh.d d, j, k` instruction. */
1626 static void __attribute__((unused)) tcg_out_opc_mulh_d(TCGContext *s, TCGReg d,
1627 TCGReg j, TCGReg k)
1628 {
1629 tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k));
1630 }
1631
1632 /* Emits the `mulh.du d, j, k` instruction. */
1633 static void __attribute__((unused)) tcg_out_opc_mulh_du(TCGContext *s, TCGReg d,
1634 TCGReg j, TCGReg k)
1635 {
1636 tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k));
1637 }
1638
1639 /* Emits the `div.w d, j, k` instruction. */
1640 static void __attribute__((unused)) tcg_out_opc_div_w(TCGContext *s, TCGReg d,
1641 TCGReg j, TCGReg k)
1642 {
1643 tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k));
1644 }
1645
1646 /* Emits the `mod.w d, j, k` instruction. */
1647 static void __attribute__((unused)) tcg_out_opc_mod_w(TCGContext *s, TCGReg d,
1648 TCGReg j, TCGReg k)
1649 {
1650 tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k));
1651 }
1652
1653 /* Emits the `div.wu d, j, k` instruction. */
1654 static void __attribute__((unused)) tcg_out_opc_div_wu(TCGContext *s, TCGReg d,
1655 TCGReg j, TCGReg k)
1656 {
1657 tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k));
1658 }
1659
1660 /* Emits the `mod.wu d, j, k` instruction. */
1661 static void __attribute__((unused)) tcg_out_opc_mod_wu(TCGContext *s, TCGReg d,
1662 TCGReg j, TCGReg k)
1663 {
1664 tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k));
1665 }
1666
1667 /* Emits the `div.d d, j, k` instruction. */
1668 static void __attribute__((unused)) tcg_out_opc_div_d(TCGContext *s, TCGReg d,
1669 TCGReg j, TCGReg k)
1670 {
1671 tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k));
1672 }
1673
1674 /* Emits the `mod.d d, j, k` instruction. */
1675 static void __attribute__((unused)) tcg_out_opc_mod_d(TCGContext *s, TCGReg d,
1676 TCGReg j, TCGReg k)
1677 {
1678 tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k));
1679 }
1680
1681 /* Emits the `div.du d, j, k` instruction. */
1682 static void __attribute__((unused)) tcg_out_opc_div_du(TCGContext *s, TCGReg d,
1683 TCGReg j, TCGReg k)
1684 {
1685 tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k));
1686 }
1687
1688 /* Emits the `mod.du d, j, k` instruction. */
1689 static void __attribute__((unused)) tcg_out_opc_mod_du(TCGContext *s, TCGReg d,
1690 TCGReg j, TCGReg k)
1691 {
1692 tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k));
1693 }
1694
1695 /* Emits the `slli.w d, j, uk5` instruction. */
1696 static void __attribute__((unused)) tcg_out_opc_slli_w(TCGContext *s, TCGReg d,
1697 TCGReg j, uint32_t uk5)
1698 {
1699 tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5));
1700 }
1701
1702 /* Emits the `slli.d d, j, uk6` instruction. */
1703 static void __attribute__((unused)) tcg_out_opc_slli_d(TCGContext *s, TCGReg d,
1704 TCGReg j, uint32_t uk6)
1705 {
1706 tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6));
1707 }
1708
1709 /* Emits the `srli.w d, j, uk5` instruction. */
1710 static void __attribute__((unused)) tcg_out_opc_srli_w(TCGContext *s, TCGReg d,
1711 TCGReg j, uint32_t uk5)
1712 {
1713 tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5));
1714 }
1715
1716 /* Emits the `srli.d d, j, uk6` instruction. */
1717 static void __attribute__((unused)) tcg_out_opc_srli_d(TCGContext *s, TCGReg d,
1718 TCGReg j, uint32_t uk6)
1719 {
1720 tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6));
1721 }
1722
1723 /* Emits the `srai.w d, j, uk5` instruction. */
1724 static void __attribute__((unused)) tcg_out_opc_srai_w(TCGContext *s, TCGReg d,
1725 TCGReg j, uint32_t uk5)
1726 {
1727 tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5));
1728 }
1729
1730 /* Emits the `srai.d d, j, uk6` instruction. */
1731 static void __attribute__((unused)) tcg_out_opc_srai_d(TCGContext *s, TCGReg d,
1732 TCGReg j, uint32_t uk6)
1733 {
1734 tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6));
1735 }
1736
1737 /* Emits the `rotri.b d, j, uk3` instruction. */
1738 static void __attribute__((unused)) tcg_out_opc_rotri_b(TCGContext *s, TCGReg d,
1739 TCGReg j, uint32_t uk3)
1740 {
1741 tcg_out32(s, encode_djuk3_insn(OPC_ROTRI_B, d, j, uk3));
1742 }
1743
1744 /* Emits the `rotri.h d, j, uk4` instruction. */
1745 static void __attribute__((unused)) tcg_out_opc_rotri_h(TCGContext *s, TCGReg d,
1746 TCGReg j, uint32_t uk4)
1747 {
1748 tcg_out32(s, encode_djuk4_insn(OPC_ROTRI_H, d, j, uk4));
1749 }
1750
1751 /* Emits the `rotri.w d, j, uk5` instruction. */
1752 static void __attribute__((unused)) tcg_out_opc_rotri_w(TCGContext *s, TCGReg d,
1753 TCGReg j, uint32_t uk5)
1754 {
1755 tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5));
1756 }
1757
1758 /* Emits the `rotri.d d, j, uk6` instruction. */
1759 static void __attribute__((unused)) tcg_out_opc_rotri_d(TCGContext *s, TCGReg d,
1760 TCGReg j, uint32_t uk6)
1761 {
1762 tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6));
1763 }
1764
1765 /* Emits the `bstrins.w d, j, uk5, um5` instruction. */
1766 static void __attribute__((unused)) tcg_out_opc_bstrins_w(TCGContext *s,
1767 TCGReg d, TCGReg j,
1768 uint32_t uk5,
1769 uint32_t um5)
1770 {
1771 tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5));
1772 }
1773
1774 /* Emits the `bstrpick.w d, j, uk5, um5` instruction. */
1775 static void __attribute__((unused)) tcg_out_opc_bstrpick_w(TCGContext *s,
1776 TCGReg d, TCGReg j,
1777 uint32_t uk5,
1778 uint32_t um5)
1779 {
1780 tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5));
1781 }
1782
1783 /* Emits the `bstrins.d d, j, uk6, um6` instruction. */
1784 static void __attribute__((unused)) tcg_out_opc_bstrins_d(TCGContext *s,
1785 TCGReg d, TCGReg j,
1786 uint32_t uk6,
1787 uint32_t um6)
1788 {
1789 tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6));
1790 }
1791
1792 /* Emits the `bstrpick.d d, j, uk6, um6` instruction. */
1793 static void __attribute__((unused)) tcg_out_opc_bstrpick_d(TCGContext *s,
1794 TCGReg d, TCGReg j,
1795 uint32_t uk6,
1796 uint32_t um6)
1797 {
1798 tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6));
1799 }
1800
1801 /* Emits the `fmov.d fd, fj` instruction. */
1802 static void __attribute__((unused)) tcg_out_opc_fmov_d(TCGContext *s, TCGReg fd,
1803 TCGReg fj)
1804 {
1805 tcg_out32(s, encode_fdfj_insn(OPC_FMOV_D, fd, fj));
1806 }
1807
1808 /* Emits the `movgr2fr.d fd, j` instruction. */
1809 static void __attribute__((unused)) tcg_out_opc_movgr2fr_d(TCGContext *s,
1810 TCGReg fd, TCGReg j)
1811 {
1812 tcg_out32(s, encode_fdj_insn(OPC_MOVGR2FR_D, fd, j));
1813 }
1814
1815 /* Emits the `movfr2gr.d d, fj` instruction. */
1816 static void __attribute__((unused)) tcg_out_opc_movfr2gr_d(TCGContext *s,
1817 TCGReg d, TCGReg fj)
1818 {
1819 tcg_out32(s, encode_dfj_insn(OPC_MOVFR2GR_D, d, fj));
1820 }
1821
1822 /* Emits the `slti d, j, sk12` instruction. */
1823 static void __attribute__((unused)) tcg_out_opc_slti(TCGContext *s, TCGReg d,
1824 TCGReg j, int32_t sk12)
1825 {
1826 tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12));
1827 }
1828
1829 /* Emits the `sltui d, j, sk12` instruction. */
1830 static void __attribute__((unused)) tcg_out_opc_sltui(TCGContext *s, TCGReg d,
1831 TCGReg j, int32_t sk12)
1832 {
1833 tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12));
1834 }
1835
1836 /* Emits the `addi.w d, j, sk12` instruction. */
1837 static void __attribute__((unused)) tcg_out_opc_addi_w(TCGContext *s, TCGReg d,
1838 TCGReg j, int32_t sk12)
1839 {
1840 tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12));
1841 }
1842
1843 /* Emits the `addi.d d, j, sk12` instruction. */
1844 static void __attribute__((unused)) tcg_out_opc_addi_d(TCGContext *s, TCGReg d,
1845 TCGReg j, int32_t sk12)
1846 {
1847 tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12));
1848 }
1849
1850 /* Emits the `cu52i.d d, j, sk12` instruction. */
1851 static void __attribute__((unused)) tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d,
1852 TCGReg j, int32_t sk12)
1853 {
1854 tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12));
1855 }
1856
1857 /* Emits the `andi d, j, uk12` instruction. */
1858 static void __attribute__((unused)) tcg_out_opc_andi(TCGContext *s, TCGReg d,
1859 TCGReg j, uint32_t uk12)
1860 {
1861 tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12));
1862 }
1863
1864 /* Emits the `ori d, j, uk12` instruction. */
1865 static void __attribute__((unused)) tcg_out_opc_ori(TCGContext *s, TCGReg d,
1866 TCGReg j, uint32_t uk12)
1867 {
1868 tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12));
1869 }
1870
1871 /* Emits the `xori d, j, uk12` instruction. */
1872 static void __attribute__((unused)) tcg_out_opc_xori(TCGContext *s, TCGReg d,
1873 TCGReg j, uint32_t uk12)
1874 {
1875 tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
1876 }
1877
1878 /* Emits the `vbitsel.v vd, vj, vk, va` instruction. */
1879 static void __attribute__((unused))
1880 tcg_out_opc_vbitsel_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1881 {
1882 tcg_out32(s, encode_vdvjvkva_insn(OPC_VBITSEL_V, vd, vj, vk, va));
1883 }
1884
1885 /* Emits the `xvbitsel.v xd, xj, xk, xa` instruction. */
1886 static void __attribute__((unused)) tcg_out_opc_xvbitsel_v(TCGContext *s,
1887 TCGReg xd, TCGReg xj,
1888 TCGReg xk, TCGReg xa)
1889 {
1890 tcg_out32(s, encode_xdxjxkxa_insn(OPC_XVBITSEL_V, xd, xj, xk, xa));
1891 }
1892
1893 /* Emits the `vshuf.b vd, vj, vk, va` instruction. */
1894 static void __attribute__((unused))
1895 tcg_out_opc_vshuf_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1896 {
1897 tcg_out32(s, encode_vdvjvkva_insn(OPC_VSHUF_B, vd, vj, vk, va));
1898 }
1899
1900 /* Emits the `xvshuf.b xd, xj, xk, xa` instruction. */
1901 static void __attribute__((unused))
1902 tcg_out_opc_xvshuf_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk, TCGReg xa)
1903 {
1904 tcg_out32(s, encode_xdxjxkxa_insn(OPC_XVSHUF_B, xd, xj, xk, xa));
1905 }
1906
1907 /* Emits the `addu16i.d d, j, sk16` instruction. */
1908 static void __attribute__((unused))
1909 tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
1910 {
1911 tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
1912 }
1913
1914 /* Emits the `lu12i.w d, sj20` instruction. */
1915 static void __attribute__((unused)) tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d,
1916 int32_t sj20)
1917 {
1918 tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20));
1919 }
1920
1921 /* Emits the `cu32i.d d, sj20` instruction. */
1922 static void __attribute__((unused)) tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d,
1923 int32_t sj20)
1924 {
1925 tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20));
1926 }
1927
1928 /* Emits the `pcaddu2i d, sj20` instruction. */
1929 static void __attribute__((unused)) tcg_out_opc_pcaddu2i(TCGContext *s,
1930 TCGReg d, int32_t sj20)
1931 {
1932 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU2I, d, sj20));
1933 }
1934
1935 /* Emits the `pcalau12i d, sj20` instruction. */
1936 static void __attribute__((unused))
1937 tcg_out_opc_pcalau12i(TCGContext *s, TCGReg d, int32_t sj20)
1938 {
1939 tcg_out32(s, encode_dsj20_insn(OPC_PCALAU12I, d, sj20));
1940 }
1941
1942 /* Emits the `pcaddu12i d, sj20` instruction. */
1943 static void __attribute__((unused))
1944 tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20)
1945 {
1946 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20));
1947 }
1948
1949 /* Emits the `pcaddu18i d, sj20` instruction. */
1950 static void __attribute__((unused))
1951 tcg_out_opc_pcaddu18i(TCGContext *s, TCGReg d, int32_t sj20)
1952 {
1953 tcg_out32(s, encode_dsj20_insn(OPC_PCADDU18I, d, sj20));
1954 }
1955
1956 /* Emits the `ld.b d, j, sk12` instruction. */
1957 static void __attribute__((unused)) tcg_out_opc_ld_b(TCGContext *s, TCGReg d,
1958 TCGReg j, int32_t sk12)
1959 {
1960 tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12));
1961 }
1962
1963 /* Emits the `ld.h d, j, sk12` instruction. */
1964 static void __attribute__((unused)) tcg_out_opc_ld_h(TCGContext *s, TCGReg d,
1965 TCGReg j, int32_t sk12)
1966 {
1967 tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12));
1968 }
1969
1970 /* Emits the `ld.w d, j, sk12` instruction. */
1971 static void __attribute__((unused)) tcg_out_opc_ld_w(TCGContext *s, TCGReg d,
1972 TCGReg j, int32_t sk12)
1973 {
1974 tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12));
1975 }
1976
1977 /* Emits the `ld.d d, j, sk12` instruction. */
1978 static void __attribute__((unused)) tcg_out_opc_ld_d(TCGContext *s, TCGReg d,
1979 TCGReg j, int32_t sk12)
1980 {
1981 tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12));
1982 }
1983
1984 /* Emits the `st.b d, j, sk12` instruction. */
1985 static void __attribute__((unused)) tcg_out_opc_st_b(TCGContext *s, TCGReg d,
1986 TCGReg j, int32_t sk12)
1987 {
1988 tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12));
1989 }
1990
1991 /* Emits the `st.h d, j, sk12` instruction. */
1992 static void __attribute__((unused)) tcg_out_opc_st_h(TCGContext *s, TCGReg d,
1993 TCGReg j, int32_t sk12)
1994 {
1995 tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12));
1996 }
1997
1998 /* Emits the `st.w d, j, sk12` instruction. */
1999 static void __attribute__((unused)) tcg_out_opc_st_w(TCGContext *s, TCGReg d,
2000 TCGReg j, int32_t sk12)
2001 {
2002 tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12));
2003 }
2004
2005 /* Emits the `st.d d, j, sk12` instruction. */
2006 static void __attribute__((unused)) tcg_out_opc_st_d(TCGContext *s, TCGReg d,
2007 TCGReg j, int32_t sk12)
2008 {
2009 tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12));
2010 }
2011
2012 /* Emits the `ld.bu d, j, sk12` instruction. */
2013 static void __attribute__((unused)) tcg_out_opc_ld_bu(TCGContext *s, TCGReg d,
2014 TCGReg j, int32_t sk12)
2015 {
2016 tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12));
2017 }
2018
2019 /* Emits the `ld.hu d, j, sk12` instruction. */
2020 static void __attribute__((unused)) tcg_out_opc_ld_hu(TCGContext *s, TCGReg d,
2021 TCGReg j, int32_t sk12)
2022 {
2023 tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12));
2024 }
2025
2026 /* Emits the `ld.wu d, j, sk12` instruction. */
2027 static void __attribute__((unused)) tcg_out_opc_ld_wu(TCGContext *s, TCGReg d,
2028 TCGReg j, int32_t sk12)
2029 {
2030 tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12));
2031 }
2032
2033 /* Emits the `fld.s fd, j, sk12` instruction. */
2034 static void __attribute__((unused)) tcg_out_opc_fld_s(TCGContext *s, TCGReg fd,
2035 TCGReg j, int32_t sk12)
2036 {
2037 tcg_out32(s, encode_fdjsk12_insn(OPC_FLD_S, fd, j, sk12));
2038 }
2039
2040 /* Emits the `fst.s fd, j, sk12` instruction. */
2041 static void __attribute__((unused)) tcg_out_opc_fst_s(TCGContext *s, TCGReg fd,
2042 TCGReg j, int32_t sk12)
2043 {
2044 tcg_out32(s, encode_fdjsk12_insn(OPC_FST_S, fd, j, sk12));
2045 }
2046
2047 /* Emits the `fld.d fd, j, sk12` instruction. */
2048 static void __attribute__((unused)) tcg_out_opc_fld_d(TCGContext *s, TCGReg fd,
2049 TCGReg j, int32_t sk12)
2050 {
2051 tcg_out32(s, encode_fdjsk12_insn(OPC_FLD_D, fd, j, sk12));
2052 }
2053
2054 /* Emits the `fst.d fd, j, sk12` instruction. */
2055 static void __attribute__((unused)) tcg_out_opc_fst_d(TCGContext *s, TCGReg fd,
2056 TCGReg j, int32_t sk12)
2057 {
2058 tcg_out32(s, encode_fdjsk12_insn(OPC_FST_D, fd, j, sk12));
2059 }
2060
2061 /* Emits the `vld vd, j, sk12` instruction. */
2062 static void __attribute__((unused)) tcg_out_opc_vld(TCGContext *s, TCGReg vd,
2063 TCGReg j, int32_t sk12)
2064 {
2065 tcg_out32(s, encode_vdjsk12_insn(OPC_VLD, vd, j, sk12));
2066 }
2067
2068 /* Emits the `vst vd, j, sk12` instruction. */
2069 static void __attribute__((unused)) tcg_out_opc_vst(TCGContext *s, TCGReg vd,
2070 TCGReg j, int32_t sk12)
2071 {
2072 tcg_out32(s, encode_vdjsk12_insn(OPC_VST, vd, j, sk12));
2073 }
2074
2075 /* Emits the `xvld xd, j, sk12` instruction. */
2076 static void __attribute__((unused)) tcg_out_opc_xvld(TCGContext *s, TCGReg xd,
2077 TCGReg j, int32_t sk12)
2078 {
2079 tcg_out32(s, encode_xdjsk12_insn(OPC_XVLD, xd, j, sk12));
2080 }
2081
2082 /* Emits the `xvst xd, j, sk12` instruction. */
2083 static void __attribute__((unused)) tcg_out_opc_xvst(TCGContext *s, TCGReg xd,
2084 TCGReg j, int32_t sk12)
2085 {
2086 tcg_out32(s, encode_xdjsk12_insn(OPC_XVST, xd, j, sk12));
2087 }
2088
2089 /* Emits the `vldrepl.d vd, j, sk9` instruction. */
2090 static void __attribute__((unused))
2091 tcg_out_opc_vldrepl_d(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk9)
2092 {
2093 tcg_out32(s, encode_vdjsk9_insn(OPC_VLDREPL_D, vd, j, sk9));
2094 }
2095
2096 /* Emits the `vldrepl.w vd, j, sk10` instruction. */
2097 static void __attribute__((unused))
2098 tcg_out_opc_vldrepl_w(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk10)
2099 {
2100 tcg_out32(s, encode_vdjsk10_insn(OPC_VLDREPL_W, vd, j, sk10));
2101 }
2102
2103 /* Emits the `vldrepl.h vd, j, sk11` instruction. */
2104 static void __attribute__((unused))
2105 tcg_out_opc_vldrepl_h(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk11)
2106 {
2107 tcg_out32(s, encode_vdjsk11_insn(OPC_VLDREPL_H, vd, j, sk11));
2108 }
2109
2110 /* Emits the `vldrepl.b vd, j, sk12` instruction. */
2111 static void __attribute__((unused))
2112 tcg_out_opc_vldrepl_b(TCGContext *s, TCGReg vd, TCGReg j, int32_t sk12)
2113 {
2114 tcg_out32(s, encode_vdjsk12_insn(OPC_VLDREPL_B, vd, j, sk12));
2115 }
2116
2117 /* Emits the `vstelm.d vd, j, sk8, un1` instruction. */
2118 static void __attribute__((unused)) tcg_out_opc_vstelm_d(TCGContext *s,
2119 TCGReg vd, TCGReg j,
2120 int32_t sk8,
2121 uint32_t un1)
2122 {
2123 tcg_out32(s, encode_vdjsk8un1_insn(OPC_VSTELM_D, vd, j, sk8, un1));
2124 }
2125
2126 /* Emits the `vstelm.w vd, j, sk8, un2` instruction. */
2127 static void __attribute__((unused)) tcg_out_opc_vstelm_w(TCGContext *s,
2128 TCGReg vd, TCGReg j,
2129 int32_t sk8,
2130 uint32_t un2)
2131 {
2132 tcg_out32(s, encode_vdjsk8un2_insn(OPC_VSTELM_W, vd, j, sk8, un2));
2133 }
2134
2135 /* Emits the `vstelm.h vd, j, sk8, un3` instruction. */
2136 static void __attribute__((unused)) tcg_out_opc_vstelm_h(TCGContext *s,
2137 TCGReg vd, TCGReg j,
2138 int32_t sk8,
2139 uint32_t un3)
2140 {
2141 tcg_out32(s, encode_vdjsk8un3_insn(OPC_VSTELM_H, vd, j, sk8, un3));
2142 }
2143
2144 /* Emits the `vstelm.b vd, j, sk8, un4` instruction. */
2145 static void __attribute__((unused)) tcg_out_opc_vstelm_b(TCGContext *s,
2146 TCGReg vd, TCGReg j,
2147 int32_t sk8,
2148 uint32_t un4)
2149 {
2150 tcg_out32(s, encode_vdjsk8un4_insn(OPC_VSTELM_B, vd, j, sk8, un4));
2151 }
2152
2153 /* Emits the `xvldrepl.d xd, j, sk9` instruction. */
2154 static void __attribute__((unused))
2155 tcg_out_opc_xvldrepl_d(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk9)
2156 {
2157 tcg_out32(s, encode_xdjsk9_insn(OPC_XVLDREPL_D, xd, j, sk9));
2158 }
2159
2160 /* Emits the `xvldrepl.w xd, j, sk10` instruction. */
2161 static void __attribute__((unused))
2162 tcg_out_opc_xvldrepl_w(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk10)
2163 {
2164 tcg_out32(s, encode_xdjsk10_insn(OPC_XVLDREPL_W, xd, j, sk10));
2165 }
2166
2167 /* Emits the `xvldrepl.h xd, j, sk11` instruction. */
2168 static void __attribute__((unused))
2169 tcg_out_opc_xvldrepl_h(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk11)
2170 {
2171 tcg_out32(s, encode_xdjsk11_insn(OPC_XVLDREPL_H, xd, j, sk11));
2172 }
2173
2174 /* Emits the `xvldrepl.b xd, j, sk12` instruction. */
2175 static void __attribute__((unused))
2176 tcg_out_opc_xvldrepl_b(TCGContext *s, TCGReg xd, TCGReg j, int32_t sk12)
2177 {
2178 tcg_out32(s, encode_xdjsk12_insn(OPC_XVLDREPL_B, xd, j, sk12));
2179 }
2180
2181 /* Emits the `xvstelm.d xd, j, sk8, un2` instruction. */
2182 static void __attribute__((unused)) tcg_out_opc_xvstelm_d(TCGContext *s,
2183 TCGReg xd, TCGReg j,
2184 int32_t sk8,
2185 uint32_t un2)
2186 {
2187 tcg_out32(s, encode_xdjsk8un2_insn(OPC_XVSTELM_D, xd, j, sk8, un2));
2188 }
2189
2190 /* Emits the `xvstelm.w xd, j, sk8, un3` instruction. */
2191 static void __attribute__((unused)) tcg_out_opc_xvstelm_w(TCGContext *s,
2192 TCGReg xd, TCGReg j,
2193 int32_t sk8,
2194 uint32_t un3)
2195 {
2196 tcg_out32(s, encode_xdjsk8un3_insn(OPC_XVSTELM_W, xd, j, sk8, un3));
2197 }
2198
2199 /* Emits the `xvstelm.h xd, j, sk8, un4` instruction. */
2200 static void __attribute__((unused)) tcg_out_opc_xvstelm_h(TCGContext *s,
2201 TCGReg xd, TCGReg j,
2202 int32_t sk8,
2203 uint32_t un4)
2204 {
2205 tcg_out32(s, encode_xdjsk8un4_insn(OPC_XVSTELM_H, xd, j, sk8, un4));
2206 }
2207
2208 /* Emits the `xvstelm.b xd, j, sk8, un5` instruction. */
2209 static void __attribute__((unused)) tcg_out_opc_xvstelm_b(TCGContext *s,
2210 TCGReg xd, TCGReg j,
2211 int32_t sk8,
2212 uint32_t un5)
2213 {
2214 tcg_out32(s, encode_xdjsk8un5_insn(OPC_XVSTELM_B, xd, j, sk8, un5));
2215 }
2216
2217 /* Emits the `ldx.b d, j, k` instruction. */
2218 static void __attribute__((unused)) tcg_out_opc_ldx_b(TCGContext *s, TCGReg d,
2219 TCGReg j, TCGReg k)
2220 {
2221 tcg_out32(s, encode_djk_insn(OPC_LDX_B, d, j, k));
2222 }
2223
2224 /* Emits the `ldx.h d, j, k` instruction. */
2225 static void __attribute__((unused)) tcg_out_opc_ldx_h(TCGContext *s, TCGReg d,
2226 TCGReg j, TCGReg k)
2227 {
2228 tcg_out32(s, encode_djk_insn(OPC_LDX_H, d, j, k));
2229 }
2230
2231 /* Emits the `ldx.w d, j, k` instruction. */
2232 static void __attribute__((unused)) tcg_out_opc_ldx_w(TCGContext *s, TCGReg d,
2233 TCGReg j, TCGReg k)
2234 {
2235 tcg_out32(s, encode_djk_insn(OPC_LDX_W, d, j, k));
2236 }
2237
2238 /* Emits the `ldx.d d, j, k` instruction. */
2239 static void __attribute__((unused)) tcg_out_opc_ldx_d(TCGContext *s, TCGReg d,
2240 TCGReg j, TCGReg k)
2241 {
2242 tcg_out32(s, encode_djk_insn(OPC_LDX_D, d, j, k));
2243 }
2244
2245 /* Emits the `stx.b d, j, k` instruction. */
2246 static void __attribute__((unused)) tcg_out_opc_stx_b(TCGContext *s, TCGReg d,
2247 TCGReg j, TCGReg k)
2248 {
2249 tcg_out32(s, encode_djk_insn(OPC_STX_B, d, j, k));
2250 }
2251
2252 /* Emits the `stx.h d, j, k` instruction. */
2253 static void __attribute__((unused)) tcg_out_opc_stx_h(TCGContext *s, TCGReg d,
2254 TCGReg j, TCGReg k)
2255 {
2256 tcg_out32(s, encode_djk_insn(OPC_STX_H, d, j, k));
2257 }
2258
2259 /* Emits the `stx.w d, j, k` instruction. */
2260 static void __attribute__((unused)) tcg_out_opc_stx_w(TCGContext *s, TCGReg d,
2261 TCGReg j, TCGReg k)
2262 {
2263 tcg_out32(s, encode_djk_insn(OPC_STX_W, d, j, k));
2264 }
2265
2266 /* Emits the `stx.d d, j, k` instruction. */
2267 static void __attribute__((unused)) tcg_out_opc_stx_d(TCGContext *s, TCGReg d,
2268 TCGReg j, TCGReg k)
2269 {
2270 tcg_out32(s, encode_djk_insn(OPC_STX_D, d, j, k));
2271 }
2272
2273 /* Emits the `ldx.bu d, j, k` instruction. */
2274 static void __attribute__((unused)) tcg_out_opc_ldx_bu(TCGContext *s, TCGReg d,
2275 TCGReg j, TCGReg k)
2276 {
2277 tcg_out32(s, encode_djk_insn(OPC_LDX_BU, d, j, k));
2278 }
2279
2280 /* Emits the `ldx.hu d, j, k` instruction. */
2281 static void __attribute__((unused)) tcg_out_opc_ldx_hu(TCGContext *s, TCGReg d,
2282 TCGReg j, TCGReg k)
2283 {
2284 tcg_out32(s, encode_djk_insn(OPC_LDX_HU, d, j, k));
2285 }
2286
2287 /* Emits the `ldx.wu d, j, k` instruction. */
2288 static void __attribute__((unused)) tcg_out_opc_ldx_wu(TCGContext *s, TCGReg d,
2289 TCGReg j, TCGReg k)
2290 {
2291 tcg_out32(s, encode_djk_insn(OPC_LDX_WU, d, j, k));
2292 }
2293
2294 /* Emits the `fldx.s fd, j, k` instruction. */
2295 static void __attribute__((unused)) tcg_out_opc_fldx_s(TCGContext *s, TCGReg fd,
2296 TCGReg j, TCGReg k)
2297 {
2298 tcg_out32(s, encode_fdjk_insn(OPC_FLDX_S, fd, j, k));
2299 }
2300
2301 /* Emits the `fldx.d fd, j, k` instruction. */
2302 static void __attribute__((unused)) tcg_out_opc_fldx_d(TCGContext *s, TCGReg fd,
2303 TCGReg j, TCGReg k)
2304 {
2305 tcg_out32(s, encode_fdjk_insn(OPC_FLDX_D, fd, j, k));
2306 }
2307
2308 /* Emits the `fstx.s fd, j, k` instruction. */
2309 static void __attribute__((unused)) tcg_out_opc_fstx_s(TCGContext *s, TCGReg fd,
2310 TCGReg j, TCGReg k)
2311 {
2312 tcg_out32(s, encode_fdjk_insn(OPC_FSTX_S, fd, j, k));
2313 }
2314
2315 /* Emits the `fstx.d fd, j, k` instruction. */
2316 static void __attribute__((unused)) tcg_out_opc_fstx_d(TCGContext *s, TCGReg fd,
2317 TCGReg j, TCGReg k)
2318 {
2319 tcg_out32(s, encode_fdjk_insn(OPC_FSTX_D, fd, j, k));
2320 }
2321
2322 /* Emits the `vldx vd, j, k` instruction. */
2323 static void __attribute__((unused)) tcg_out_opc_vldx(TCGContext *s, TCGReg vd,
2324 TCGReg j, TCGReg k)
2325 {
2326 tcg_out32(s, encode_vdjk_insn(OPC_VLDX, vd, j, k));
2327 }
2328
2329 /* Emits the `vstx vd, j, k` instruction. */
2330 static void __attribute__((unused)) tcg_out_opc_vstx(TCGContext *s, TCGReg vd,
2331 TCGReg j, TCGReg k)
2332 {
2333 tcg_out32(s, encode_vdjk_insn(OPC_VSTX, vd, j, k));
2334 }
2335
2336 /* Emits the `xvldx xd, j, k` instruction. */
2337 static void __attribute__((unused)) tcg_out_opc_xvldx(TCGContext *s, TCGReg xd,
2338 TCGReg j, TCGReg k)
2339 {
2340 tcg_out32(s, encode_xdjk_insn(OPC_XVLDX, xd, j, k));
2341 }
2342
2343 /* Emits the `xvstx xd, j, k` instruction. */
2344 static void __attribute__((unused)) tcg_out_opc_xvstx(TCGContext *s, TCGReg xd,
2345 TCGReg j, TCGReg k)
2346 {
2347 tcg_out32(s, encode_xdjk_insn(OPC_XVSTX, xd, j, k));
2348 }
2349
2350 /* Emits the `dbar ud15` instruction. */
2351 static void __attribute__((unused)) tcg_out_opc_dbar(TCGContext *s,
2352 uint32_t ud15)
2353 {
2354 tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15));
2355 }
2356
2357 /* Emits the `jiscr0 sd5k16` instruction. */
2358 static void __attribute__((unused)) tcg_out_opc_jiscr0(TCGContext *s,
2359 int32_t sd5k16)
2360 {
2361 tcg_out32(s, encode_sd5k16_insn(OPC_JISCR0, sd5k16));
2362 }
2363
2364 /* Emits the `jiscr1 sd5k16` instruction. */
2365 static void __attribute__((unused)) tcg_out_opc_jiscr1(TCGContext *s,
2366 int32_t sd5k16)
2367 {
2368 tcg_out32(s, encode_sd5k16_insn(OPC_JISCR1, sd5k16));
2369 }
2370
2371 /* Emits the `jirl d, j, sk16` instruction. */
2372 static void __attribute__((unused)) tcg_out_opc_jirl(TCGContext *s, TCGReg d,
2373 TCGReg j, int32_t sk16)
2374 {
2375 tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16));
2376 }
2377
2378 /* Emits the `b sd10k16` instruction. */
2379 static void __attribute__((unused)) tcg_out_opc_b(TCGContext *s,
2380 int32_t sd10k16)
2381 {
2382 tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16));
2383 }
2384
2385 /* Emits the `bl sd10k16` instruction. */
2386 static void __attribute__((unused)) tcg_out_opc_bl(TCGContext *s,
2387 int32_t sd10k16)
2388 {
2389 tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16));
2390 }
2391
2392 /* Emits the `beq d, j, sk16` instruction. */
2393 static void __attribute__((unused)) tcg_out_opc_beq(TCGContext *s, TCGReg d,
2394 TCGReg j, int32_t sk16)
2395 {
2396 tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16));
2397 }
2398
2399 /* Emits the `bne d, j, sk16` instruction. */
2400 static void __attribute__((unused)) tcg_out_opc_bne(TCGContext *s, TCGReg d,
2401 TCGReg j, int32_t sk16)
2402 {
2403 tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16));
2404 }
2405
2406 /* Emits the `bgt d, j, sk16` instruction. */
2407 static void __attribute__((unused)) tcg_out_opc_bgt(TCGContext *s, TCGReg d,
2408 TCGReg j, int32_t sk16)
2409 {
2410 tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16));
2411 }
2412
2413 /* Emits the `ble d, j, sk16` instruction. */
2414 static void __attribute__((unused)) tcg_out_opc_ble(TCGContext *s, TCGReg d,
2415 TCGReg j, int32_t sk16)
2416 {
2417 tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16));
2418 }
2419
2420 /* Emits the `bgtu d, j, sk16` instruction. */
2421 static void __attribute__((unused)) tcg_out_opc_bgtu(TCGContext *s, TCGReg d,
2422 TCGReg j, int32_t sk16)
2423 {
2424 tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16));
2425 }
2426
2427 /* Emits the `bleu d, j, sk16` instruction. */
2428 static void __attribute__((unused)) tcg_out_opc_bleu(TCGContext *s, TCGReg d,
2429 TCGReg j, int32_t sk16)
2430 {
2431 tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16));
2432 }
2433
2434 /* Emits the `vseq.b vd, vj, vk` instruction. */
2435 static void __attribute__((unused)) tcg_out_opc_vseq_b(TCGContext *s, TCGReg vd,
2436 TCGReg vj, TCGReg vk)
2437 {
2438 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_B, vd, vj, vk));
2439 }
2440
2441 /* Emits the `vseq.h vd, vj, vk` instruction. */
2442 static void __attribute__((unused)) tcg_out_opc_vseq_h(TCGContext *s, TCGReg vd,
2443 TCGReg vj, TCGReg vk)
2444 {
2445 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_H, vd, vj, vk));
2446 }
2447
2448 /* Emits the `vseq.w vd, vj, vk` instruction. */
2449 static void __attribute__((unused)) tcg_out_opc_vseq_w(TCGContext *s, TCGReg vd,
2450 TCGReg vj, TCGReg vk)
2451 {
2452 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_W, vd, vj, vk));
2453 }
2454
2455 /* Emits the `vseq.d vd, vj, vk` instruction. */
2456 static void __attribute__((unused)) tcg_out_opc_vseq_d(TCGContext *s, TCGReg vd,
2457 TCGReg vj, TCGReg vk)
2458 {
2459 tcg_out32(s, encode_vdvjvk_insn(OPC_VSEQ_D, vd, vj, vk));
2460 }
2461
2462 /* Emits the `vsle.b vd, vj, vk` instruction. */
2463 static void __attribute__((unused)) tcg_out_opc_vsle_b(TCGContext *s, TCGReg vd,
2464 TCGReg vj, TCGReg vk)
2465 {
2466 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_B, vd, vj, vk));
2467 }
2468
2469 /* Emits the `vsle.h vd, vj, vk` instruction. */
2470 static void __attribute__((unused)) tcg_out_opc_vsle_h(TCGContext *s, TCGReg vd,
2471 TCGReg vj, TCGReg vk)
2472 {
2473 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_H, vd, vj, vk));
2474 }
2475
2476 /* Emits the `vsle.w vd, vj, vk` instruction. */
2477 static void __attribute__((unused)) tcg_out_opc_vsle_w(TCGContext *s, TCGReg vd,
2478 TCGReg vj, TCGReg vk)
2479 {
2480 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_W, vd, vj, vk));
2481 }
2482
2483 /* Emits the `vsle.d vd, vj, vk` instruction. */
2484 static void __attribute__((unused)) tcg_out_opc_vsle_d(TCGContext *s, TCGReg vd,
2485 TCGReg vj, TCGReg vk)
2486 {
2487 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_D, vd, vj, vk));
2488 }
2489
2490 /* Emits the `vsle.bu vd, vj, vk` instruction. */
2491 static void __attribute__((unused))
2492 tcg_out_opc_vsle_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2493 {
2494 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_BU, vd, vj, vk));
2495 }
2496
2497 /* Emits the `vsle.hu vd, vj, vk` instruction. */
2498 static void __attribute__((unused))
2499 tcg_out_opc_vsle_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2500 {
2501 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_HU, vd, vj, vk));
2502 }
2503
2504 /* Emits the `vsle.wu vd, vj, vk` instruction. */
2505 static void __attribute__((unused))
2506 tcg_out_opc_vsle_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2507 {
2508 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_WU, vd, vj, vk));
2509 }
2510
2511 /* Emits the `vsle.du vd, vj, vk` instruction. */
2512 static void __attribute__((unused))
2513 tcg_out_opc_vsle_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2514 {
2515 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLE_DU, vd, vj, vk));
2516 }
2517
2518 /* Emits the `vslt.b vd, vj, vk` instruction. */
2519 static void __attribute__((unused)) tcg_out_opc_vslt_b(TCGContext *s, TCGReg vd,
2520 TCGReg vj, TCGReg vk)
2521 {
2522 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_B, vd, vj, vk));
2523 }
2524
2525 /* Emits the `vslt.h vd, vj, vk` instruction. */
2526 static void __attribute__((unused)) tcg_out_opc_vslt_h(TCGContext *s, TCGReg vd,
2527 TCGReg vj, TCGReg vk)
2528 {
2529 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_H, vd, vj, vk));
2530 }
2531
2532 /* Emits the `vslt.w vd, vj, vk` instruction. */
2533 static void __attribute__((unused)) tcg_out_opc_vslt_w(TCGContext *s, TCGReg vd,
2534 TCGReg vj, TCGReg vk)
2535 {
2536 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_W, vd, vj, vk));
2537 }
2538
2539 /* Emits the `vslt.d vd, vj, vk` instruction. */
2540 static void __attribute__((unused)) tcg_out_opc_vslt_d(TCGContext *s, TCGReg vd,
2541 TCGReg vj, TCGReg vk)
2542 {
2543 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_D, vd, vj, vk));
2544 }
2545
2546 /* Emits the `vslt.bu vd, vj, vk` instruction. */
2547 static void __attribute__((unused))
2548 tcg_out_opc_vslt_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2549 {
2550 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_BU, vd, vj, vk));
2551 }
2552
2553 /* Emits the `vslt.hu vd, vj, vk` instruction. */
2554 static void __attribute__((unused))
2555 tcg_out_opc_vslt_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2556 {
2557 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_HU, vd, vj, vk));
2558 }
2559
2560 /* Emits the `vslt.wu vd, vj, vk` instruction. */
2561 static void __attribute__((unused))
2562 tcg_out_opc_vslt_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2563 {
2564 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_WU, vd, vj, vk));
2565 }
2566
2567 /* Emits the `vslt.du vd, vj, vk` instruction. */
2568 static void __attribute__((unused))
2569 tcg_out_opc_vslt_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2570 {
2571 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLT_DU, vd, vj, vk));
2572 }
2573
2574 /* Emits the `vadd.b vd, vj, vk` instruction. */
2575 static void __attribute__((unused)) tcg_out_opc_vadd_b(TCGContext *s, TCGReg vd,
2576 TCGReg vj, TCGReg vk)
2577 {
2578 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_B, vd, vj, vk));
2579 }
2580
2581 /* Emits the `vadd.h vd, vj, vk` instruction. */
2582 static void __attribute__((unused)) tcg_out_opc_vadd_h(TCGContext *s, TCGReg vd,
2583 TCGReg vj, TCGReg vk)
2584 {
2585 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_H, vd, vj, vk));
2586 }
2587
2588 /* Emits the `vadd.w vd, vj, vk` instruction. */
2589 static void __attribute__((unused)) tcg_out_opc_vadd_w(TCGContext *s, TCGReg vd,
2590 TCGReg vj, TCGReg vk)
2591 {
2592 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_W, vd, vj, vk));
2593 }
2594
2595 /* Emits the `vadd.d vd, vj, vk` instruction. */
2596 static void __attribute__((unused)) tcg_out_opc_vadd_d(TCGContext *s, TCGReg vd,
2597 TCGReg vj, TCGReg vk)
2598 {
2599 tcg_out32(s, encode_vdvjvk_insn(OPC_VADD_D, vd, vj, vk));
2600 }
2601
2602 /* Emits the `vsub.b vd, vj, vk` instruction. */
2603 static void __attribute__((unused)) tcg_out_opc_vsub_b(TCGContext *s, TCGReg vd,
2604 TCGReg vj, TCGReg vk)
2605 {
2606 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_B, vd, vj, vk));
2607 }
2608
2609 /* Emits the `vsub.h vd, vj, vk` instruction. */
2610 static void __attribute__((unused)) tcg_out_opc_vsub_h(TCGContext *s, TCGReg vd,
2611 TCGReg vj, TCGReg vk)
2612 {
2613 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_H, vd, vj, vk));
2614 }
2615
2616 /* Emits the `vsub.w vd, vj, vk` instruction. */
2617 static void __attribute__((unused)) tcg_out_opc_vsub_w(TCGContext *s, TCGReg vd,
2618 TCGReg vj, TCGReg vk)
2619 {
2620 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_W, vd, vj, vk));
2621 }
2622
2623 /* Emits the `vsub.d vd, vj, vk` instruction. */
2624 static void __attribute__((unused)) tcg_out_opc_vsub_d(TCGContext *s, TCGReg vd,
2625 TCGReg vj, TCGReg vk)
2626 {
2627 tcg_out32(s, encode_vdvjvk_insn(OPC_VSUB_D, vd, vj, vk));
2628 }
2629
2630 /* Emits the `vsadd.b vd, vj, vk` instruction. */
2631 static void __attribute__((unused))
2632 tcg_out_opc_vsadd_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2633 {
2634 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_B, vd, vj, vk));
2635 }
2636
2637 /* Emits the `vsadd.h vd, vj, vk` instruction. */
2638 static void __attribute__((unused))
2639 tcg_out_opc_vsadd_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2640 {
2641 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_H, vd, vj, vk));
2642 }
2643
2644 /* Emits the `vsadd.w vd, vj, vk` instruction. */
2645 static void __attribute__((unused))
2646 tcg_out_opc_vsadd_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2647 {
2648 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_W, vd, vj, vk));
2649 }
2650
2651 /* Emits the `vsadd.d vd, vj, vk` instruction. */
2652 static void __attribute__((unused))
2653 tcg_out_opc_vsadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2654 {
2655 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_D, vd, vj, vk));
2656 }
2657
2658 /* Emits the `vssub.b vd, vj, vk` instruction. */
2659 static void __attribute__((unused))
2660 tcg_out_opc_vssub_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2661 {
2662 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_B, vd, vj, vk));
2663 }
2664
2665 /* Emits the `vssub.h vd, vj, vk` instruction. */
2666 static void __attribute__((unused))
2667 tcg_out_opc_vssub_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2668 {
2669 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_H, vd, vj, vk));
2670 }
2671
2672 /* Emits the `vssub.w vd, vj, vk` instruction. */
2673 static void __attribute__((unused))
2674 tcg_out_opc_vssub_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2675 {
2676 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_W, vd, vj, vk));
2677 }
2678
2679 /* Emits the `vssub.d vd, vj, vk` instruction. */
2680 static void __attribute__((unused))
2681 tcg_out_opc_vssub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2682 {
2683 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_D, vd, vj, vk));
2684 }
2685
2686 /* Emits the `vsadd.bu vd, vj, vk` instruction. */
2687 static void __attribute__((unused))
2688 tcg_out_opc_vsadd_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2689 {
2690 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_BU, vd, vj, vk));
2691 }
2692
2693 /* Emits the `vsadd.hu vd, vj, vk` instruction. */
2694 static void __attribute__((unused))
2695 tcg_out_opc_vsadd_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2696 {
2697 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_HU, vd, vj, vk));
2698 }
2699
2700 /* Emits the `vsadd.wu vd, vj, vk` instruction. */
2701 static void __attribute__((unused))
2702 tcg_out_opc_vsadd_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2703 {
2704 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_WU, vd, vj, vk));
2705 }
2706
2707 /* Emits the `vsadd.du vd, vj, vk` instruction. */
2708 static void __attribute__((unused))
2709 tcg_out_opc_vsadd_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2710 {
2711 tcg_out32(s, encode_vdvjvk_insn(OPC_VSADD_DU, vd, vj, vk));
2712 }
2713
2714 /* Emits the `vssub.bu vd, vj, vk` instruction. */
2715 static void __attribute__((unused))
2716 tcg_out_opc_vssub_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2717 {
2718 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_BU, vd, vj, vk));
2719 }
2720
2721 /* Emits the `vssub.hu vd, vj, vk` instruction. */
2722 static void __attribute__((unused))
2723 tcg_out_opc_vssub_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2724 {
2725 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_HU, vd, vj, vk));
2726 }
2727
2728 /* Emits the `vssub.wu vd, vj, vk` instruction. */
2729 static void __attribute__((unused))
2730 tcg_out_opc_vssub_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2731 {
2732 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_WU, vd, vj, vk));
2733 }
2734
2735 /* Emits the `vssub.du vd, vj, vk` instruction. */
2736 static void __attribute__((unused))
2737 tcg_out_opc_vssub_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2738 {
2739 tcg_out32(s, encode_vdvjvk_insn(OPC_VSSUB_DU, vd, vj, vk));
2740 }
2741
2742 /* Emits the `vmax.b vd, vj, vk` instruction. */
2743 static void __attribute__((unused)) tcg_out_opc_vmax_b(TCGContext *s, TCGReg vd,
2744 TCGReg vj, TCGReg vk)
2745 {
2746 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_B, vd, vj, vk));
2747 }
2748
2749 /* Emits the `vmax.h vd, vj, vk` instruction. */
2750 static void __attribute__((unused)) tcg_out_opc_vmax_h(TCGContext *s, TCGReg vd,
2751 TCGReg vj, TCGReg vk)
2752 {
2753 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_H, vd, vj, vk));
2754 }
2755
2756 /* Emits the `vmax.w vd, vj, vk` instruction. */
2757 static void __attribute__((unused)) tcg_out_opc_vmax_w(TCGContext *s, TCGReg vd,
2758 TCGReg vj, TCGReg vk)
2759 {
2760 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_W, vd, vj, vk));
2761 }
2762
2763 /* Emits the `vmax.d vd, vj, vk` instruction. */
2764 static void __attribute__((unused)) tcg_out_opc_vmax_d(TCGContext *s, TCGReg vd,
2765 TCGReg vj, TCGReg vk)
2766 {
2767 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_D, vd, vj, vk));
2768 }
2769
2770 /* Emits the `vmin.b vd, vj, vk` instruction. */
2771 static void __attribute__((unused)) tcg_out_opc_vmin_b(TCGContext *s, TCGReg vd,
2772 TCGReg vj, TCGReg vk)
2773 {
2774 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_B, vd, vj, vk));
2775 }
2776
2777 /* Emits the `vmin.h vd, vj, vk` instruction. */
2778 static void __attribute__((unused)) tcg_out_opc_vmin_h(TCGContext *s, TCGReg vd,
2779 TCGReg vj, TCGReg vk)
2780 {
2781 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_H, vd, vj, vk));
2782 }
2783
2784 /* Emits the `vmin.w vd, vj, vk` instruction. */
2785 static void __attribute__((unused)) tcg_out_opc_vmin_w(TCGContext *s, TCGReg vd,
2786 TCGReg vj, TCGReg vk)
2787 {
2788 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_W, vd, vj, vk));
2789 }
2790
2791 /* Emits the `vmin.d vd, vj, vk` instruction. */
2792 static void __attribute__((unused)) tcg_out_opc_vmin_d(TCGContext *s, TCGReg vd,
2793 TCGReg vj, TCGReg vk)
2794 {
2795 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_D, vd, vj, vk));
2796 }
2797
2798 /* Emits the `vmax.bu vd, vj, vk` instruction. */
2799 static void __attribute__((unused))
2800 tcg_out_opc_vmax_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2801 {
2802 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_BU, vd, vj, vk));
2803 }
2804
2805 /* Emits the `vmax.hu vd, vj, vk` instruction. */
2806 static void __attribute__((unused))
2807 tcg_out_opc_vmax_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2808 {
2809 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_HU, vd, vj, vk));
2810 }
2811
2812 /* Emits the `vmax.wu vd, vj, vk` instruction. */
2813 static void __attribute__((unused))
2814 tcg_out_opc_vmax_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2815 {
2816 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_WU, vd, vj, vk));
2817 }
2818
2819 /* Emits the `vmax.du vd, vj, vk` instruction. */
2820 static void __attribute__((unused))
2821 tcg_out_opc_vmax_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2822 {
2823 tcg_out32(s, encode_vdvjvk_insn(OPC_VMAX_DU, vd, vj, vk));
2824 }
2825
2826 /* Emits the `vmin.bu vd, vj, vk` instruction. */
2827 static void __attribute__((unused))
2828 tcg_out_opc_vmin_bu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2829 {
2830 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_BU, vd, vj, vk));
2831 }
2832
2833 /* Emits the `vmin.hu vd, vj, vk` instruction. */
2834 static void __attribute__((unused))
2835 tcg_out_opc_vmin_hu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2836 {
2837 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_HU, vd, vj, vk));
2838 }
2839
2840 /* Emits the `vmin.wu vd, vj, vk` instruction. */
2841 static void __attribute__((unused))
2842 tcg_out_opc_vmin_wu(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2843 {
2844 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_WU, vd, vj, vk));
2845 }
2846
2847 /* Emits the `vmin.du vd, vj, vk` instruction. */
2848 static void __attribute__((unused))
2849 tcg_out_opc_vmin_du(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2850 {
2851 tcg_out32(s, encode_vdvjvk_insn(OPC_VMIN_DU, vd, vj, vk));
2852 }
2853
2854 /* Emits the `vmul.b vd, vj, vk` instruction. */
2855 static void __attribute__((unused)) tcg_out_opc_vmul_b(TCGContext *s, TCGReg vd,
2856 TCGReg vj, TCGReg vk)
2857 {
2858 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_B, vd, vj, vk));
2859 }
2860
2861 /* Emits the `vmul.h vd, vj, vk` instruction. */
2862 static void __attribute__((unused)) tcg_out_opc_vmul_h(TCGContext *s, TCGReg vd,
2863 TCGReg vj, TCGReg vk)
2864 {
2865 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_H, vd, vj, vk));
2866 }
2867
2868 /* Emits the `vmul.w vd, vj, vk` instruction. */
2869 static void __attribute__((unused)) tcg_out_opc_vmul_w(TCGContext *s, TCGReg vd,
2870 TCGReg vj, TCGReg vk)
2871 {
2872 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_W, vd, vj, vk));
2873 }
2874
2875 /* Emits the `vmul.d vd, vj, vk` instruction. */
2876 static void __attribute__((unused)) tcg_out_opc_vmul_d(TCGContext *s, TCGReg vd,
2877 TCGReg vj, TCGReg vk)
2878 {
2879 tcg_out32(s, encode_vdvjvk_insn(OPC_VMUL_D, vd, vj, vk));
2880 }
2881
2882 /* Emits the `vsll.b vd, vj, vk` instruction. */
2883 static void __attribute__((unused)) tcg_out_opc_vsll_b(TCGContext *s, TCGReg vd,
2884 TCGReg vj, TCGReg vk)
2885 {
2886 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_B, vd, vj, vk));
2887 }
2888
2889 /* Emits the `vsll.h vd, vj, vk` instruction. */
2890 static void __attribute__((unused)) tcg_out_opc_vsll_h(TCGContext *s, TCGReg vd,
2891 TCGReg vj, TCGReg vk)
2892 {
2893 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_H, vd, vj, vk));
2894 }
2895
2896 /* Emits the `vsll.w vd, vj, vk` instruction. */
2897 static void __attribute__((unused)) tcg_out_opc_vsll_w(TCGContext *s, TCGReg vd,
2898 TCGReg vj, TCGReg vk)
2899 {
2900 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_W, vd, vj, vk));
2901 }
2902
2903 /* Emits the `vsll.d vd, vj, vk` instruction. */
2904 static void __attribute__((unused)) tcg_out_opc_vsll_d(TCGContext *s, TCGReg vd,
2905 TCGReg vj, TCGReg vk)
2906 {
2907 tcg_out32(s, encode_vdvjvk_insn(OPC_VSLL_D, vd, vj, vk));
2908 }
2909
2910 /* Emits the `vsrl.b vd, vj, vk` instruction. */
2911 static void __attribute__((unused)) tcg_out_opc_vsrl_b(TCGContext *s, TCGReg vd,
2912 TCGReg vj, TCGReg vk)
2913 {
2914 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_B, vd, vj, vk));
2915 }
2916
2917 /* Emits the `vsrl.h vd, vj, vk` instruction. */
2918 static void __attribute__((unused)) tcg_out_opc_vsrl_h(TCGContext *s, TCGReg vd,
2919 TCGReg vj, TCGReg vk)
2920 {
2921 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_H, vd, vj, vk));
2922 }
2923
2924 /* Emits the `vsrl.w vd, vj, vk` instruction. */
2925 static void __attribute__((unused)) tcg_out_opc_vsrl_w(TCGContext *s, TCGReg vd,
2926 TCGReg vj, TCGReg vk)
2927 {
2928 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_W, vd, vj, vk));
2929 }
2930
2931 /* Emits the `vsrl.d vd, vj, vk` instruction. */
2932 static void __attribute__((unused)) tcg_out_opc_vsrl_d(TCGContext *s, TCGReg vd,
2933 TCGReg vj, TCGReg vk)
2934 {
2935 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRL_D, vd, vj, vk));
2936 }
2937
2938 /* Emits the `vsra.b vd, vj, vk` instruction. */
2939 static void __attribute__((unused)) tcg_out_opc_vsra_b(TCGContext *s, TCGReg vd,
2940 TCGReg vj, TCGReg vk)
2941 {
2942 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_B, vd, vj, vk));
2943 }
2944
2945 /* Emits the `vsra.h vd, vj, vk` instruction. */
2946 static void __attribute__((unused)) tcg_out_opc_vsra_h(TCGContext *s, TCGReg vd,
2947 TCGReg vj, TCGReg vk)
2948 {
2949 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_H, vd, vj, vk));
2950 }
2951
2952 /* Emits the `vsra.w vd, vj, vk` instruction. */
2953 static void __attribute__((unused)) tcg_out_opc_vsra_w(TCGContext *s, TCGReg vd,
2954 TCGReg vj, TCGReg vk)
2955 {
2956 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_W, vd, vj, vk));
2957 }
2958
2959 /* Emits the `vsra.d vd, vj, vk` instruction. */
2960 static void __attribute__((unused)) tcg_out_opc_vsra_d(TCGContext *s, TCGReg vd,
2961 TCGReg vj, TCGReg vk)
2962 {
2963 tcg_out32(s, encode_vdvjvk_insn(OPC_VSRA_D, vd, vj, vk));
2964 }
2965
2966 /* Emits the `vrotr.b vd, vj, vk` instruction. */
2967 static void __attribute__((unused))
2968 tcg_out_opc_vrotr_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2969 {
2970 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_B, vd, vj, vk));
2971 }
2972
2973 /* Emits the `vrotr.h vd, vj, vk` instruction. */
2974 static void __attribute__((unused))
2975 tcg_out_opc_vrotr_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2976 {
2977 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_H, vd, vj, vk));
2978 }
2979
2980 /* Emits the `vrotr.w vd, vj, vk` instruction. */
2981 static void __attribute__((unused))
2982 tcg_out_opc_vrotr_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2983 {
2984 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_W, vd, vj, vk));
2985 }
2986
2987 /* Emits the `vrotr.d vd, vj, vk` instruction. */
2988 static void __attribute__((unused))
2989 tcg_out_opc_vrotr_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
2990 {
2991 tcg_out32(s, encode_vdvjvk_insn(OPC_VROTR_D, vd, vj, vk));
2992 }
2993
2994 /* Emits the `vreplve.b vd, vj, k` instruction. */
2995 static void __attribute__((unused))
2996 tcg_out_opc_vreplve_b(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
2997 {
2998 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_B, vd, vj, k));
2999 }
3000
3001 /* Emits the `vreplve.h vd, vj, k` instruction. */
3002 static void __attribute__((unused))
3003 tcg_out_opc_vreplve_h(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
3004 {
3005 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_H, vd, vj, k));
3006 }
3007
3008 /* Emits the `vreplve.w vd, vj, k` instruction. */
3009 static void __attribute__((unused))
3010 tcg_out_opc_vreplve_w(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
3011 {
3012 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_W, vd, vj, k));
3013 }
3014
3015 /* Emits the `vreplve.d vd, vj, k` instruction. */
3016 static void __attribute__((unused))
3017 tcg_out_opc_vreplve_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg k)
3018 {
3019 tcg_out32(s, encode_vdvjk_insn(OPC_VREPLVE_D, vd, vj, k));
3020 }
3021
3022 /* Emits the `vand.v vd, vj, vk` instruction. */
3023 static void __attribute__((unused)) tcg_out_opc_vand_v(TCGContext *s, TCGReg vd,
3024 TCGReg vj, TCGReg vk)
3025 {
3026 tcg_out32(s, encode_vdvjvk_insn(OPC_VAND_V, vd, vj, vk));
3027 }
3028
3029 /* Emits the `vor.v vd, vj, vk` instruction. */
3030 static void __attribute__((unused)) tcg_out_opc_vor_v(TCGContext *s, TCGReg vd,
3031 TCGReg vj, TCGReg vk)
3032 {
3033 tcg_out32(s, encode_vdvjvk_insn(OPC_VOR_V, vd, vj, vk));
3034 }
3035
3036 /* Emits the `vxor.v vd, vj, vk` instruction. */
3037 static void __attribute__((unused)) tcg_out_opc_vxor_v(TCGContext *s, TCGReg vd,
3038 TCGReg vj, TCGReg vk)
3039 {
3040 tcg_out32(s, encode_vdvjvk_insn(OPC_VXOR_V, vd, vj, vk));
3041 }
3042
3043 /* Emits the `vnor.v vd, vj, vk` instruction. */
3044 static void __attribute__((unused)) tcg_out_opc_vnor_v(TCGContext *s, TCGReg vd,
3045 TCGReg vj, TCGReg vk)
3046 {
3047 tcg_out32(s, encode_vdvjvk_insn(OPC_VNOR_V, vd, vj, vk));
3048 }
3049
3050 /* Emits the `vandn.v vd, vj, vk` instruction. */
3051 static void __attribute__((unused))
3052 tcg_out_opc_vandn_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk)
3053 {
3054 tcg_out32(s, encode_vdvjvk_insn(OPC_VANDN_V, vd, vj, vk));
3055 }
3056
3057 /* Emits the `vorn.v vd, vj, vk` instruction. */
3058 static void __attribute__((unused)) tcg_out_opc_vorn_v(TCGContext *s, TCGReg vd,
3059 TCGReg vj, TCGReg vk)
3060 {
3061 tcg_out32(s, encode_vdvjvk_insn(OPC_VORN_V, vd, vj, vk));
3062 }
3063
3064 /* Emits the `vseqi.b vd, vj, sk5` instruction. */
3065 static void __attribute__((unused))
3066 tcg_out_opc_vseqi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3067 {
3068 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_B, vd, vj, sk5));
3069 }
3070
3071 /* Emits the `vseqi.h vd, vj, sk5` instruction. */
3072 static void __attribute__((unused))
3073 tcg_out_opc_vseqi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3074 {
3075 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_H, vd, vj, sk5));
3076 }
3077
3078 /* Emits the `vseqi.w vd, vj, sk5` instruction. */
3079 static void __attribute__((unused))
3080 tcg_out_opc_vseqi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3081 {
3082 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_W, vd, vj, sk5));
3083 }
3084
3085 /* Emits the `vseqi.d vd, vj, sk5` instruction. */
3086 static void __attribute__((unused))
3087 tcg_out_opc_vseqi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3088 {
3089 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSEQI_D, vd, vj, sk5));
3090 }
3091
3092 /* Emits the `vslei.b vd, vj, sk5` instruction. */
3093 static void __attribute__((unused))
3094 tcg_out_opc_vslei_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3095 {
3096 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_B, vd, vj, sk5));
3097 }
3098
3099 /* Emits the `vslei.h vd, vj, sk5` instruction. */
3100 static void __attribute__((unused))
3101 tcg_out_opc_vslei_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3102 {
3103 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_H, vd, vj, sk5));
3104 }
3105
3106 /* Emits the `vslei.w vd, vj, sk5` instruction. */
3107 static void __attribute__((unused))
3108 tcg_out_opc_vslei_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3109 {
3110 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_W, vd, vj, sk5));
3111 }
3112
3113 /* Emits the `vslei.d vd, vj, sk5` instruction. */
3114 static void __attribute__((unused))
3115 tcg_out_opc_vslei_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3116 {
3117 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLEI_D, vd, vj, sk5));
3118 }
3119
3120 /* Emits the `vslei.bu vd, vj, uk5` instruction. */
3121 static void __attribute__((unused))
3122 tcg_out_opc_vslei_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3123 {
3124 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_BU, vd, vj, uk5));
3125 }
3126
3127 /* Emits the `vslei.hu vd, vj, uk5` instruction. */
3128 static void __attribute__((unused))
3129 tcg_out_opc_vslei_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3130 {
3131 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_HU, vd, vj, uk5));
3132 }
3133
3134 /* Emits the `vslei.wu vd, vj, uk5` instruction. */
3135 static void __attribute__((unused))
3136 tcg_out_opc_vslei_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3137 {
3138 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_WU, vd, vj, uk5));
3139 }
3140
3141 /* Emits the `vslei.du vd, vj, uk5` instruction. */
3142 static void __attribute__((unused))
3143 tcg_out_opc_vslei_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3144 {
3145 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLEI_DU, vd, vj, uk5));
3146 }
3147
3148 /* Emits the `vslti.b vd, vj, sk5` instruction. */
3149 static void __attribute__((unused))
3150 tcg_out_opc_vslti_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3151 {
3152 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_B, vd, vj, sk5));
3153 }
3154
3155 /* Emits the `vslti.h vd, vj, sk5` instruction. */
3156 static void __attribute__((unused))
3157 tcg_out_opc_vslti_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3158 {
3159 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_H, vd, vj, sk5));
3160 }
3161
3162 /* Emits the `vslti.w vd, vj, sk5` instruction. */
3163 static void __attribute__((unused))
3164 tcg_out_opc_vslti_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3165 {
3166 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_W, vd, vj, sk5));
3167 }
3168
3169 /* Emits the `vslti.d vd, vj, sk5` instruction. */
3170 static void __attribute__((unused))
3171 tcg_out_opc_vslti_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3172 {
3173 tcg_out32(s, encode_vdvjsk5_insn(OPC_VSLTI_D, vd, vj, sk5));
3174 }
3175
3176 /* Emits the `vslti.bu vd, vj, uk5` instruction. */
3177 static void __attribute__((unused))
3178 tcg_out_opc_vslti_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3179 {
3180 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_BU, vd, vj, uk5));
3181 }
3182
3183 /* Emits the `vslti.hu vd, vj, uk5` instruction. */
3184 static void __attribute__((unused))
3185 tcg_out_opc_vslti_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3186 {
3187 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_HU, vd, vj, uk5));
3188 }
3189
3190 /* Emits the `vslti.wu vd, vj, uk5` instruction. */
3191 static void __attribute__((unused))
3192 tcg_out_opc_vslti_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3193 {
3194 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_WU, vd, vj, uk5));
3195 }
3196
3197 /* Emits the `vslti.du vd, vj, uk5` instruction. */
3198 static void __attribute__((unused))
3199 tcg_out_opc_vslti_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3200 {
3201 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLTI_DU, vd, vj, uk5));
3202 }
3203
3204 /* Emits the `vaddi.bu vd, vj, uk5` instruction. */
3205 static void __attribute__((unused))
3206 tcg_out_opc_vaddi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3207 {
3208 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_BU, vd, vj, uk5));
3209 }
3210
3211 /* Emits the `vaddi.hu vd, vj, uk5` instruction. */
3212 static void __attribute__((unused))
3213 tcg_out_opc_vaddi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3214 {
3215 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_HU, vd, vj, uk5));
3216 }
3217
3218 /* Emits the `vaddi.wu vd, vj, uk5` instruction. */
3219 static void __attribute__((unused))
3220 tcg_out_opc_vaddi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3221 {
3222 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_WU, vd, vj, uk5));
3223 }
3224
3225 /* Emits the `vaddi.du vd, vj, uk5` instruction. */
3226 static void __attribute__((unused))
3227 tcg_out_opc_vaddi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3228 {
3229 tcg_out32(s, encode_vdvjuk5_insn(OPC_VADDI_DU, vd, vj, uk5));
3230 }
3231
3232 /* Emits the `vsubi.bu vd, vj, uk5` instruction. */
3233 static void __attribute__((unused))
3234 tcg_out_opc_vsubi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3235 {
3236 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_BU, vd, vj, uk5));
3237 }
3238
3239 /* Emits the `vsubi.hu vd, vj, uk5` instruction. */
3240 static void __attribute__((unused))
3241 tcg_out_opc_vsubi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3242 {
3243 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_HU, vd, vj, uk5));
3244 }
3245
3246 /* Emits the `vsubi.wu vd, vj, uk5` instruction. */
3247 static void __attribute__((unused))
3248 tcg_out_opc_vsubi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3249 {
3250 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_WU, vd, vj, uk5));
3251 }
3252
3253 /* Emits the `vsubi.du vd, vj, uk5` instruction. */
3254 static void __attribute__((unused))
3255 tcg_out_opc_vsubi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3256 {
3257 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSUBI_DU, vd, vj, uk5));
3258 }
3259
3260 /* Emits the `vmaxi.b vd, vj, sk5` instruction. */
3261 static void __attribute__((unused))
3262 tcg_out_opc_vmaxi_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3263 {
3264 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_B, vd, vj, sk5));
3265 }
3266
3267 /* Emits the `vmaxi.h vd, vj, sk5` instruction. */
3268 static void __attribute__((unused))
3269 tcg_out_opc_vmaxi_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3270 {
3271 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_H, vd, vj, sk5));
3272 }
3273
3274 /* Emits the `vmaxi.w vd, vj, sk5` instruction. */
3275 static void __attribute__((unused))
3276 tcg_out_opc_vmaxi_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3277 {
3278 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_W, vd, vj, sk5));
3279 }
3280
3281 /* Emits the `vmaxi.d vd, vj, sk5` instruction. */
3282 static void __attribute__((unused))
3283 tcg_out_opc_vmaxi_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3284 {
3285 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMAXI_D, vd, vj, sk5));
3286 }
3287
3288 /* Emits the `vmini.b vd, vj, sk5` instruction. */
3289 static void __attribute__((unused))
3290 tcg_out_opc_vmini_b(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3291 {
3292 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_B, vd, vj, sk5));
3293 }
3294
3295 /* Emits the `vmini.h vd, vj, sk5` instruction. */
3296 static void __attribute__((unused))
3297 tcg_out_opc_vmini_h(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3298 {
3299 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_H, vd, vj, sk5));
3300 }
3301
3302 /* Emits the `vmini.w vd, vj, sk5` instruction. */
3303 static void __attribute__((unused))
3304 tcg_out_opc_vmini_w(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3305 {
3306 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_W, vd, vj, sk5));
3307 }
3308
3309 /* Emits the `vmini.d vd, vj, sk5` instruction. */
3310 static void __attribute__((unused))
3311 tcg_out_opc_vmini_d(TCGContext *s, TCGReg vd, TCGReg vj, int32_t sk5)
3312 {
3313 tcg_out32(s, encode_vdvjsk5_insn(OPC_VMINI_D, vd, vj, sk5));
3314 }
3315
3316 /* Emits the `vmaxi.bu vd, vj, uk5` instruction. */
3317 static void __attribute__((unused))
3318 tcg_out_opc_vmaxi_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3319 {
3320 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_BU, vd, vj, uk5));
3321 }
3322
3323 /* Emits the `vmaxi.hu vd, vj, uk5` instruction. */
3324 static void __attribute__((unused))
3325 tcg_out_opc_vmaxi_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3326 {
3327 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_HU, vd, vj, uk5));
3328 }
3329
3330 /* Emits the `vmaxi.wu vd, vj, uk5` instruction. */
3331 static void __attribute__((unused))
3332 tcg_out_opc_vmaxi_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3333 {
3334 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_WU, vd, vj, uk5));
3335 }
3336
3337 /* Emits the `vmaxi.du vd, vj, uk5` instruction. */
3338 static void __attribute__((unused))
3339 tcg_out_opc_vmaxi_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3340 {
3341 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMAXI_DU, vd, vj, uk5));
3342 }
3343
3344 /* Emits the `vmini.bu vd, vj, uk5` instruction. */
3345 static void __attribute__((unused))
3346 tcg_out_opc_vmini_bu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3347 {
3348 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_BU, vd, vj, uk5));
3349 }
3350
3351 /* Emits the `vmini.hu vd, vj, uk5` instruction. */
3352 static void __attribute__((unused))
3353 tcg_out_opc_vmini_hu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3354 {
3355 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_HU, vd, vj, uk5));
3356 }
3357
3358 /* Emits the `vmini.wu vd, vj, uk5` instruction. */
3359 static void __attribute__((unused))
3360 tcg_out_opc_vmini_wu(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3361 {
3362 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_WU, vd, vj, uk5));
3363 }
3364
3365 /* Emits the `vmini.du vd, vj, uk5` instruction. */
3366 static void __attribute__((unused))
3367 tcg_out_opc_vmini_du(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3368 {
3369 tcg_out32(s, encode_vdvjuk5_insn(OPC_VMINI_DU, vd, vj, uk5));
3370 }
3371
3372 /* Emits the `vneg.b vd, vj` instruction. */
3373 static void __attribute__((unused)) tcg_out_opc_vneg_b(TCGContext *s, TCGReg vd,
3374 TCGReg vj)
3375 {
3376 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_B, vd, vj));
3377 }
3378
3379 /* Emits the `vneg.h vd, vj` instruction. */
3380 static void __attribute__((unused)) tcg_out_opc_vneg_h(TCGContext *s, TCGReg vd,
3381 TCGReg vj)
3382 {
3383 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_H, vd, vj));
3384 }
3385
3386 /* Emits the `vneg.w vd, vj` instruction. */
3387 static void __attribute__((unused)) tcg_out_opc_vneg_w(TCGContext *s, TCGReg vd,
3388 TCGReg vj)
3389 {
3390 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_W, vd, vj));
3391 }
3392
3393 /* Emits the `vneg.d vd, vj` instruction. */
3394 static void __attribute__((unused)) tcg_out_opc_vneg_d(TCGContext *s, TCGReg vd,
3395 TCGReg vj)
3396 {
3397 tcg_out32(s, encode_vdvj_insn(OPC_VNEG_D, vd, vj));
3398 }
3399
3400 /* Emits the `vreplgr2vr.b vd, j` instruction. */
3401 static void __attribute__((unused))
3402 tcg_out_opc_vreplgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j)
3403 {
3404 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_B, vd, j));
3405 }
3406
3407 /* Emits the `vreplgr2vr.h vd, j` instruction. */
3408 static void __attribute__((unused))
3409 tcg_out_opc_vreplgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j)
3410 {
3411 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_H, vd, j));
3412 }
3413
3414 /* Emits the `vreplgr2vr.w vd, j` instruction. */
3415 static void __attribute__((unused))
3416 tcg_out_opc_vreplgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j)
3417 {
3418 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_W, vd, j));
3419 }
3420
3421 /* Emits the `vreplgr2vr.d vd, j` instruction. */
3422 static void __attribute__((unused))
3423 tcg_out_opc_vreplgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j)
3424 {
3425 tcg_out32(s, encode_vdj_insn(OPC_VREPLGR2VR_D, vd, j));
3426 }
3427
3428 /* Emits the `vrotri.b vd, vj, uk3` instruction. */
3429 static void __attribute__((unused))
3430 tcg_out_opc_vrotri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3431 {
3432 tcg_out32(s, encode_vdvjuk3_insn(OPC_VROTRI_B, vd, vj, uk3));
3433 }
3434
3435 /* Emits the `vrotri.h vd, vj, uk4` instruction. */
3436 static void __attribute__((unused))
3437 tcg_out_opc_vrotri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3438 {
3439 tcg_out32(s, encode_vdvjuk4_insn(OPC_VROTRI_H, vd, vj, uk4));
3440 }
3441
3442 /* Emits the `vrotri.w vd, vj, uk5` instruction. */
3443 static void __attribute__((unused))
3444 tcg_out_opc_vrotri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3445 {
3446 tcg_out32(s, encode_vdvjuk5_insn(OPC_VROTRI_W, vd, vj, uk5));
3447 }
3448
3449 /* Emits the `vrotri.d vd, vj, uk6` instruction. */
3450 static void __attribute__((unused))
3451 tcg_out_opc_vrotri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3452 {
3453 tcg_out32(s, encode_vdvjuk6_insn(OPC_VROTRI_D, vd, vj, uk6));
3454 }
3455
3456 /* Emits the `vinsgr2vr.b vd, j, uk4` instruction. */
3457 static void __attribute__((unused))
3458 tcg_out_opc_vinsgr2vr_b(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk4)
3459 {
3460 tcg_out32(s, encode_vdjuk4_insn(OPC_VINSGR2VR_B, vd, j, uk4));
3461 }
3462
3463 /* Emits the `vinsgr2vr.h vd, j, uk3` instruction. */
3464 static void __attribute__((unused))
3465 tcg_out_opc_vinsgr2vr_h(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk3)
3466 {
3467 tcg_out32(s, encode_vdjuk3_insn(OPC_VINSGR2VR_H, vd, j, uk3));
3468 }
3469
3470 /* Emits the `vinsgr2vr.w vd, j, uk2` instruction. */
3471 static void __attribute__((unused))
3472 tcg_out_opc_vinsgr2vr_w(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk2)
3473 {
3474 tcg_out32(s, encode_vdjuk2_insn(OPC_VINSGR2VR_W, vd, j, uk2));
3475 }
3476
3477 /* Emits the `vinsgr2vr.d vd, j, uk1` instruction. */
3478 static void __attribute__((unused))
3479 tcg_out_opc_vinsgr2vr_d(TCGContext *s, TCGReg vd, TCGReg j, uint32_t uk1)
3480 {
3481 tcg_out32(s, encode_vdjuk1_insn(OPC_VINSGR2VR_D, vd, j, uk1));
3482 }
3483
3484 /* Emits the `vpickve2gr.b d, vj, uk4` instruction. */
3485 static void __attribute__((unused))
3486 tcg_out_opc_vpickve2gr_b(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4)
3487 {
3488 tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_B, d, vj, uk4));
3489 }
3490
3491 /* Emits the `vpickve2gr.h d, vj, uk3` instruction. */
3492 static void __attribute__((unused))
3493 tcg_out_opc_vpickve2gr_h(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3)
3494 {
3495 tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_H, d, vj, uk3));
3496 }
3497
3498 /* Emits the `vpickve2gr.w d, vj, uk2` instruction. */
3499 static void __attribute__((unused))
3500 tcg_out_opc_vpickve2gr_w(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2)
3501 {
3502 tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_W, d, vj, uk2));
3503 }
3504
3505 /* Emits the `vpickve2gr.d d, vj, uk1` instruction. */
3506 static void __attribute__((unused))
3507 tcg_out_opc_vpickve2gr_d(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1)
3508 {
3509 tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_D, d, vj, uk1));
3510 }
3511
3512 /* Emits the `vpickve2gr.bu d, vj, uk4` instruction. */
3513 static void __attribute__((unused))
3514 tcg_out_opc_vpickve2gr_bu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk4)
3515 {
3516 tcg_out32(s, encode_dvjuk4_insn(OPC_VPICKVE2GR_BU, d, vj, uk4));
3517 }
3518
3519 /* Emits the `vpickve2gr.hu d, vj, uk3` instruction. */
3520 static void __attribute__((unused))
3521 tcg_out_opc_vpickve2gr_hu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk3)
3522 {
3523 tcg_out32(s, encode_dvjuk3_insn(OPC_VPICKVE2GR_HU, d, vj, uk3));
3524 }
3525
3526 /* Emits the `vpickve2gr.wu d, vj, uk2` instruction. */
3527 static void __attribute__((unused))
3528 tcg_out_opc_vpickve2gr_wu(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk2)
3529 {
3530 tcg_out32(s, encode_dvjuk2_insn(OPC_VPICKVE2GR_WU, d, vj, uk2));
3531 }
3532
3533 /* Emits the `vpickve2gr.du d, vj, uk1` instruction. */
3534 static void __attribute__((unused))
3535 tcg_out_opc_vpickve2gr_du(TCGContext *s, TCGReg d, TCGReg vj, uint32_t uk1)
3536 {
3537 tcg_out32(s, encode_dvjuk1_insn(OPC_VPICKVE2GR_DU, d, vj, uk1));
3538 }
3539
3540 /* Emits the `vreplvei.b vd, vj, uk4` instruction. */
3541 static void __attribute__((unused))
3542 tcg_out_opc_vreplvei_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3543 {
3544 tcg_out32(s, encode_vdvjuk4_insn(OPC_VREPLVEI_B, vd, vj, uk4));
3545 }
3546
3547 /* Emits the `vreplvei.h vd, vj, uk3` instruction. */
3548 static void __attribute__((unused))
3549 tcg_out_opc_vreplvei_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3550 {
3551 tcg_out32(s, encode_vdvjuk3_insn(OPC_VREPLVEI_H, vd, vj, uk3));
3552 }
3553
3554 /* Emits the `vreplvei.w vd, vj, uk2` instruction. */
3555 static void __attribute__((unused))
3556 tcg_out_opc_vreplvei_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk2)
3557 {
3558 tcg_out32(s, encode_vdvjuk2_insn(OPC_VREPLVEI_W, vd, vj, uk2));
3559 }
3560
3561 /* Emits the `vreplvei.d vd, vj, uk1` instruction. */
3562 static void __attribute__((unused))
3563 tcg_out_opc_vreplvei_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk1)
3564 {
3565 tcg_out32(s, encode_vdvjuk1_insn(OPC_VREPLVEI_D, vd, vj, uk1));
3566 }
3567
3568 /* Emits the `vbitclri.b vd, vj, uk3` instruction. */
3569 static void __attribute__((unused))
3570 tcg_out_opc_vbitclri_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3571 {
3572 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITCLRI_B, vd, vj, uk3));
3573 }
3574
3575 /* Emits the `vbitclri.h vd, vj, uk4` instruction. */
3576 static void __attribute__((unused))
3577 tcg_out_opc_vbitclri_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3578 {
3579 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITCLRI_H, vd, vj, uk4));
3580 }
3581
3582 /* Emits the `vbitclri.w vd, vj, uk5` instruction. */
3583 static void __attribute__((unused))
3584 tcg_out_opc_vbitclri_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3585 {
3586 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITCLRI_W, vd, vj, uk5));
3587 }
3588
3589 /* Emits the `vbitclri.d vd, vj, uk6` instruction. */
3590 static void __attribute__((unused))
3591 tcg_out_opc_vbitclri_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3592 {
3593 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITCLRI_D, vd, vj, uk6));
3594 }
3595
3596 /* Emits the `vbitseti.b vd, vj, uk3` instruction. */
3597 static void __attribute__((unused))
3598 tcg_out_opc_vbitseti_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3599 {
3600 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITSETI_B, vd, vj, uk3));
3601 }
3602
3603 /* Emits the `vbitseti.h vd, vj, uk4` instruction. */
3604 static void __attribute__((unused))
3605 tcg_out_opc_vbitseti_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3606 {
3607 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITSETI_H, vd, vj, uk4));
3608 }
3609
3610 /* Emits the `vbitseti.w vd, vj, uk5` instruction. */
3611 static void __attribute__((unused))
3612 tcg_out_opc_vbitseti_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3613 {
3614 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITSETI_W, vd, vj, uk5));
3615 }
3616
3617 /* Emits the `vbitseti.d vd, vj, uk6` instruction. */
3618 static void __attribute__((unused))
3619 tcg_out_opc_vbitseti_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3620 {
3621 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITSETI_D, vd, vj, uk6));
3622 }
3623
3624 /* Emits the `vbitrevi.b vd, vj, uk3` instruction. */
3625 static void __attribute__((unused))
3626 tcg_out_opc_vbitrevi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3627 {
3628 tcg_out32(s, encode_vdvjuk3_insn(OPC_VBITREVI_B, vd, vj, uk3));
3629 }
3630
3631 /* Emits the `vbitrevi.h vd, vj, uk4` instruction. */
3632 static void __attribute__((unused))
3633 tcg_out_opc_vbitrevi_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3634 {
3635 tcg_out32(s, encode_vdvjuk4_insn(OPC_VBITREVI_H, vd, vj, uk4));
3636 }
3637
3638 /* Emits the `vbitrevi.w vd, vj, uk5` instruction. */
3639 static void __attribute__((unused))
3640 tcg_out_opc_vbitrevi_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3641 {
3642 tcg_out32(s, encode_vdvjuk5_insn(OPC_VBITREVI_W, vd, vj, uk5));
3643 }
3644
3645 /* Emits the `vbitrevi.d vd, vj, uk6` instruction. */
3646 static void __attribute__((unused))
3647 tcg_out_opc_vbitrevi_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3648 {
3649 tcg_out32(s, encode_vdvjuk6_insn(OPC_VBITREVI_D, vd, vj, uk6));
3650 }
3651
3652 /* Emits the `vslli.b vd, vj, uk3` instruction. */
3653 static void __attribute__((unused))
3654 tcg_out_opc_vslli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3655 {
3656 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSLLI_B, vd, vj, uk3));
3657 }
3658
3659 /* Emits the `vslli.h vd, vj, uk4` instruction. */
3660 static void __attribute__((unused))
3661 tcg_out_opc_vslli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3662 {
3663 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSLLI_H, vd, vj, uk4));
3664 }
3665
3666 /* Emits the `vslli.w vd, vj, uk5` instruction. */
3667 static void __attribute__((unused))
3668 tcg_out_opc_vslli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3669 {
3670 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSLLI_W, vd, vj, uk5));
3671 }
3672
3673 /* Emits the `vslli.d vd, vj, uk6` instruction. */
3674 static void __attribute__((unused))
3675 tcg_out_opc_vslli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3676 {
3677 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSLLI_D, vd, vj, uk6));
3678 }
3679
3680 /* Emits the `vsrli.b vd, vj, uk3` instruction. */
3681 static void __attribute__((unused))
3682 tcg_out_opc_vsrli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3683 {
3684 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRLI_B, vd, vj, uk3));
3685 }
3686
3687 /* Emits the `vsrli.h vd, vj, uk4` instruction. */
3688 static void __attribute__((unused))
3689 tcg_out_opc_vsrli_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3690 {
3691 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRLI_H, vd, vj, uk4));
3692 }
3693
3694 /* Emits the `vsrli.w vd, vj, uk5` instruction. */
3695 static void __attribute__((unused))
3696 tcg_out_opc_vsrli_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3697 {
3698 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRLI_W, vd, vj, uk5));
3699 }
3700
3701 /* Emits the `vsrli.d vd, vj, uk6` instruction. */
3702 static void __attribute__((unused))
3703 tcg_out_opc_vsrli_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3704 {
3705 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRLI_D, vd, vj, uk6));
3706 }
3707
3708 /* Emits the `vsrai.b vd, vj, uk3` instruction. */
3709 static void __attribute__((unused))
3710 tcg_out_opc_vsrai_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk3)
3711 {
3712 tcg_out32(s, encode_vdvjuk3_insn(OPC_VSRAI_B, vd, vj, uk3));
3713 }
3714
3715 /* Emits the `vsrai.h vd, vj, uk4` instruction. */
3716 static void __attribute__((unused))
3717 tcg_out_opc_vsrai_h(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk4)
3718 {
3719 tcg_out32(s, encode_vdvjuk4_insn(OPC_VSRAI_H, vd, vj, uk4));
3720 }
3721
3722 /* Emits the `vsrai.w vd, vj, uk5` instruction. */
3723 static void __attribute__((unused))
3724 tcg_out_opc_vsrai_w(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk5)
3725 {
3726 tcg_out32(s, encode_vdvjuk5_insn(OPC_VSRAI_W, vd, vj, uk5));
3727 }
3728
3729 /* Emits the `vsrai.d vd, vj, uk6` instruction. */
3730 static void __attribute__((unused))
3731 tcg_out_opc_vsrai_d(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk6)
3732 {
3733 tcg_out32(s, encode_vdvjuk6_insn(OPC_VSRAI_D, vd, vj, uk6));
3734 }
3735
3736 /* Emits the `vbitseli.b vd, vj, uk8` instruction. */
3737 static void __attribute__((unused))
3738 tcg_out_opc_vbitseli_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
3739 {
3740 tcg_out32(s, encode_vdvjuk8_insn(OPC_VBITSELI_B, vd, vj, uk8));
3741 }
3742
3743 /* Emits the `vandi.b vd, vj, uk8` instruction. */
3744 static void __attribute__((unused))
3745 tcg_out_opc_vandi_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
3746 {
3747 tcg_out32(s, encode_vdvjuk8_insn(OPC_VANDI_B, vd, vj, uk8));
3748 }
3749
3750 /* Emits the `vori.b vd, vj, uk8` instruction. */
3751 static void __attribute__((unused)) tcg_out_opc_vori_b(TCGContext *s, TCGReg vd,
3752 TCGReg vj, uint32_t uk8)
3753 {
3754 tcg_out32(s, encode_vdvjuk8_insn(OPC_VORI_B, vd, vj, uk8));
3755 }
3756
3757 /* Emits the `vxori.b vd, vj, uk8` instruction. */
3758 static void __attribute__((unused))
3759 tcg_out_opc_vxori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
3760 {
3761 tcg_out32(s, encode_vdvjuk8_insn(OPC_VXORI_B, vd, vj, uk8));
3762 }
3763
3764 /* Emits the `vnori.b vd, vj, uk8` instruction. */
3765 static void __attribute__((unused))
3766 tcg_out_opc_vnori_b(TCGContext *s, TCGReg vd, TCGReg vj, uint32_t uk8)
3767 {
3768 tcg_out32(s, encode_vdvjuk8_insn(OPC_VNORI_B, vd, vj, uk8));
3769 }
3770
3771 /* Emits the `vldi vd, sj13` instruction. */
3772 static void __attribute__((unused)) tcg_out_opc_vldi(TCGContext *s, TCGReg vd,
3773 int32_t sj13)
3774 {
3775 tcg_out32(s, encode_vdsj13_insn(OPC_VLDI, vd, sj13));
3776 }
3777
3778 /* Emits the `xvseq.b xd, xj, xk` instruction. */
3779 static void __attribute__((unused))
3780 tcg_out_opc_xvseq_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3781 {
3782 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_B, xd, xj, xk));
3783 }
3784
3785 /* Emits the `xvseq.h xd, xj, xk` instruction. */
3786 static void __attribute__((unused))
3787 tcg_out_opc_xvseq_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3788 {
3789 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_H, xd, xj, xk));
3790 }
3791
3792 /* Emits the `xvseq.w xd, xj, xk` instruction. */
3793 static void __attribute__((unused))
3794 tcg_out_opc_xvseq_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3795 {
3796 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_W, xd, xj, xk));
3797 }
3798
3799 /* Emits the `xvseq.d xd, xj, xk` instruction. */
3800 static void __attribute__((unused))
3801 tcg_out_opc_xvseq_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3802 {
3803 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSEQ_D, xd, xj, xk));
3804 }
3805
3806 /* Emits the `xvsle.b xd, xj, xk` instruction. */
3807 static void __attribute__((unused))
3808 tcg_out_opc_xvsle_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3809 {
3810 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_B, xd, xj, xk));
3811 }
3812
3813 /* Emits the `xvsle.h xd, xj, xk` instruction. */
3814 static void __attribute__((unused))
3815 tcg_out_opc_xvsle_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3816 {
3817 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_H, xd, xj, xk));
3818 }
3819
3820 /* Emits the `xvsle.w xd, xj, xk` instruction. */
3821 static void __attribute__((unused))
3822 tcg_out_opc_xvsle_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3823 {
3824 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_W, xd, xj, xk));
3825 }
3826
3827 /* Emits the `xvsle.d xd, xj, xk` instruction. */
3828 static void __attribute__((unused))
3829 tcg_out_opc_xvsle_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3830 {
3831 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_D, xd, xj, xk));
3832 }
3833
3834 /* Emits the `xvsle.bu xd, xj, xk` instruction. */
3835 static void __attribute__((unused))
3836 tcg_out_opc_xvsle_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3837 {
3838 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_BU, xd, xj, xk));
3839 }
3840
3841 /* Emits the `xvsle.hu xd, xj, xk` instruction. */
3842 static void __attribute__((unused))
3843 tcg_out_opc_xvsle_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3844 {
3845 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_HU, xd, xj, xk));
3846 }
3847
3848 /* Emits the `xvsle.wu xd, xj, xk` instruction. */
3849 static void __attribute__((unused))
3850 tcg_out_opc_xvsle_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3851 {
3852 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_WU, xd, xj, xk));
3853 }
3854
3855 /* Emits the `xvsle.du xd, xj, xk` instruction. */
3856 static void __attribute__((unused))
3857 tcg_out_opc_xvsle_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3858 {
3859 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLE_DU, xd, xj, xk));
3860 }
3861
3862 /* Emits the `xvslt.b xd, xj, xk` instruction. */
3863 static void __attribute__((unused))
3864 tcg_out_opc_xvslt_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3865 {
3866 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_B, xd, xj, xk));
3867 }
3868
3869 /* Emits the `xvslt.h xd, xj, xk` instruction. */
3870 static void __attribute__((unused))
3871 tcg_out_opc_xvslt_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3872 {
3873 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_H, xd, xj, xk));
3874 }
3875
3876 /* Emits the `xvslt.w xd, xj, xk` instruction. */
3877 static void __attribute__((unused))
3878 tcg_out_opc_xvslt_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3879 {
3880 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_W, xd, xj, xk));
3881 }
3882
3883 /* Emits the `xvslt.d xd, xj, xk` instruction. */
3884 static void __attribute__((unused))
3885 tcg_out_opc_xvslt_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3886 {
3887 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_D, xd, xj, xk));
3888 }
3889
3890 /* Emits the `xvslt.bu xd, xj, xk` instruction. */
3891 static void __attribute__((unused))
3892 tcg_out_opc_xvslt_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3893 {
3894 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_BU, xd, xj, xk));
3895 }
3896
3897 /* Emits the `xvslt.hu xd, xj, xk` instruction. */
3898 static void __attribute__((unused))
3899 tcg_out_opc_xvslt_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3900 {
3901 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_HU, xd, xj, xk));
3902 }
3903
3904 /* Emits the `xvslt.wu xd, xj, xk` instruction. */
3905 static void __attribute__((unused))
3906 tcg_out_opc_xvslt_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3907 {
3908 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_WU, xd, xj, xk));
3909 }
3910
3911 /* Emits the `xvslt.du xd, xj, xk` instruction. */
3912 static void __attribute__((unused))
3913 tcg_out_opc_xvslt_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3914 {
3915 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLT_DU, xd, xj, xk));
3916 }
3917
3918 /* Emits the `xvadd.b xd, xj, xk` instruction. */
3919 static void __attribute__((unused))
3920 tcg_out_opc_xvadd_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3921 {
3922 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_B, xd, xj, xk));
3923 }
3924
3925 /* Emits the `xvadd.h xd, xj, xk` instruction. */
3926 static void __attribute__((unused))
3927 tcg_out_opc_xvadd_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3928 {
3929 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_H, xd, xj, xk));
3930 }
3931
3932 /* Emits the `xvadd.w xd, xj, xk` instruction. */
3933 static void __attribute__((unused))
3934 tcg_out_opc_xvadd_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3935 {
3936 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_W, xd, xj, xk));
3937 }
3938
3939 /* Emits the `xvadd.d xd, xj, xk` instruction. */
3940 static void __attribute__((unused))
3941 tcg_out_opc_xvadd_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3942 {
3943 tcg_out32(s, encode_xdxjxk_insn(OPC_XVADD_D, xd, xj, xk));
3944 }
3945
3946 /* Emits the `xvsub.b xd, xj, xk` instruction. */
3947 static void __attribute__((unused))
3948 tcg_out_opc_xvsub_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3949 {
3950 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_B, xd, xj, xk));
3951 }
3952
3953 /* Emits the `xvsub.h xd, xj, xk` instruction. */
3954 static void __attribute__((unused))
3955 tcg_out_opc_xvsub_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3956 {
3957 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_H, xd, xj, xk));
3958 }
3959
3960 /* Emits the `xvsub.w xd, xj, xk` instruction. */
3961 static void __attribute__((unused))
3962 tcg_out_opc_xvsub_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3963 {
3964 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_W, xd, xj, xk));
3965 }
3966
3967 /* Emits the `xvsub.d xd, xj, xk` instruction. */
3968 static void __attribute__((unused))
3969 tcg_out_opc_xvsub_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3970 {
3971 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSUB_D, xd, xj, xk));
3972 }
3973
3974 /* Emits the `xvsadd.b xd, xj, xk` instruction. */
3975 static void __attribute__((unused))
3976 tcg_out_opc_xvsadd_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3977 {
3978 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_B, xd, xj, xk));
3979 }
3980
3981 /* Emits the `xvsadd.h xd, xj, xk` instruction. */
3982 static void __attribute__((unused))
3983 tcg_out_opc_xvsadd_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3984 {
3985 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_H, xd, xj, xk));
3986 }
3987
3988 /* Emits the `xvsadd.w xd, xj, xk` instruction. */
3989 static void __attribute__((unused))
3990 tcg_out_opc_xvsadd_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3991 {
3992 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_W, xd, xj, xk));
3993 }
3994
3995 /* Emits the `xvsadd.d xd, xj, xk` instruction. */
3996 static void __attribute__((unused))
3997 tcg_out_opc_xvsadd_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
3998 {
3999 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_D, xd, xj, xk));
4000 }
4001
4002 /* Emits the `xvssub.b xd, xj, xk` instruction. */
4003 static void __attribute__((unused))
4004 tcg_out_opc_xvssub_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4005 {
4006 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_B, xd, xj, xk));
4007 }
4008
4009 /* Emits the `xvssub.h xd, xj, xk` instruction. */
4010 static void __attribute__((unused))
4011 tcg_out_opc_xvssub_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4012 {
4013 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_H, xd, xj, xk));
4014 }
4015
4016 /* Emits the `xvssub.w xd, xj, xk` instruction. */
4017 static void __attribute__((unused))
4018 tcg_out_opc_xvssub_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4019 {
4020 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_W, xd, xj, xk));
4021 }
4022
4023 /* Emits the `xvssub.d xd, xj, xk` instruction. */
4024 static void __attribute__((unused))
4025 tcg_out_opc_xvssub_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4026 {
4027 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_D, xd, xj, xk));
4028 }
4029
4030 /* Emits the `xvsadd.bu xd, xj, xk` instruction. */
4031 static void __attribute__((unused))
4032 tcg_out_opc_xvsadd_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4033 {
4034 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_BU, xd, xj, xk));
4035 }
4036
4037 /* Emits the `xvsadd.hu xd, xj, xk` instruction. */
4038 static void __attribute__((unused))
4039 tcg_out_opc_xvsadd_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4040 {
4041 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_HU, xd, xj, xk));
4042 }
4043
4044 /* Emits the `xvsadd.wu xd, xj, xk` instruction. */
4045 static void __attribute__((unused))
4046 tcg_out_opc_xvsadd_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4047 {
4048 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_WU, xd, xj, xk));
4049 }
4050
4051 /* Emits the `xvsadd.du xd, xj, xk` instruction. */
4052 static void __attribute__((unused))
4053 tcg_out_opc_xvsadd_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4054 {
4055 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSADD_DU, xd, xj, xk));
4056 }
4057
4058 /* Emits the `xvssub.bu xd, xj, xk` instruction. */
4059 static void __attribute__((unused))
4060 tcg_out_opc_xvssub_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4061 {
4062 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_BU, xd, xj, xk));
4063 }
4064
4065 /* Emits the `xvssub.hu xd, xj, xk` instruction. */
4066 static void __attribute__((unused))
4067 tcg_out_opc_xvssub_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4068 {
4069 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_HU, xd, xj, xk));
4070 }
4071
4072 /* Emits the `xvssub.wu xd, xj, xk` instruction. */
4073 static void __attribute__((unused))
4074 tcg_out_opc_xvssub_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4075 {
4076 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_WU, xd, xj, xk));
4077 }
4078
4079 /* Emits the `xvssub.du xd, xj, xk` instruction. */
4080 static void __attribute__((unused))
4081 tcg_out_opc_xvssub_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4082 {
4083 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSSUB_DU, xd, xj, xk));
4084 }
4085
4086 /* Emits the `xvmax.b xd, xj, xk` instruction. */
4087 static void __attribute__((unused))
4088 tcg_out_opc_xvmax_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4089 {
4090 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_B, xd, xj, xk));
4091 }
4092
4093 /* Emits the `xvmax.h xd, xj, xk` instruction. */
4094 static void __attribute__((unused))
4095 tcg_out_opc_xvmax_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4096 {
4097 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_H, xd, xj, xk));
4098 }
4099
4100 /* Emits the `xvmax.w xd, xj, xk` instruction. */
4101 static void __attribute__((unused))
4102 tcg_out_opc_xvmax_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4103 {
4104 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_W, xd, xj, xk));
4105 }
4106
4107 /* Emits the `xvmax.d xd, xj, xk` instruction. */
4108 static void __attribute__((unused))
4109 tcg_out_opc_xvmax_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4110 {
4111 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_D, xd, xj, xk));
4112 }
4113
4114 /* Emits the `xvmin.b xd, xj, xk` instruction. */
4115 static void __attribute__((unused))
4116 tcg_out_opc_xvmin_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4117 {
4118 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_B, xd, xj, xk));
4119 }
4120
4121 /* Emits the `xvmin.h xd, xj, xk` instruction. */
4122 static void __attribute__((unused))
4123 tcg_out_opc_xvmin_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4124 {
4125 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_H, xd, xj, xk));
4126 }
4127
4128 /* Emits the `xvmin.w xd, xj, xk` instruction. */
4129 static void __attribute__((unused))
4130 tcg_out_opc_xvmin_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4131 {
4132 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_W, xd, xj, xk));
4133 }
4134
4135 /* Emits the `xvmin.d xd, xj, xk` instruction. */
4136 static void __attribute__((unused))
4137 tcg_out_opc_xvmin_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4138 {
4139 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_D, xd, xj, xk));
4140 }
4141
4142 /* Emits the `xvmax.bu xd, xj, xk` instruction. */
4143 static void __attribute__((unused))
4144 tcg_out_opc_xvmax_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4145 {
4146 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_BU, xd, xj, xk));
4147 }
4148
4149 /* Emits the `xvmax.hu xd, xj, xk` instruction. */
4150 static void __attribute__((unused))
4151 tcg_out_opc_xvmax_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4152 {
4153 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_HU, xd, xj, xk));
4154 }
4155
4156 /* Emits the `xvmax.wu xd, xj, xk` instruction. */
4157 static void __attribute__((unused))
4158 tcg_out_opc_xvmax_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4159 {
4160 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_WU, xd, xj, xk));
4161 }
4162
4163 /* Emits the `xvmax.du xd, xj, xk` instruction. */
4164 static void __attribute__((unused))
4165 tcg_out_opc_xvmax_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4166 {
4167 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMAX_DU, xd, xj, xk));
4168 }
4169
4170 /* Emits the `xvmin.bu xd, xj, xk` instruction. */
4171 static void __attribute__((unused))
4172 tcg_out_opc_xvmin_bu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4173 {
4174 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_BU, xd, xj, xk));
4175 }
4176
4177 /* Emits the `xvmin.hu xd, xj, xk` instruction. */
4178 static void __attribute__((unused))
4179 tcg_out_opc_xvmin_hu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4180 {
4181 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_HU, xd, xj, xk));
4182 }
4183
4184 /* Emits the `xvmin.wu xd, xj, xk` instruction. */
4185 static void __attribute__((unused))
4186 tcg_out_opc_xvmin_wu(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4187 {
4188 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_WU, xd, xj, xk));
4189 }
4190
4191 /* Emits the `xvmin.du xd, xj, xk` instruction. */
4192 static void __attribute__((unused))
4193 tcg_out_opc_xvmin_du(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4194 {
4195 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMIN_DU, xd, xj, xk));
4196 }
4197
4198 /* Emits the `xvmul.b xd, xj, xk` instruction. */
4199 static void __attribute__((unused))
4200 tcg_out_opc_xvmul_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4201 {
4202 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_B, xd, xj, xk));
4203 }
4204
4205 /* Emits the `xvmul.h xd, xj, xk` instruction. */
4206 static void __attribute__((unused))
4207 tcg_out_opc_xvmul_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4208 {
4209 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_H, xd, xj, xk));
4210 }
4211
4212 /* Emits the `xvmul.w xd, xj, xk` instruction. */
4213 static void __attribute__((unused))
4214 tcg_out_opc_xvmul_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4215 {
4216 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_W, xd, xj, xk));
4217 }
4218
4219 /* Emits the `xvmul.d xd, xj, xk` instruction. */
4220 static void __attribute__((unused))
4221 tcg_out_opc_xvmul_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4222 {
4223 tcg_out32(s, encode_xdxjxk_insn(OPC_XVMUL_D, xd, xj, xk));
4224 }
4225
4226 /* Emits the `xvsll.b xd, xj, xk` instruction. */
4227 static void __attribute__((unused))
4228 tcg_out_opc_xvsll_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4229 {
4230 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_B, xd, xj, xk));
4231 }
4232
4233 /* Emits the `xvsll.h xd, xj, xk` instruction. */
4234 static void __attribute__((unused))
4235 tcg_out_opc_xvsll_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4236 {
4237 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_H, xd, xj, xk));
4238 }
4239
4240 /* Emits the `xvsll.w xd, xj, xk` instruction. */
4241 static void __attribute__((unused))
4242 tcg_out_opc_xvsll_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4243 {
4244 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_W, xd, xj, xk));
4245 }
4246
4247 /* Emits the `xvsll.d xd, xj, xk` instruction. */
4248 static void __attribute__((unused))
4249 tcg_out_opc_xvsll_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4250 {
4251 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSLL_D, xd, xj, xk));
4252 }
4253
4254 /* Emits the `xvsrl.b xd, xj, xk` instruction. */
4255 static void __attribute__((unused))
4256 tcg_out_opc_xvsrl_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4257 {
4258 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_B, xd, xj, xk));
4259 }
4260
4261 /* Emits the `xvsrl.h xd, xj, xk` instruction. */
4262 static void __attribute__((unused))
4263 tcg_out_opc_xvsrl_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4264 {
4265 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_H, xd, xj, xk));
4266 }
4267
4268 /* Emits the `xvsrl.w xd, xj, xk` instruction. */
4269 static void __attribute__((unused))
4270 tcg_out_opc_xvsrl_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4271 {
4272 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_W, xd, xj, xk));
4273 }
4274
4275 /* Emits the `xvsrl.d xd, xj, xk` instruction. */
4276 static void __attribute__((unused))
4277 tcg_out_opc_xvsrl_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4278 {
4279 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRL_D, xd, xj, xk));
4280 }
4281
4282 /* Emits the `xvsra.b xd, xj, xk` instruction. */
4283 static void __attribute__((unused))
4284 tcg_out_opc_xvsra_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4285 {
4286 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_B, xd, xj, xk));
4287 }
4288
4289 /* Emits the `xvsra.h xd, xj, xk` instruction. */
4290 static void __attribute__((unused))
4291 tcg_out_opc_xvsra_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4292 {
4293 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_H, xd, xj, xk));
4294 }
4295
4296 /* Emits the `xvsra.w xd, xj, xk` instruction. */
4297 static void __attribute__((unused))
4298 tcg_out_opc_xvsra_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4299 {
4300 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_W, xd, xj, xk));
4301 }
4302
4303 /* Emits the `xvsra.d xd, xj, xk` instruction. */
4304 static void __attribute__((unused))
4305 tcg_out_opc_xvsra_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4306 {
4307 tcg_out32(s, encode_xdxjxk_insn(OPC_XVSRA_D, xd, xj, xk));
4308 }
4309
4310 /* Emits the `xvrotr.b xd, xj, xk` instruction. */
4311 static void __attribute__((unused))
4312 tcg_out_opc_xvrotr_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4313 {
4314 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_B, xd, xj, xk));
4315 }
4316
4317 /* Emits the `xvrotr.h xd, xj, xk` instruction. */
4318 static void __attribute__((unused))
4319 tcg_out_opc_xvrotr_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4320 {
4321 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_H, xd, xj, xk));
4322 }
4323
4324 /* Emits the `xvrotr.w xd, xj, xk` instruction. */
4325 static void __attribute__((unused))
4326 tcg_out_opc_xvrotr_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4327 {
4328 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_W, xd, xj, xk));
4329 }
4330
4331 /* Emits the `xvrotr.d xd, xj, xk` instruction. */
4332 static void __attribute__((unused))
4333 tcg_out_opc_xvrotr_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4334 {
4335 tcg_out32(s, encode_xdxjxk_insn(OPC_XVROTR_D, xd, xj, xk));
4336 }
4337
4338 /* Emits the `xvreplve.b xd, xj, k` instruction. */
4339 static void __attribute__((unused))
4340 tcg_out_opc_xvreplve_b(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k)
4341 {
4342 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_B, xd, xj, k));
4343 }
4344
4345 /* Emits the `xvreplve.h xd, xj, k` instruction. */
4346 static void __attribute__((unused))
4347 tcg_out_opc_xvreplve_h(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k)
4348 {
4349 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_H, xd, xj, k));
4350 }
4351
4352 /* Emits the `xvreplve.w xd, xj, k` instruction. */
4353 static void __attribute__((unused))
4354 tcg_out_opc_xvreplve_w(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k)
4355 {
4356 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_W, xd, xj, k));
4357 }
4358
4359 /* Emits the `xvreplve.d xd, xj, k` instruction. */
4360 static void __attribute__((unused))
4361 tcg_out_opc_xvreplve_d(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg k)
4362 {
4363 tcg_out32(s, encode_xdxjk_insn(OPC_XVREPLVE_D, xd, xj, k));
4364 }
4365
4366 /* Emits the `xvand.v xd, xj, xk` instruction. */
4367 static void __attribute__((unused))
4368 tcg_out_opc_xvand_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4369 {
4370 tcg_out32(s, encode_xdxjxk_insn(OPC_XVAND_V, xd, xj, xk));
4371 }
4372
4373 /* Emits the `xvor.v xd, xj, xk` instruction. */
4374 static void __attribute__((unused)) tcg_out_opc_xvor_v(TCGContext *s, TCGReg xd,
4375 TCGReg xj, TCGReg xk)
4376 {
4377 tcg_out32(s, encode_xdxjxk_insn(OPC_XVOR_V, xd, xj, xk));
4378 }
4379
4380 /* Emits the `xvxor.v xd, xj, xk` instruction. */
4381 static void __attribute__((unused))
4382 tcg_out_opc_xvxor_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4383 {
4384 tcg_out32(s, encode_xdxjxk_insn(OPC_XVXOR_V, xd, xj, xk));
4385 }
4386
4387 /* Emits the `xvnor.v xd, xj, xk` instruction. */
4388 static void __attribute__((unused))
4389 tcg_out_opc_xvnor_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4390 {
4391 tcg_out32(s, encode_xdxjxk_insn(OPC_XVNOR_V, xd, xj, xk));
4392 }
4393
4394 /* Emits the `xvandn.v xd, xj, xk` instruction. */
4395 static void __attribute__((unused))
4396 tcg_out_opc_xvandn_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4397 {
4398 tcg_out32(s, encode_xdxjxk_insn(OPC_XVANDN_V, xd, xj, xk));
4399 }
4400
4401 /* Emits the `xvorn.v xd, xj, xk` instruction. */
4402 static void __attribute__((unused))
4403 tcg_out_opc_xvorn_v(TCGContext *s, TCGReg xd, TCGReg xj, TCGReg xk)
4404 {
4405 tcg_out32(s, encode_xdxjxk_insn(OPC_XVORN_V, xd, xj, xk));
4406 }
4407
4408 /* Emits the `xvseqi.b xd, xj, sk5` instruction. */
4409 static void __attribute__((unused))
4410 tcg_out_opc_xvseqi_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4411 {
4412 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_B, xd, xj, sk5));
4413 }
4414
4415 /* Emits the `xvseqi.h xd, xj, sk5` instruction. */
4416 static void __attribute__((unused))
4417 tcg_out_opc_xvseqi_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4418 {
4419 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_H, xd, xj, sk5));
4420 }
4421
4422 /* Emits the `xvseqi.w xd, xj, sk5` instruction. */
4423 static void __attribute__((unused))
4424 tcg_out_opc_xvseqi_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4425 {
4426 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_W, xd, xj, sk5));
4427 }
4428
4429 /* Emits the `xvseqi.d xd, xj, sk5` instruction. */
4430 static void __attribute__((unused))
4431 tcg_out_opc_xvseqi_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4432 {
4433 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSEQI_D, xd, xj, sk5));
4434 }
4435
4436 /* Emits the `xvslei.b xd, xj, sk5` instruction. */
4437 static void __attribute__((unused))
4438 tcg_out_opc_xvslei_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4439 {
4440 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_B, xd, xj, sk5));
4441 }
4442
4443 /* Emits the `xvslei.h xd, xj, sk5` instruction. */
4444 static void __attribute__((unused))
4445 tcg_out_opc_xvslei_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4446 {
4447 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_H, xd, xj, sk5));
4448 }
4449
4450 /* Emits the `xvslei.w xd, xj, sk5` instruction. */
4451 static void __attribute__((unused))
4452 tcg_out_opc_xvslei_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4453 {
4454 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_W, xd, xj, sk5));
4455 }
4456
4457 /* Emits the `xvslei.d xd, xj, sk5` instruction. */
4458 static void __attribute__((unused))
4459 tcg_out_opc_xvslei_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4460 {
4461 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLEI_D, xd, xj, sk5));
4462 }
4463
4464 /* Emits the `xvslei.bu xd, xj, uk5` instruction. */
4465 static void __attribute__((unused))
4466 tcg_out_opc_xvslei_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4467 {
4468 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_BU, xd, xj, uk5));
4469 }
4470
4471 /* Emits the `xvslei.hu xd, xj, uk5` instruction. */
4472 static void __attribute__((unused))
4473 tcg_out_opc_xvslei_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4474 {
4475 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_HU, xd, xj, uk5));
4476 }
4477
4478 /* Emits the `xvslei.wu xd, xj, uk5` instruction. */
4479 static void __attribute__((unused))
4480 tcg_out_opc_xvslei_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4481 {
4482 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_WU, xd, xj, uk5));
4483 }
4484
4485 /* Emits the `xvslei.du xd, xj, uk5` instruction. */
4486 static void __attribute__((unused))
4487 tcg_out_opc_xvslei_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4488 {
4489 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLEI_DU, xd, xj, uk5));
4490 }
4491
4492 /* Emits the `xvslti.b xd, xj, sk5` instruction. */
4493 static void __attribute__((unused))
4494 tcg_out_opc_xvslti_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4495 {
4496 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_B, xd, xj, sk5));
4497 }
4498
4499 /* Emits the `xvslti.h xd, xj, sk5` instruction. */
4500 static void __attribute__((unused))
4501 tcg_out_opc_xvslti_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4502 {
4503 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_H, xd, xj, sk5));
4504 }
4505
4506 /* Emits the `xvslti.w xd, xj, sk5` instruction. */
4507 static void __attribute__((unused))
4508 tcg_out_opc_xvslti_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4509 {
4510 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_W, xd, xj, sk5));
4511 }
4512
4513 /* Emits the `xvslti.d xd, xj, sk5` instruction. */
4514 static void __attribute__((unused))
4515 tcg_out_opc_xvslti_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4516 {
4517 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVSLTI_D, xd, xj, sk5));
4518 }
4519
4520 /* Emits the `xvslti.bu xd, xj, uk5` instruction. */
4521 static void __attribute__((unused))
4522 tcg_out_opc_xvslti_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4523 {
4524 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_BU, xd, xj, uk5));
4525 }
4526
4527 /* Emits the `xvslti.hu xd, xj, uk5` instruction. */
4528 static void __attribute__((unused))
4529 tcg_out_opc_xvslti_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4530 {
4531 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_HU, xd, xj, uk5));
4532 }
4533
4534 /* Emits the `xvslti.wu xd, xj, uk5` instruction. */
4535 static void __attribute__((unused))
4536 tcg_out_opc_xvslti_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4537 {
4538 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_WU, xd, xj, uk5));
4539 }
4540
4541 /* Emits the `xvslti.du xd, xj, uk5` instruction. */
4542 static void __attribute__((unused))
4543 tcg_out_opc_xvslti_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4544 {
4545 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSLTI_DU, xd, xj, uk5));
4546 }
4547
4548 /* Emits the `xvaddi.bu xd, xj, uk5` instruction. */
4549 static void __attribute__((unused))
4550 tcg_out_opc_xvaddi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4551 {
4552 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_BU, xd, xj, uk5));
4553 }
4554
4555 /* Emits the `xvaddi.hu xd, xj, uk5` instruction. */
4556 static void __attribute__((unused))
4557 tcg_out_opc_xvaddi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4558 {
4559 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_HU, xd, xj, uk5));
4560 }
4561
4562 /* Emits the `xvaddi.wu xd, xj, uk5` instruction. */
4563 static void __attribute__((unused))
4564 tcg_out_opc_xvaddi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4565 {
4566 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_WU, xd, xj, uk5));
4567 }
4568
4569 /* Emits the `xvaddi.du xd, xj, uk5` instruction. */
4570 static void __attribute__((unused))
4571 tcg_out_opc_xvaddi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4572 {
4573 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVADDI_DU, xd, xj, uk5));
4574 }
4575
4576 /* Emits the `xvsubi.bu xd, xj, uk5` instruction. */
4577 static void __attribute__((unused))
4578 tcg_out_opc_xvsubi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4579 {
4580 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_BU, xd, xj, uk5));
4581 }
4582
4583 /* Emits the `xvsubi.hu xd, xj, uk5` instruction. */
4584 static void __attribute__((unused))
4585 tcg_out_opc_xvsubi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4586 {
4587 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_HU, xd, xj, uk5));
4588 }
4589
4590 /* Emits the `xvsubi.wu xd, xj, uk5` instruction. */
4591 static void __attribute__((unused))
4592 tcg_out_opc_xvsubi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4593 {
4594 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_WU, xd, xj, uk5));
4595 }
4596
4597 /* Emits the `xvsubi.du xd, xj, uk5` instruction. */
4598 static void __attribute__((unused))
4599 tcg_out_opc_xvsubi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4600 {
4601 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVSUBI_DU, xd, xj, uk5));
4602 }
4603
4604 /* Emits the `xvmaxi.b xd, xj, sk5` instruction. */
4605 static void __attribute__((unused))
4606 tcg_out_opc_xvmaxi_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4607 {
4608 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_B, xd, xj, sk5));
4609 }
4610
4611 /* Emits the `xvmaxi.h xd, xj, sk5` instruction. */
4612 static void __attribute__((unused))
4613 tcg_out_opc_xvmaxi_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4614 {
4615 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_H, xd, xj, sk5));
4616 }
4617
4618 /* Emits the `xvmaxi.w xd, xj, sk5` instruction. */
4619 static void __attribute__((unused))
4620 tcg_out_opc_xvmaxi_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4621 {
4622 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_W, xd, xj, sk5));
4623 }
4624
4625 /* Emits the `xvmaxi.d xd, xj, sk5` instruction. */
4626 static void __attribute__((unused))
4627 tcg_out_opc_xvmaxi_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4628 {
4629 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMAXI_D, xd, xj, sk5));
4630 }
4631
4632 /* Emits the `xvmini.b xd, xj, sk5` instruction. */
4633 static void __attribute__((unused))
4634 tcg_out_opc_xvmini_b(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4635 {
4636 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_B, xd, xj, sk5));
4637 }
4638
4639 /* Emits the `xvmini.h xd, xj, sk5` instruction. */
4640 static void __attribute__((unused))
4641 tcg_out_opc_xvmini_h(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4642 {
4643 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_H, xd, xj, sk5));
4644 }
4645
4646 /* Emits the `xvmini.w xd, xj, sk5` instruction. */
4647 static void __attribute__((unused))
4648 tcg_out_opc_xvmini_w(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4649 {
4650 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_W, xd, xj, sk5));
4651 }
4652
4653 /* Emits the `xvmini.d xd, xj, sk5` instruction. */
4654 static void __attribute__((unused))
4655 tcg_out_opc_xvmini_d(TCGContext *s, TCGReg xd, TCGReg xj, int32_t sk5)
4656 {
4657 tcg_out32(s, encode_xdxjsk5_insn(OPC_XVMINI_D, xd, xj, sk5));
4658 }
4659
4660 /* Emits the `xvmaxi.bu xd, xj, uk5` instruction. */
4661 static void __attribute__((unused))
4662 tcg_out_opc_xvmaxi_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4663 {
4664 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_BU, xd, xj, uk5));
4665 }
4666
4667 /* Emits the `xvmaxi.hu xd, xj, uk5` instruction. */
4668 static void __attribute__((unused))
4669 tcg_out_opc_xvmaxi_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4670 {
4671 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_HU, xd, xj, uk5));
4672 }
4673
4674 /* Emits the `xvmaxi.wu xd, xj, uk5` instruction. */
4675 static void __attribute__((unused))
4676 tcg_out_opc_xvmaxi_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4677 {
4678 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_WU, xd, xj, uk5));
4679 }
4680
4681 /* Emits the `xvmaxi.du xd, xj, uk5` instruction. */
4682 static void __attribute__((unused))
4683 tcg_out_opc_xvmaxi_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4684 {
4685 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMAXI_DU, xd, xj, uk5));
4686 }
4687
4688 /* Emits the `xvmini.bu xd, xj, uk5` instruction. */
4689 static void __attribute__((unused))
4690 tcg_out_opc_xvmini_bu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4691 {
4692 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_BU, xd, xj, uk5));
4693 }
4694
4695 /* Emits the `xvmini.hu xd, xj, uk5` instruction. */
4696 static void __attribute__((unused))
4697 tcg_out_opc_xvmini_hu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4698 {
4699 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_HU, xd, xj, uk5));
4700 }
4701
4702 /* Emits the `xvmini.wu xd, xj, uk5` instruction. */
4703 static void __attribute__((unused))
4704 tcg_out_opc_xvmini_wu(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4705 {
4706 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_WU, xd, xj, uk5));
4707 }
4708
4709 /* Emits the `xvmini.du xd, xj, uk5` instruction. */
4710 static void __attribute__((unused))
4711 tcg_out_opc_xvmini_du(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4712 {
4713 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVMINI_DU, xd, xj, uk5));
4714 }
4715
4716 /* Emits the `xvneg.b xd, xj` instruction. */
4717 static void __attribute__((unused)) tcg_out_opc_xvneg_b(TCGContext *s,
4718 TCGReg xd, TCGReg xj)
4719 {
4720 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_B, xd, xj));
4721 }
4722
4723 /* Emits the `xvneg.h xd, xj` instruction. */
4724 static void __attribute__((unused)) tcg_out_opc_xvneg_h(TCGContext *s,
4725 TCGReg xd, TCGReg xj)
4726 {
4727 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_H, xd, xj));
4728 }
4729
4730 /* Emits the `xvneg.w xd, xj` instruction. */
4731 static void __attribute__((unused)) tcg_out_opc_xvneg_w(TCGContext *s,
4732 TCGReg xd, TCGReg xj)
4733 {
4734 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_W, xd, xj));
4735 }
4736
4737 /* Emits the `xvneg.d xd, xj` instruction. */
4738 static void __attribute__((unused)) tcg_out_opc_xvneg_d(TCGContext *s,
4739 TCGReg xd, TCGReg xj)
4740 {
4741 tcg_out32(s, encode_xdxj_insn(OPC_XVNEG_D, xd, xj));
4742 }
4743
4744 /* Emits the `xvreplgr2vr.b xd, j` instruction. */
4745 static void __attribute__((unused))
4746 tcg_out_opc_xvreplgr2vr_b(TCGContext *s, TCGReg xd, TCGReg j)
4747 {
4748 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_B, xd, j));
4749 }
4750
4751 /* Emits the `xvreplgr2vr.h xd, j` instruction. */
4752 static void __attribute__((unused))
4753 tcg_out_opc_xvreplgr2vr_h(TCGContext *s, TCGReg xd, TCGReg j)
4754 {
4755 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_H, xd, j));
4756 }
4757
4758 /* Emits the `xvreplgr2vr.w xd, j` instruction. */
4759 static void __attribute__((unused))
4760 tcg_out_opc_xvreplgr2vr_w(TCGContext *s, TCGReg xd, TCGReg j)
4761 {
4762 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_W, xd, j));
4763 }
4764
4765 /* Emits the `xvreplgr2vr.d xd, j` instruction. */
4766 static void __attribute__((unused))
4767 tcg_out_opc_xvreplgr2vr_d(TCGContext *s, TCGReg xd, TCGReg j)
4768 {
4769 tcg_out32(s, encode_xdj_insn(OPC_XVREPLGR2VR_D, xd, j));
4770 }
4771
4772 /* Emits the `xvrotri.b xd, xj, uk3` instruction. */
4773 static void __attribute__((unused))
4774 tcg_out_opc_xvrotri_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4775 {
4776 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVROTRI_B, xd, xj, uk3));
4777 }
4778
4779 /* Emits the `xvrotri.h xd, xj, uk4` instruction. */
4780 static void __attribute__((unused))
4781 tcg_out_opc_xvrotri_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4782 {
4783 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVROTRI_H, xd, xj, uk4));
4784 }
4785
4786 /* Emits the `xvrotri.w xd, xj, uk5` instruction. */
4787 static void __attribute__((unused))
4788 tcg_out_opc_xvrotri_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4789 {
4790 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVROTRI_W, xd, xj, uk5));
4791 }
4792
4793 /* Emits the `xvrotri.d xd, xj, uk6` instruction. */
4794 static void __attribute__((unused))
4795 tcg_out_opc_xvrotri_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6)
4796 {
4797 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVROTRI_D, xd, xj, uk6));
4798 }
4799
4800 /* Emits the `xvinsgr2vr.w xd, j, uk3` instruction. */
4801 static void __attribute__((unused))
4802 tcg_out_opc_xvinsgr2vr_w(TCGContext *s, TCGReg xd, TCGReg j, uint32_t uk3)
4803 {
4804 tcg_out32(s, encode_xdjuk3_insn(OPC_XVINSGR2VR_W, xd, j, uk3));
4805 }
4806
4807 /* Emits the `xvinsgr2vr.d xd, j, uk2` instruction. */
4808 static void __attribute__((unused))
4809 tcg_out_opc_xvinsgr2vr_d(TCGContext *s, TCGReg xd, TCGReg j, uint32_t uk2)
4810 {
4811 tcg_out32(s, encode_xdjuk2_insn(OPC_XVINSGR2VR_D, xd, j, uk2));
4812 }
4813
4814 /* Emits the `xvpickve2gr.w d, xj, uk3` instruction. */
4815 static void __attribute__((unused))
4816 tcg_out_opc_xvpickve2gr_w(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk3)
4817 {
4818 tcg_out32(s, encode_dxjuk3_insn(OPC_XVPICKVE2GR_W, d, xj, uk3));
4819 }
4820
4821 /* Emits the `xvpickve2gr.d d, xj, uk2` instruction. */
4822 static void __attribute__((unused))
4823 tcg_out_opc_xvpickve2gr_d(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk2)
4824 {
4825 tcg_out32(s, encode_dxjuk2_insn(OPC_XVPICKVE2GR_D, d, xj, uk2));
4826 }
4827
4828 /* Emits the `xvpickve2gr.wu d, xj, uk3` instruction. */
4829 static void __attribute__((unused))
4830 tcg_out_opc_xvpickve2gr_wu(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk3)
4831 {
4832 tcg_out32(s, encode_dxjuk3_insn(OPC_XVPICKVE2GR_WU, d, xj, uk3));
4833 }
4834
4835 /* Emits the `xvpickve2gr.du d, xj, uk2` instruction. */
4836 static void __attribute__((unused))
4837 tcg_out_opc_xvpickve2gr_du(TCGContext *s, TCGReg d, TCGReg xj, uint32_t uk2)
4838 {
4839 tcg_out32(s, encode_dxjuk2_insn(OPC_XVPICKVE2GR_DU, d, xj, uk2));
4840 }
4841
4842 /* Emits the `xvrepl128vei.b xd, xj, uk4` instruction. */
4843 static void __attribute__((unused))
4844 tcg_out_opc_xvrepl128vei_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4845 {
4846 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVREPL128VEI_B, xd, xj, uk4));
4847 }
4848
4849 /* Emits the `xvrepl128vei.h xd, xj, uk3` instruction. */
4850 static void __attribute__((unused))
4851 tcg_out_opc_xvrepl128vei_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4852 {
4853 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVREPL128VEI_H, xd, xj, uk3));
4854 }
4855
4856 /* Emits the `xvrepl128vei.w xd, xj, uk2` instruction. */
4857 static void __attribute__((unused))
4858 tcg_out_opc_xvrepl128vei_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk2)
4859 {
4860 tcg_out32(s, encode_xdxjuk2_insn(OPC_XVREPL128VEI_W, xd, xj, uk2));
4861 }
4862
4863 /* Emits the `xvrepl128vei.d xd, xj, uk1` instruction. */
4864 static void __attribute__((unused))
4865 tcg_out_opc_xvrepl128vei_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk1)
4866 {
4867 tcg_out32(s, encode_xdxjuk1_insn(OPC_XVREPL128VEI_D, xd, xj, uk1));
4868 }
4869
4870 /* Emits the `xvreplve0.b xd, xj` instruction. */
4871 static void __attribute__((unused))
4872 tcg_out_opc_xvreplve0_b(TCGContext *s, TCGReg xd, TCGReg xj)
4873 {
4874 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_B, xd, xj));
4875 }
4876
4877 /* Emits the `xvreplve0.h xd, xj` instruction. */
4878 static void __attribute__((unused))
4879 tcg_out_opc_xvreplve0_h(TCGContext *s, TCGReg xd, TCGReg xj)
4880 {
4881 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_H, xd, xj));
4882 }
4883
4884 /* Emits the `xvreplve0.w xd, xj` instruction. */
4885 static void __attribute__((unused))
4886 tcg_out_opc_xvreplve0_w(TCGContext *s, TCGReg xd, TCGReg xj)
4887 {
4888 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_W, xd, xj));
4889 }
4890
4891 /* Emits the `xvreplve0.d xd, xj` instruction. */
4892 static void __attribute__((unused))
4893 tcg_out_opc_xvreplve0_d(TCGContext *s, TCGReg xd, TCGReg xj)
4894 {
4895 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_D, xd, xj));
4896 }
4897
4898 /* Emits the `xvreplve0.q xd, xj` instruction. */
4899 static void __attribute__((unused))
4900 tcg_out_opc_xvreplve0_q(TCGContext *s, TCGReg xd, TCGReg xj)
4901 {
4902 tcg_out32(s, encode_xdxj_insn(OPC_XVREPLVE0_Q, xd, xj));
4903 }
4904
4905 /* Emits the `xvbitclri.b xd, xj, uk3` instruction. */
4906 static void __attribute__((unused))
4907 tcg_out_opc_xvbitclri_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4908 {
4909 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITCLRI_B, xd, xj, uk3));
4910 }
4911
4912 /* Emits the `xvbitclri.h xd, xj, uk4` instruction. */
4913 static void __attribute__((unused))
4914 tcg_out_opc_xvbitclri_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4915 {
4916 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITCLRI_H, xd, xj, uk4));
4917 }
4918
4919 /* Emits the `xvbitclri.w xd, xj, uk5` instruction. */
4920 static void __attribute__((unused))
4921 tcg_out_opc_xvbitclri_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4922 {
4923 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITCLRI_W, xd, xj, uk5));
4924 }
4925
4926 /* Emits the `xvbitclri.d xd, xj, uk6` instruction. */
4927 static void __attribute__((unused))
4928 tcg_out_opc_xvbitclri_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6)
4929 {
4930 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITCLRI_D, xd, xj, uk6));
4931 }
4932
4933 /* Emits the `xvbitseti.b xd, xj, uk3` instruction. */
4934 static void __attribute__((unused))
4935 tcg_out_opc_xvbitseti_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4936 {
4937 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITSETI_B, xd, xj, uk3));
4938 }
4939
4940 /* Emits the `xvbitseti.h xd, xj, uk4` instruction. */
4941 static void __attribute__((unused))
4942 tcg_out_opc_xvbitseti_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4943 {
4944 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITSETI_H, xd, xj, uk4));
4945 }
4946
4947 /* Emits the `xvbitseti.w xd, xj, uk5` instruction. */
4948 static void __attribute__((unused))
4949 tcg_out_opc_xvbitseti_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4950 {
4951 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITSETI_W, xd, xj, uk5));
4952 }
4953
4954 /* Emits the `xvbitseti.d xd, xj, uk6` instruction. */
4955 static void __attribute__((unused))
4956 tcg_out_opc_xvbitseti_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6)
4957 {
4958 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITSETI_D, xd, xj, uk6));
4959 }
4960
4961 /* Emits the `xvbitrevi.b xd, xj, uk3` instruction. */
4962 static void __attribute__((unused))
4963 tcg_out_opc_xvbitrevi_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4964 {
4965 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVBITREVI_B, xd, xj, uk3));
4966 }
4967
4968 /* Emits the `xvbitrevi.h xd, xj, uk4` instruction. */
4969 static void __attribute__((unused))
4970 tcg_out_opc_xvbitrevi_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4971 {
4972 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVBITREVI_H, xd, xj, uk4));
4973 }
4974
4975 /* Emits the `xvbitrevi.w xd, xj, uk5` instruction. */
4976 static void __attribute__((unused))
4977 tcg_out_opc_xvbitrevi_w(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk5)
4978 {
4979 tcg_out32(s, encode_xdxjuk5_insn(OPC_XVBITREVI_W, xd, xj, uk5));
4980 }
4981
4982 /* Emits the `xvbitrevi.d xd, xj, uk6` instruction. */
4983 static void __attribute__((unused))
4984 tcg_out_opc_xvbitrevi_d(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk6)
4985 {
4986 tcg_out32(s, encode_xdxjuk6_insn(OPC_XVBITREVI_D, xd, xj, uk6));
4987 }
4988
4989 /* Emits the `xvslli.b xd, xj, uk3` instruction. */
4990 static void __attribute__((unused))
4991 tcg_out_opc_xvslli_b(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk3)
4992 {
4993 tcg_out32(s, encode_xdxjuk3_insn(OPC_XVSLLI_B, xd, xj, uk3));
4994 }
4995
4996 /* Emits the `xvslli.h xd, xj, uk4` instruction. */
4997 static void __attribute__((unused))
4998 tcg_out_opc_xvslli_h(TCGContext *s, TCGReg xd, TCGReg xj, uint32_t uk4)
4999 {
5000 tcg_out32(s, encode_xdxjuk4_insn(OPC_XVSLLI_H, xd, xj, uk4));
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