@samitouri / QOSamiQemu
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1 /*
2 * QTest testcase for the ASPEED AST2700 SGPIO Controller.
3 *
4 * SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2025 Google LLC.
6 */
7
8 #include "qemu/osdep.h"
9 #include "qemu/bitops.h"
10 #include "qobject/qdict.h"
11 #include "libqtest-single.h"
12 #include "hw/core/registerfields.h"
13 #include "hw/gpio/aspeed_sgpio.h"
14
15 #define AST2700_SGPIO0_BASE 0x14C0C000
16 #define AST2700_SGPIO1_BASE 0x14C0D000
17
18 static void test_output_pins(const char *machine, const uint32_t base, int idx)
19 {
20 QTestState *s = qtest_init(machine);
21 uint32_t offset = 0;
22 uint32_t value = 0;
23 for (int i = 0; i < ASPEED_SGPIO_MAX_PIN_PAIR; i++) {
24 /* Odd index is output port */
25 g_autofree const char *name = g_strdup_printf("sgpio%03d", i * 2 + 1);
26 g_autofree const char *qom_path
27 = g_strdup_printf("/machine/soc/sgpio[%d]", idx);
28
29 offset = base + (R_SGPIO_0_CONTROL + i) * 4;
30 /* set serial output */
31 qtest_writel(s, offset, 0x00000001);
32 value = qtest_readl(s, offset);
33 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_OUT_VAL), ==, 1);
34 g_assert_cmphex(qtest_qom_get_bool(s, qom_path, name), ==, true);
35
36 /* clear serial output */
37 qtest_writel(s, offset, 0x00000000);
38 value = qtest_readl(s, offset);
39 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_OUT_VAL), ==, 0);
40 g_assert_cmphex(qtest_qom_get_bool(s, qom_path, name), ==, false);
41 }
42 qtest_quit(s);
43 }
44
45 static void test_input_pins(const char *machine, const uint32_t base, int idx)
46 {
47 QTestState *s = qtest_init(machine);
48 uint32_t offset = 0;
49 uint32_t value = 0;
50 for (int i = 0; i < ASPEED_SGPIO_MAX_PIN_PAIR; i++) {
51 /* Even index is input port */
52 g_autofree const char *name = g_strdup_printf("sgpio%03d", i * 2);
53 g_autofree const char *qom_path
54 = g_strdup_printf("/machine/soc/sgpio[%d]", idx);
55
56 offset = base + (R_SGPIO_0_CONTROL + i) * 4;
57 /* set serial input */
58 qtest_qom_set_bool(s, qom_path, name, true);
59 value = qtest_readl(s, offset);
60 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_IN_VAL), ==, 1);
61 g_assert_cmphex(qtest_qom_get_bool(s, qom_path, name), ==, true);
62
63 /* clear serial input */
64 qtest_qom_set_bool(s, qom_path, name, false);
65 value = qtest_readl(s, offset);
66 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_IN_VAL), ==, 0);
67 g_assert_cmphex(qtest_qom_get_bool(s, qom_path, name), ==, false);
68 }
69 qtest_quit(s);
70 }
71
72 static void test_irq_level_high(const char *machine,
73 const uint32_t base, int idx)
74 {
75 QTestState *s = qtest_init(machine);
76 uint32_t ctrl_offset = 0;
77 uint32_t int_offset = 0;
78 uint32_t int_reg_idx = 0;
79 uint32_t int_bit_idx = 0;
80 uint32_t value = 0;
81 for (int i = 0; i < ASPEED_SGPIO_MAX_PIN_PAIR; i++) {
82 /* Even index is input port */
83 g_autofree const char *name = g_strdup_printf("sgpio%03d", i * 2);
84 g_autofree const char *qom_path =
85 g_strdup_printf("/machine/soc/sgpio[%d]", idx);
86
87 int_reg_idx = i / 32;
88 int_bit_idx = i % 32;
89 int_offset = base + (R_SGPIO_INT_STATUS_0 + int_reg_idx) * 4;
90 ctrl_offset = base + (R_SGPIO_0_CONTROL + i) * 4;
91
92 /* Enable the interrupt */
93 value = SHARED_FIELD_DP32(value, SGPIO_INT_EN, 1);
94 qtest_writel(s, ctrl_offset, value);
95
96 /* Set the interrupt type to level-high trigger */
97 value = SHARED_FIELD_DP32(qtest_readl(s, ctrl_offset),
98 SGPIO_INT_TYPE, 3);
99 qtest_writel(s, ctrl_offset, value);
100
101 /* Set serial input high */
102 qtest_qom_set_bool(s, qom_path, name, true);
103 value = qtest_readl(s, ctrl_offset);
104 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_IN_VAL), ==, 1);
105
106 /* Interrupt status is set */
107 value = qtest_readl(s, int_offset);
108 g_assert_cmphex(extract32(value, int_bit_idx, 1), ==, 1);
109
110 /* Clear Interrupt */
111 value = SHARED_FIELD_DP32(qtest_readl(s, ctrl_offset),
112 SGPIO_INT_STATUS, 1);
113 qtest_writel(s, ctrl_offset, value);
114 value = qtest_readl(s, int_offset);
115 g_assert_cmphex(extract32(value, int_bit_idx, 1), ==, 0);
116
117 /* Clear serial input */
118 qtest_qom_set_bool(s, qom_path, name, false);
119 value = qtest_readl(s, ctrl_offset);
120 g_assert_cmphex(SHARED_FIELD_EX32(value, SGPIO_SERIAL_IN_VAL), ==, 0);
121 }
122 qtest_quit(s);
123 }
124
125 static void test_ast_2700_sgpio_input(void)
126 {
127 test_input_pins("-machine ast2700-evb",
128 AST2700_SGPIO0_BASE, 0);
129 test_input_pins("-machine ast2700-evb",
130 AST2700_SGPIO1_BASE, 1);
131 }
132
133 static void test_ast_2700_sgpio_output(void)
134 {
135 test_output_pins("-machine ast2700-evb",
136 AST2700_SGPIO0_BASE, 0);
137 test_output_pins("-machine ast2700-evb",
138 AST2700_SGPIO1_BASE, 1);
139 test_irq_level_high("-machine ast2700-evb",
140 AST2700_SGPIO0_BASE, 0);
141 test_irq_level_high("-machine ast2700-evb",
142 AST2700_SGPIO1_BASE, 1);
143 }
144
145 static void test_ast_2700_sgpio_irq(void)
146 {
147 test_irq_level_high("-machine ast2700-evb",
148 AST2700_SGPIO0_BASE, 0);
149 test_irq_level_high("-machine ast2700-evb",
150 AST2700_SGPIO1_BASE, 1);
151 }
152
153 int main(int argc, char **argv)
154 {
155 g_test_init(&argc, &argv, NULL);
156
157 qtest_add_func("/ast2700/sgpio/ast_2700_sgpio_input",
158 test_ast_2700_sgpio_input);
159 qtest_add_func("/ast2700/sgpio/ast_2700_sgpio_output",
160 test_ast_2700_sgpio_output);
161 qtest_add_func("/ast2700/sgpio/ast_2700_sgpio_irq",
162 test_ast_2700_sgpio_irq);
163
164 return g_test_run();
165 }