@samitouri / QOSamiQemu
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1 /*
2 * QTest testcase for K230 Watchdog
3 *
4 * Copyright (c) 2025 Mig Yang <temashking@foxmail.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 *
8 * Provides a board compatible with the kendryte K230 SDK
9 *
10 * K230 Technical Reference Manual V0.3.1 (2024-11-18):
11 * https://github.com/revyos/external-docs/blob/master/K230/en-us/K230_Technical_Reference_Manual_V0.3.1_20241118.pdf
12 *
13 * For more information, see <https://www.kendryte.com/en/proDetail/230>
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/timer.h"
18 #include "qemu/bitops.h"
19 #include "libqtest.h"
20 #include "hw/watchdog/k230_wdt.h"
21
22 /* K230 WDT0 base address */
23 #define K230_WDT0_BASE 0x91106000
24 #define K230_WDT1_BASE 0x91106800
25
26 /* Test WDT0 by default */
27 #define WDT_BASE K230_WDT0_BASE
28
29 static void test_register_read_write(void)
30 {
31 QTestState *qts = qtest_init("-machine k230");
32
33 /* Test Control Register (CR) read/write */
34 qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0xFFFFFFFF);
35 g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_CR), ==,
36 (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) |
37 K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);
38
39 /* Test Timeout Range Register (TORR) read/write */
40 qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0xFFFFFFFF);
41 g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_TORR), ==,
42 K230_WDT_TORR_TOP_MASK);
43
44 /* Test Protection Level Register read/write */
45 qtest_writel(qts, WDT_BASE + K230_WDT_PROT_LEVEL, 0xFFFFFFFF);
46 g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_PROT_LEVEL), ==, 0x7);
47
48 qtest_quit(qts);
49 }
50
51 static void test_counter_restart(void)
52 {
53 QTestState *qts = qtest_init("-machine k230");
54
55 /* Enable watchdog and set timeout */
56 qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);
57 qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x5); /* TOP = 5 */
58
59 /* Read current counter value */
60 uint32_t initial_count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);
61 g_assert_cmpuint(initial_count, >, 0);
62
63 /* Restart counter with magic value */
64 qtest_writel(qts, WDT_BASE + K230_WDT_CRR, K230_WDT_CRR_RESTART);
65
66 /* Wait for time */
67 qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2);
68
69 /* Counter should be reset to timeout value */
70 uint32_t new_count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);
71 g_assert_cmpuint(new_count, >, 0);
72 g_assert_cmpuint(new_count, !=, initial_count);
73
74 qtest_quit(qts);
75 }
76
77 static void test_interrupt_mode(void)
78 {
79 QTestState *qts = qtest_init("-machine k230");
80
81 /* Set interrupt mode and enable watchdog */
82 qtest_writel(qts, WDT_BASE + K230_WDT_CR,
83 K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);
84 qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */
85
86 /* Wait for timeout to trigger interrupt */
87 qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 10);
88
89 /* Check interrupt status */
90 uint32_t stat = qtest_readl(qts, WDT_BASE + K230_WDT_STAT);
91 g_assert_cmphex(stat & K230_WDT_STAT_INT, ==, K230_WDT_STAT_INT);
92
93 /* Clear interrupt */
94 qtest_writel(qts, WDT_BASE + K230_WDT_EOI, 0x1);
95 stat = qtest_readl(qts, WDT_BASE + K230_WDT_STAT);
96 g_assert_cmphex(stat & K230_WDT_STAT_INT, ==, 0);
97
98 qtest_quit(qts);
99 }
100
101 static void test_reset_mode(void)
102 {
103 QTestState *qts = qtest_init("-machine k230 -no-reboot");
104
105 /* Set reset mode and enable watchdog */
106 qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);
107 qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */
108
109 /* Wait for timeout to trigger reset */
110 qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2);
111
112 /* In reset mode, the system should reset */
113 /* This test verifies that reset mode is properly configured */
114
115 qtest_quit(qts);
116 }
117
118 static void test_timeout_calculation(void)
119 {
120 QTestState *qts = qtest_init("-machine k230");
121
122 /* Test different timeout values */
123 for (uint32_t top = 0; top <= 15; top++) {
124 qtest_writel(qts, WDT_BASE + K230_WDT_TORR, top);
125 qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);
126
127 /* Read current counter value */
128 uint32_t count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);
129 g_assert_cmpuint(count, >, 0);
130
131 /* Disable watchdog for next iteration */
132 qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0);
133 }
134
135 qtest_quit(qts);
136 }
137
138 static void test_wdt1_registers(void)
139 {
140 QTestState *qts = qtest_init("-machine k230");
141
142 /* Test WDT1 registers (second watchdog) */
143 qtest_writel(qts, K230_WDT1_BASE + K230_WDT_CR, 0xFFFFFFFF);
144 g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_CR), ==,
145 (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) |
146 K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);
147
148 qtest_writel(qts, K230_WDT1_BASE + K230_WDT_TORR, 0xFFFFFFFF);
149 g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_TORR), ==,
150 K230_WDT_TORR_TOP_MASK);
151
152 qtest_quit(qts);
153 }
154
155 static void test_enable_disable(void)
156 {
157 QTestState *qts = qtest_init("-machine k230");
158
159 /* Initially disabled */
160 uint32_t cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);
161 g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, 0);
162
163 /* Enable watchdog */
164 qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);
165 cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);
166 g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, K230_WDT_CR_WDT_EN);
167
168 /* Disable watchdog */
169 qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0);
170 cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);
171 g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, 0);
172
173 qtest_quit(qts);
174 }
175
176 int main(int argc, char *argv[])
177 {
178 g_test_init(&argc, &argv, NULL);
179
180 qtest_add_func("/k230-wdt/register_read_write", test_register_read_write);
181 qtest_add_func("/k230-wdt/counter_restart", test_counter_restart);
182 qtest_add_func("/k230-wdt/interrupt_mode", test_interrupt_mode);
183 qtest_add_func("/k230-wdt/reset_mode", test_reset_mode);
184 qtest_add_func("/k230-wdt/timeout_calculation", test_timeout_calculation);
185 qtest_add_func("/k230-wdt/wdt1_registers", test_wdt1_registers);
186 qtest_add_func("/k230-wdt/enable_disable", test_enable_disable);
187
188 return g_test_run();
189 }