| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include "../bootfile.h" |
| 4 | |
| 5 | #define LOONGARCH_CSR_CRMD 0 |
| 6 | #define LOONGARCH_VIRT_UART 0x1FE001E0 |
| 7 | .section .text |
| 8 | |
| 9 | .globl _start |
| 10 | _start: |
| 11 | /* output char 'A' to UART16550 */ |
| 12 | li.d $t0, LOONGARCH_VIRT_UART |
| 13 | li.w $t1, 'A' |
| 14 | st.b $t1, $t0, 0 |
| 15 | |
| 16 | /* traverse test memory region */ |
| 17 | li.d $t0, LOONGARCH_TEST_MEM_START |
| 18 | li.d $t1, LOONGARCH_TEST_MEM_END |
| 19 | li.d $t2, TEST_MEM_PAGE_SIZE |
| 20 | li.d $t4, LOONGARCH_VIRT_UART |
| 21 | li.w $t5, 'B' |
| 22 | |
| 23 | clean: |
| 24 | st.b $zero, $t0, 0 |
| 25 | add.d $t0, $t0, $t2 |
| 26 | bne $t0, $t1, clean |
| 27 | /* keeps a counter so we can limit the output speed */ |
| 28 | addi.d $t6, $zero, 0 |
| 29 | |
| 30 | mainloop: |
| 31 | li.d $t0, LOONGARCH_TEST_MEM_START |
| 32 | |
| 33 | innerloop: |
| 34 | ld.bu $t3, $t0, 0 |
| 35 | addi.w $t3, $t3, 1 |
| 36 | ext.w.b $t3, $t3 |
| 37 | st.b $t3, $t0, 0 |
| 38 | add.d $t0, $t0, $t2 |
| 39 | bne $t0, $t1, innerloop |
| 40 | |
| 41 | addi.d $t6, $t6, 1 |
| 42 | andi $t6, $t6, 31 |
| 43 | bnez $t6, mainloop |
| 44 | |
| 45 | st.b $t5, $t4, 0 |
| 46 | b mainloop |