| 1 | /* |
| 2 | * QTest testcase for parallel flash with AMD command set |
| 3 | * |
| 4 | * Copyright (c) 2019 Stephen Checkoway |
| 5 | * |
| 6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 7 | * See the COPYING file in the top-level directory. |
| 8 | */ |
| 9 | |
| 10 | #include "qemu/osdep.h" |
| 11 | #include "libqtest.h" |
| 12 | |
| 13 | /* |
| 14 | * To test the pflash_cfi02 device, we run QEMU with the sh4 r2d machine with |
| 15 | * a pflash drive. This enables us to test some flash configurations, but not |
| 16 | * all. In particular, we're limited to a 16-bit wide flash device. |
| 17 | */ |
| 18 | |
| 19 | /* |
| 20 | * These need to match the flash size and address in r2d.c. |
| 21 | * If the flash size changes then the sector_len[] and nb_blocs[] |
| 22 | * values in configuration[] below will need to be updated to match. |
| 23 | */ |
| 24 | #define BASE_ADDR 0x00000000 |
| 25 | |
| 26 | #define UNIFORM_FLASH_SIZE (16 * 1024 * 1024) |
| 27 | #define UNIFORM_FLASH_SECTOR_SIZE (64 * 1024) |
| 28 | |
| 29 | /* These must match the id0, id1 args to pflash_cfi02_register() in r2d.c */ |
| 30 | #define FLASH_ID0 0x0001 |
| 31 | #define FLASH_ID1 0x227E |
| 32 | |
| 33 | /* Use a newtype to keep flash addresses separate from byte addresses. */ |
| 34 | typedef struct { |
| 35 | uint64_t addr; |
| 36 | } faddr; |
| 37 | #define FLASH_ADDR(x) ((faddr) { .addr = (x) }) |
| 38 | |
| 39 | #define CFI_ADDR FLASH_ADDR(0x55) |
| 40 | #define UNLOCK0_ADDR FLASH_ADDR(0x555) |
| 41 | #define UNLOCK1_ADDR FLASH_ADDR(0x2AA) |
| 42 | |
| 43 | #define CFI_CMD 0x98 |
| 44 | #define UNLOCK0_CMD 0xAA |
| 45 | #define UNLOCK1_CMD 0x55 |
| 46 | #define SECOND_UNLOCK_CMD 0x80 |
| 47 | #define AUTOSELECT_CMD 0x90 |
| 48 | #define RESET_CMD 0xF0 |
| 49 | #define PROGRAM_CMD 0xA0 |
| 50 | #define SECTOR_ERASE_CMD 0x30 |
| 51 | #define CHIP_ERASE_CMD 0x10 |
| 52 | #define UNLOCK_BYPASS_CMD 0x20 |
| 53 | #define UNLOCK_BYPASS_RESET_CMD 0x00 |
| 54 | #define ERASE_SUSPEND_CMD 0xB0 |
| 55 | #define ERASE_RESUME_CMD SECTOR_ERASE_CMD |
| 56 | |
| 57 | typedef struct { |
| 58 | int bank_width; |
| 59 | |
| 60 | /* Nonuniform block size. */ |
| 61 | int nb_blocs[4]; |
| 62 | int sector_len[4]; |
| 63 | |
| 64 | QTestState *qtest; |
| 65 | } FlashConfig; |
| 66 | |
| 67 | static char *image_path; |
| 68 | |
| 69 | /* |
| 70 | * The pflash implementation allows some parameters to be unspecified. We want |
| 71 | * to test those configurations but we also need to know the real values in |
| 72 | * our testing code. So after we launch qemu, we'll need a new FlashConfig |
| 73 | * with the correct values filled in. |
| 74 | */ |
| 75 | static FlashConfig expand_config_defaults(const FlashConfig *c) |
| 76 | { |
| 77 | FlashConfig ret = *c; |
| 78 | |
| 79 | if (ret.bank_width == 0) { |
| 80 | ret.bank_width = 2; |
| 81 | } |
| 82 | if (ret.nb_blocs[0] == 0 && ret.sector_len[0] == 0) { |
| 83 | ret.sector_len[0] = UNIFORM_FLASH_SECTOR_SIZE; |
| 84 | ret.nb_blocs[0] = UNIFORM_FLASH_SIZE / UNIFORM_FLASH_SECTOR_SIZE; |
| 85 | } |
| 86 | |
| 87 | /* XXX: Limitations of test harness. */ |
| 88 | assert(ret.bank_width == 2); |
| 89 | return ret; |
| 90 | } |
| 91 | |
| 92 | /* |
| 93 | * Return a bit mask suitable for extracting the least significant |
| 94 | * status/query response from an interleaved response. |
| 95 | */ |
| 96 | static inline uint64_t device_mask(const FlashConfig *c) |
| 97 | { |
| 98 | return (uint64_t)-1; |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * Return a bit mask exactly as long as the bank_width. |
| 103 | */ |
| 104 | static inline uint64_t bank_mask(const FlashConfig *c) |
| 105 | { |
| 106 | if (c->bank_width == 8) { |
| 107 | return (uint64_t)-1; |
| 108 | } |
| 109 | return (1ULL << (c->bank_width * 8)) - 1ULL; |
| 110 | } |
| 111 | |
| 112 | static inline void flash_write(const FlashConfig *c, uint64_t byte_addr, |
| 113 | uint64_t data) |
| 114 | { |
| 115 | /* Sanity check our tests. */ |
| 116 | assert((data & ~bank_mask(c)) == 0); |
| 117 | uint64_t addr = BASE_ADDR + byte_addr; |
| 118 | switch (c->bank_width) { |
| 119 | case 1: |
| 120 | qtest_writeb(c->qtest, addr, data); |
| 121 | break; |
| 122 | case 2: |
| 123 | qtest_writew(c->qtest, addr, data); |
| 124 | break; |
| 125 | case 4: |
| 126 | qtest_writel(c->qtest, addr, data); |
| 127 | break; |
| 128 | case 8: |
| 129 | qtest_writeq(c->qtest, addr, data); |
| 130 | break; |
| 131 | default: |
| 132 | abort(); |
| 133 | } |
| 134 | } |
| 135 | |
| 136 | static inline uint64_t flash_read(const FlashConfig *c, uint64_t byte_addr) |
| 137 | { |
| 138 | uint64_t addr = BASE_ADDR + byte_addr; |
| 139 | switch (c->bank_width) { |
| 140 | case 1: |
| 141 | return qtest_readb(c->qtest, addr); |
| 142 | case 2: |
| 143 | return qtest_readw(c->qtest, addr); |
| 144 | case 4: |
| 145 | return qtest_readl(c->qtest, addr); |
| 146 | case 8: |
| 147 | return qtest_readq(c->qtest, addr); |
| 148 | default: |
| 149 | abort(); |
| 150 | } |
| 151 | } |
| 152 | |
| 153 | /* |
| 154 | * Convert a flash address expressed in the maximum width of the device as a |
| 155 | * byte address. |
| 156 | */ |
| 157 | static inline uint64_t as_byte_addr(const FlashConfig *c, faddr flash_addr) |
| 158 | { |
| 159 | /* |
| 160 | * Command addresses are always given as addresses in the maximum |
| 161 | * supported bus size for the flash chip. So an x8/x16 chip in x8 mode |
| 162 | * uses addresses 0xAAA and 0x555 to unlock because the least significant |
| 163 | * bit is ignored. (0x555 rather than 0x554 is traditional.) |
| 164 | * |
| 165 | * In general we need to multiply by the maximum device width. |
| 166 | */ |
| 167 | return flash_addr.addr * c->bank_width; |
| 168 | } |
| 169 | |
| 170 | /* |
| 171 | * Return the command value or expected status replicated across all devices. |
| 172 | */ |
| 173 | static inline uint64_t replicate(const FlashConfig *c, uint64_t data) |
| 174 | { |
| 175 | /* Sanity check our tests. */ |
| 176 | assert((data & ~device_mask(c)) == 0); |
| 177 | return data; |
| 178 | } |
| 179 | |
| 180 | static inline void flash_cmd(const FlashConfig *c, faddr cmd_addr, |
| 181 | uint8_t cmd) |
| 182 | { |
| 183 | flash_write(c, as_byte_addr(c, cmd_addr), replicate(c, cmd)); |
| 184 | } |
| 185 | |
| 186 | static inline uint64_t flash_query(const FlashConfig *c, faddr query_addr) |
| 187 | { |
| 188 | return flash_read(c, as_byte_addr(c, query_addr)); |
| 189 | } |
| 190 | |
| 191 | static inline uint64_t flash_query_1(const FlashConfig *c, faddr query_addr) |
| 192 | { |
| 193 | return flash_query(c, query_addr) & device_mask(c); |
| 194 | } |
| 195 | |
| 196 | static void unlock(const FlashConfig *c) |
| 197 | { |
| 198 | flash_cmd(c, UNLOCK0_ADDR, UNLOCK0_CMD); |
| 199 | flash_cmd(c, UNLOCK1_ADDR, UNLOCK1_CMD); |
| 200 | } |
| 201 | |
| 202 | static void reset(const FlashConfig *c) |
| 203 | { |
| 204 | flash_cmd(c, FLASH_ADDR(0), RESET_CMD); |
| 205 | } |
| 206 | |
| 207 | static void sector_erase(const FlashConfig *c, uint64_t byte_addr) |
| 208 | { |
| 209 | unlock(c); |
| 210 | flash_cmd(c, UNLOCK0_ADDR, SECOND_UNLOCK_CMD); |
| 211 | unlock(c); |
| 212 | flash_write(c, byte_addr, replicate(c, SECTOR_ERASE_CMD)); |
| 213 | } |
| 214 | |
| 215 | static void wait_for_completion(const FlashConfig *c, uint64_t byte_addr) |
| 216 | { |
| 217 | /* If DQ6 is toggling, step the clock and ensure the toggle stops. */ |
| 218 | const uint64_t dq6 = replicate(c, 0x40); |
| 219 | if ((flash_read(c, byte_addr) & dq6) ^ (flash_read(c, byte_addr) & dq6)) { |
| 220 | /* Wait for erase or program to finish. */ |
| 221 | qtest_clock_step_next(c->qtest); |
| 222 | /* Ensure that DQ6 has stopped toggling. */ |
| 223 | g_assert_cmphex(flash_read(c, byte_addr), ==, flash_read(c, byte_addr)); |
| 224 | } |
| 225 | } |
| 226 | |
| 227 | static void bypass_program(const FlashConfig *c, uint64_t byte_addr, |
| 228 | uint16_t data) |
| 229 | { |
| 230 | flash_cmd(c, UNLOCK0_ADDR, PROGRAM_CMD); |
| 231 | flash_write(c, byte_addr, data); |
| 232 | /* |
| 233 | * Data isn't valid until DQ6 stops toggling. We don't model this as |
| 234 | * writes are immediate, but if this changes in the future, we can wait |
| 235 | * until the program is complete. |
| 236 | */ |
| 237 | wait_for_completion(c, byte_addr); |
| 238 | } |
| 239 | |
| 240 | static void program(const FlashConfig *c, uint64_t byte_addr, uint16_t data) |
| 241 | { |
| 242 | unlock(c); |
| 243 | bypass_program(c, byte_addr, data); |
| 244 | } |
| 245 | |
| 246 | static void chip_erase(const FlashConfig *c) |
| 247 | { |
| 248 | unlock(c); |
| 249 | flash_cmd(c, UNLOCK0_ADDR, SECOND_UNLOCK_CMD); |
| 250 | unlock(c); |
| 251 | flash_cmd(c, UNLOCK0_ADDR, CHIP_ERASE_CMD); |
| 252 | } |
| 253 | |
| 254 | static void erase_suspend(const FlashConfig *c) |
| 255 | { |
| 256 | flash_cmd(c, FLASH_ADDR(0), ERASE_SUSPEND_CMD); |
| 257 | } |
| 258 | |
| 259 | static void erase_resume(const FlashConfig *c) |
| 260 | { |
| 261 | flash_cmd(c, FLASH_ADDR(0), ERASE_RESUME_CMD); |
| 262 | } |
| 263 | |
| 264 | /* |
| 265 | * Test flash commands with a variety of device geometry. |
| 266 | */ |
| 267 | static void test_geometry(const void *opaque) |
| 268 | { |
| 269 | const FlashConfig *config = opaque; |
| 270 | QTestState *qtest; |
| 271 | qtest = qtest_initf("-M r2d" |
| 272 | " -drive if=pflash,file=%s,format=raw,copy-on-read=on" |
| 273 | /* Device geometry properties. */ |
| 274 | " -global driver=cfi.pflash02," |
| 275 | "property=num-blocks0,value=%d" |
| 276 | " -global driver=cfi.pflash02," |
| 277 | "property=sector-length0,value=%d" |
| 278 | " -global driver=cfi.pflash02," |
| 279 | "property=num-blocks1,value=%d" |
| 280 | " -global driver=cfi.pflash02," |
| 281 | "property=sector-length1,value=%d" |
| 282 | " -global driver=cfi.pflash02," |
| 283 | "property=num-blocks2,value=%d" |
| 284 | " -global driver=cfi.pflash02," |
| 285 | "property=sector-length2,value=%d" |
| 286 | " -global driver=cfi.pflash02," |
| 287 | "property=num-blocks3,value=%d" |
| 288 | " -global driver=cfi.pflash02," |
| 289 | "property=sector-length3,value=%d", |
| 290 | image_path, |
| 291 | config->nb_blocs[0], |
| 292 | config->sector_len[0], |
| 293 | config->nb_blocs[1], |
| 294 | config->sector_len[1], |
| 295 | config->nb_blocs[2], |
| 296 | config->sector_len[2], |
| 297 | config->nb_blocs[3], |
| 298 | config->sector_len[3]); |
| 299 | FlashConfig explicit_config = expand_config_defaults(config); |
| 300 | explicit_config.qtest = qtest; |
| 301 | const FlashConfig *c = &explicit_config; |
| 302 | |
| 303 | /* Check the IDs. */ |
| 304 | unlock(c); |
| 305 | flash_cmd(c, UNLOCK0_ADDR, AUTOSELECT_CMD); |
| 306 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0)), ==, replicate(c, FLASH_ID0)); |
| 307 | if (c->bank_width >= 2) { |
| 308 | /* |
| 309 | * XXX: The ID returned by the r2d flash chip is 16 bits which |
| 310 | * wouldn't happen with an 8-bit device. It would probably be best to |
| 311 | * prohibit addresses larger than the device width in pflash_cfi02.c, |
| 312 | * but then we couldn't test smaller device widths at all. |
| 313 | */ |
| 314 | g_assert_cmphex(flash_query(c, FLASH_ADDR(1)), ==, |
| 315 | replicate(c, FLASH_ID1)); |
| 316 | } |
| 317 | reset(c); |
| 318 | |
| 319 | /* Check the erase blocks. */ |
| 320 | flash_cmd(c, CFI_ADDR, CFI_CMD); |
| 321 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x10)), ==, replicate(c, 'Q')); |
| 322 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x11)), ==, replicate(c, 'R')); |
| 323 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x12)), ==, replicate(c, 'Y')); |
| 324 | |
| 325 | /* Num erase regions. */ |
| 326 | int nb_erase_regions = flash_query_1(c, FLASH_ADDR(0x2C)); |
| 327 | g_assert_cmphex(nb_erase_regions, ==, |
| 328 | !!c->nb_blocs[0] + !!c->nb_blocs[1] + !!c->nb_blocs[2] + |
| 329 | !!c->nb_blocs[3]); |
| 330 | |
| 331 | /* Check device length. */ |
| 332 | uint32_t device_len = 1 << flash_query_1(c, FLASH_ADDR(0x27)); |
| 333 | g_assert_cmphex(device_len, ==, UNIFORM_FLASH_SIZE); |
| 334 | |
| 335 | /* Check that erase suspend to read/write is supported. */ |
| 336 | uint16_t pri = flash_query_1(c, FLASH_ADDR(0x15)) + |
| 337 | (flash_query_1(c, FLASH_ADDR(0x16)) << 8); |
| 338 | g_assert_cmpint(pri, >=, 0x2D + 4 * nb_erase_regions); |
| 339 | g_assert_cmpint(flash_query(c, FLASH_ADDR(pri + 0)), ==, replicate(c, 'P')); |
| 340 | g_assert_cmpint(flash_query(c, FLASH_ADDR(pri + 1)), ==, replicate(c, 'R')); |
| 341 | g_assert_cmpint(flash_query(c, FLASH_ADDR(pri + 2)), ==, replicate(c, 'I')); |
| 342 | g_assert_cmpint(flash_query_1(c, FLASH_ADDR(pri + 6)), ==, 2); /* R/W */ |
| 343 | reset(c); |
| 344 | |
| 345 | const uint64_t dq7 = replicate(c, 0x80); |
| 346 | const uint64_t dq6 = replicate(c, 0x40); |
| 347 | const uint64_t dq3 = replicate(c, 0x08); |
| 348 | const uint64_t dq2 = replicate(c, 0x04); |
| 349 | |
| 350 | uint64_t byte_addr = 0; |
| 351 | for (int region = 0; region < nb_erase_regions; ++region) { |
| 352 | uint64_t base = 0x2D + 4 * region; |
| 353 | flash_cmd(c, CFI_ADDR, CFI_CMD); |
| 354 | uint32_t nb_sectors = flash_query_1(c, FLASH_ADDR(base + 0)) + |
| 355 | (flash_query_1(c, FLASH_ADDR(base + 1)) << 8) + 1; |
| 356 | uint32_t sector_len = (flash_query_1(c, FLASH_ADDR(base + 2)) << 8) + |
| 357 | (flash_query_1(c, FLASH_ADDR(base + 3)) << 16); |
| 358 | g_assert_cmphex(nb_sectors, ==, c->nb_blocs[region]); |
| 359 | g_assert_cmphex(sector_len, ==, c->sector_len[region]); |
| 360 | reset(c); |
| 361 | |
| 362 | /* Erase and program sector. */ |
| 363 | for (uint32_t i = 0; i < nb_sectors; ++i) { |
| 364 | sector_erase(c, byte_addr); |
| 365 | |
| 366 | /* Check that DQ3 is 0. */ |
| 367 | g_assert_cmphex(flash_read(c, byte_addr) & dq3, ==, 0); |
| 368 | qtest_clock_step_next(c->qtest); /* Step over the 50 us timeout. */ |
| 369 | |
| 370 | /* Check that DQ3 is 1. */ |
| 371 | uint64_t status0 = flash_read(c, byte_addr); |
| 372 | g_assert_cmphex(status0 & dq3, ==, dq3); |
| 373 | |
| 374 | /* DQ7 is 0 during an erase. */ |
| 375 | g_assert_cmphex(status0 & dq7, ==, 0); |
| 376 | uint64_t status1 = flash_read(c, byte_addr); |
| 377 | |
| 378 | /* DQ6 toggles during an erase. */ |
| 379 | g_assert_cmphex(status0 & dq6, ==, ~status1 & dq6); |
| 380 | |
| 381 | /* Wait for erase to complete. */ |
| 382 | wait_for_completion(c, byte_addr); |
| 383 | |
| 384 | /* Ensure DQ6 has stopped toggling. */ |
| 385 | g_assert_cmphex(flash_read(c, byte_addr), ==, |
| 386 | flash_read(c, byte_addr)); |
| 387 | |
| 388 | /* Now the data should be valid. */ |
| 389 | g_assert_cmphex(flash_read(c, byte_addr), ==, bank_mask(c)); |
| 390 | |
| 391 | /* Program a bit pattern. */ |
| 392 | program(c, byte_addr, 0x55); |
| 393 | g_assert_cmphex(flash_read(c, byte_addr) & 0xFF, ==, 0x55); |
| 394 | program(c, byte_addr, 0xA5); |
| 395 | g_assert_cmphex(flash_read(c, byte_addr) & 0xFF, ==, 0x05); |
| 396 | byte_addr += sector_len; |
| 397 | } |
| 398 | } |
| 399 | |
| 400 | /* Erase the chip. */ |
| 401 | chip_erase(c); |
| 402 | /* Read toggle. */ |
| 403 | uint64_t status0 = flash_read(c, 0); |
| 404 | /* DQ7 is 0 during an erase. */ |
| 405 | g_assert_cmphex(status0 & dq7, ==, 0); |
| 406 | uint64_t status1 = flash_read(c, 0); |
| 407 | /* DQ6 toggles during an erase. */ |
| 408 | g_assert_cmphex(status0 & dq6, ==, ~status1 & dq6); |
| 409 | /* Wait for erase to complete. */ |
| 410 | qtest_clock_step_next(c->qtest); |
| 411 | /* Ensure DQ6 has stopped toggling. */ |
| 412 | g_assert_cmphex(flash_read(c, 0), ==, flash_read(c, 0)); |
| 413 | /* Now the data should be valid. */ |
| 414 | |
| 415 | for (int region = 0; region < nb_erase_regions; ++region) { |
| 416 | for (uint32_t i = 0; i < c->nb_blocs[region]; ++i) { |
| 417 | byte_addr = (uint64_t)i * c->sector_len[region]; |
| 418 | g_assert_cmphex(flash_read(c, byte_addr), ==, bank_mask(c)); |
| 419 | } |
| 420 | } |
| 421 | |
| 422 | /* Unlock bypass */ |
| 423 | unlock(c); |
| 424 | flash_cmd(c, UNLOCK0_ADDR, UNLOCK_BYPASS_CMD); |
| 425 | bypass_program(c, 0 * c->bank_width, 0x01); |
| 426 | bypass_program(c, 1 * c->bank_width, 0x23); |
| 427 | bypass_program(c, 2 * c->bank_width, 0x45); |
| 428 | /* |
| 429 | * Test that bypass programming, unlike normal programming can use any |
| 430 | * address for the PROGRAM_CMD. |
| 431 | */ |
| 432 | flash_cmd(c, FLASH_ADDR(3 * c->bank_width), PROGRAM_CMD); |
| 433 | flash_write(c, 3 * c->bank_width, 0x67); |
| 434 | wait_for_completion(c, 3 * c->bank_width); |
| 435 | flash_cmd(c, FLASH_ADDR(0), UNLOCK_BYPASS_RESET_CMD); |
| 436 | bypass_program(c, 4 * c->bank_width, 0x89); /* Should fail. */ |
| 437 | g_assert_cmphex(flash_read(c, 0 * c->bank_width), ==, 0x01); |
| 438 | g_assert_cmphex(flash_read(c, 1 * c->bank_width), ==, 0x23); |
| 439 | g_assert_cmphex(flash_read(c, 2 * c->bank_width), ==, 0x45); |
| 440 | g_assert_cmphex(flash_read(c, 3 * c->bank_width), ==, 0x67); |
| 441 | g_assert_cmphex(flash_read(c, 4 * c->bank_width), ==, bank_mask(c)); |
| 442 | |
| 443 | /* Test ignored high order bits of address. */ |
| 444 | flash_cmd(c, FLASH_ADDR(0x5555), UNLOCK0_CMD); |
| 445 | flash_cmd(c, FLASH_ADDR(0x2AAA), UNLOCK1_CMD); |
| 446 | flash_cmd(c, FLASH_ADDR(0x5555), AUTOSELECT_CMD); |
| 447 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0)), ==, replicate(c, FLASH_ID0)); |
| 448 | reset(c); |
| 449 | |
| 450 | /* |
| 451 | * Program a word on each sector, erase one or two sectors per region, and |
| 452 | * verify that all of those, and only those, are erased. |
| 453 | */ |
| 454 | byte_addr = 0; |
| 455 | for (int region = 0; region < nb_erase_regions; ++region) { |
| 456 | for (int i = 0; i < config->nb_blocs[region]; ++i) { |
| 457 | program(c, byte_addr, 0); |
| 458 | byte_addr += config->sector_len[region]; |
| 459 | } |
| 460 | } |
| 461 | unlock(c); |
| 462 | flash_cmd(c, UNLOCK0_ADDR, SECOND_UNLOCK_CMD); |
| 463 | unlock(c); |
| 464 | byte_addr = 0; |
| 465 | const uint64_t erase_cmd = replicate(c, SECTOR_ERASE_CMD); |
| 466 | for (int region = 0; region < nb_erase_regions; ++region) { |
| 467 | flash_write(c, byte_addr, erase_cmd); |
| 468 | if (c->nb_blocs[region] > 1) { |
| 469 | flash_write(c, byte_addr + c->sector_len[region], erase_cmd); |
| 470 | } |
| 471 | byte_addr += c->sector_len[region] * c->nb_blocs[region]; |
| 472 | } |
| 473 | |
| 474 | qtest_clock_step_next(c->qtest); /* Step over the 50 us timeout. */ |
| 475 | wait_for_completion(c, 0); |
| 476 | byte_addr = 0; |
| 477 | for (int region = 0; region < nb_erase_regions; ++region) { |
| 478 | for (int i = 0; i < config->nb_blocs[region]; ++i) { |
| 479 | if (i < 2) { |
| 480 | g_assert_cmphex(flash_read(c, byte_addr), ==, bank_mask(c)); |
| 481 | } else { |
| 482 | g_assert_cmphex(flash_read(c, byte_addr), ==, 0); |
| 483 | } |
| 484 | byte_addr += config->sector_len[region]; |
| 485 | } |
| 486 | } |
| 487 | |
| 488 | /* Test erase suspend/resume during erase timeout. */ |
| 489 | sector_erase(c, 0); |
| 490 | /* |
| 491 | * Check that DQ 3 is 0 and DQ6 and DQ2 are toggling in the sector being |
| 492 | * erased as well as in a sector not being erased. |
| 493 | */ |
| 494 | byte_addr = c->sector_len[0]; |
| 495 | status0 = flash_read(c, 0); |
| 496 | status1 = flash_read(c, 0); |
| 497 | g_assert_cmpint(status0 & dq3, ==, 0); |
| 498 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 499 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 500 | status0 = flash_read(c, byte_addr); |
| 501 | status1 = flash_read(c, byte_addr); |
| 502 | g_assert_cmpint(status0 & dq3, ==, 0); |
| 503 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 504 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 505 | |
| 506 | /* |
| 507 | * Check that after suspending, DQ6 does not toggle but DQ2 does toggle in |
| 508 | * an erase suspended sector but that neither toggle (we should be |
| 509 | * getting data) in a sector not being erased. |
| 510 | */ |
| 511 | erase_suspend(c); |
| 512 | status0 = flash_read(c, 0); |
| 513 | status1 = flash_read(c, 0); |
| 514 | g_assert_cmpint(status0 & dq6, ==, status1 & dq6); |
| 515 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 516 | g_assert_cmpint(flash_read(c, byte_addr), ==, flash_read(c, byte_addr)); |
| 517 | |
| 518 | /* Check that after resuming, DQ3 is 1 and DQ6 and DQ2 toggle. */ |
| 519 | erase_resume(c); |
| 520 | status0 = flash_read(c, 0); |
| 521 | status1 = flash_read(c, 0); |
| 522 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 523 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 524 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 525 | status0 = flash_read(c, byte_addr); |
| 526 | status1 = flash_read(c, byte_addr); |
| 527 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 528 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 529 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 530 | wait_for_completion(c, 0); |
| 531 | |
| 532 | /* Repeat this process but this time suspend after the timeout. */ |
| 533 | sector_erase(c, 0); |
| 534 | qtest_clock_step_next(c->qtest); |
| 535 | /* |
| 536 | * Check that DQ 3 is 1 and DQ6 and DQ2 are toggling in the sector being |
| 537 | * erased as well as in a sector not being erased. |
| 538 | */ |
| 539 | byte_addr = c->sector_len[0]; |
| 540 | status0 = flash_read(c, 0); |
| 541 | status1 = flash_read(c, 0); |
| 542 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 543 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 544 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 545 | status0 = flash_read(c, byte_addr); |
| 546 | status1 = flash_read(c, byte_addr); |
| 547 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 548 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 549 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 550 | |
| 551 | /* |
| 552 | * Check that after suspending, DQ6 does not toggle but DQ2 does toggle in |
| 553 | * an erase suspended sector but that neither toggle (we should be |
| 554 | * getting data) in a sector not being erased. |
| 555 | */ |
| 556 | erase_suspend(c); |
| 557 | status0 = flash_read(c, 0); |
| 558 | status1 = flash_read(c, 0); |
| 559 | g_assert_cmpint(status0 & dq6, ==, status1 & dq6); |
| 560 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 561 | g_assert_cmpint(flash_read(c, byte_addr), ==, flash_read(c, byte_addr)); |
| 562 | |
| 563 | /* Check that after resuming, DQ3 is 1 and DQ6 and DQ2 toggle. */ |
| 564 | erase_resume(c); |
| 565 | status0 = flash_read(c, 0); |
| 566 | status1 = flash_read(c, 0); |
| 567 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 568 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 569 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 570 | status0 = flash_read(c, byte_addr); |
| 571 | status1 = flash_read(c, byte_addr); |
| 572 | g_assert_cmpint(status0 & dq3, ==, dq3); |
| 573 | g_assert_cmpint(status0 & dq6, ==, ~status1 & dq6); |
| 574 | g_assert_cmpint(status0 & dq2, ==, ~status1 & dq2); |
| 575 | wait_for_completion(c, 0); |
| 576 | |
| 577 | qtest_quit(qtest); |
| 578 | } |
| 579 | |
| 580 | /* |
| 581 | * Test that |
| 582 | * 1. enter autoselect mode; |
| 583 | * 2. enter CFI mode; and then |
| 584 | * 3. exit CFI mode |
| 585 | * leaves the flash device in autoselect mode. |
| 586 | */ |
| 587 | static void test_cfi_in_autoselect(const void *opaque) |
| 588 | { |
| 589 | const FlashConfig *config = opaque; |
| 590 | QTestState *qtest; |
| 591 | qtest = qtest_initf("-M r2d" |
| 592 | " -drive if=pflash,file=%s,format=raw,copy-on-read=on", |
| 593 | image_path); |
| 594 | FlashConfig explicit_config = expand_config_defaults(config); |
| 595 | explicit_config.qtest = qtest; |
| 596 | const FlashConfig *c = &explicit_config; |
| 597 | |
| 598 | /* 1. Enter autoselect. */ |
| 599 | unlock(c); |
| 600 | flash_cmd(c, UNLOCK0_ADDR, AUTOSELECT_CMD); |
| 601 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0)), ==, replicate(c, FLASH_ID0)); |
| 602 | |
| 603 | /* 2. Enter CFI. */ |
| 604 | flash_cmd(c, CFI_ADDR, CFI_CMD); |
| 605 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x10)), ==, replicate(c, 'Q')); |
| 606 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x11)), ==, replicate(c, 'R')); |
| 607 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0x12)), ==, replicate(c, 'Y')); |
| 608 | |
| 609 | /* 3. Exit CFI. */ |
| 610 | reset(c); |
| 611 | g_assert_cmphex(flash_query(c, FLASH_ADDR(0)), ==, replicate(c, FLASH_ID0)); |
| 612 | |
| 613 | qtest_quit(qtest); |
| 614 | } |
| 615 | |
| 616 | static void cleanup(void *opaque) |
| 617 | { |
| 618 | unlink(image_path); |
| 619 | g_free(image_path); |
| 620 | } |
| 621 | |
| 622 | /* |
| 623 | * XXX: Tests are limited to bank_width = 2 for now because that's what |
| 624 | * hw/sh4/r2d.c has. |
| 625 | */ |
| 626 | static const FlashConfig configuration[] = { |
| 627 | /* One x16 device. */ |
| 628 | { |
| 629 | .bank_width = 2, |
| 630 | }, |
| 631 | /* Nonuniform sectors (top boot). */ |
| 632 | { |
| 633 | .bank_width = 2, |
| 634 | .nb_blocs = { 127, 1, 2, 1 }, |
| 635 | .sector_len = { 0x20000, 0x10000, 0x04000, 0x08000 }, |
| 636 | }, |
| 637 | /* Nonuniform sectors (bottom boot). */ |
| 638 | { |
| 639 | .bank_width = 2, |
| 640 | .nb_blocs = { 1, 2, 1, 127 }, |
| 641 | .sector_len = { 0x08000, 0x04000, 0x10000, 0x20000 }, |
| 642 | }, |
| 643 | }; |
| 644 | |
| 645 | int main(int argc, char **argv) |
| 646 | { |
| 647 | GError *err = NULL; |
| 648 | int fd = g_file_open_tmp("qtest.XXXXXX", &image_path, &err); |
| 649 | g_assert_no_error(err); |
| 650 | |
| 651 | if (ftruncate(fd, UNIFORM_FLASH_SIZE) < 0) { |
| 652 | int error_code = errno; |
| 653 | close(fd); |
| 654 | cleanup(NULL); |
| 655 | g_printerr("Failed to truncate file %s to %u MB: %s\n", image_path, |
| 656 | UNIFORM_FLASH_SIZE, strerror(error_code)); |
| 657 | exit(EXIT_FAILURE); |
| 658 | } |
| 659 | close(fd); |
| 660 | |
| 661 | qtest_add_abrt_handler(cleanup, NULL); |
| 662 | g_test_init(&argc, &argv, NULL); |
| 663 | |
| 664 | size_t nb_configurations = sizeof configuration / sizeof configuration[0]; |
| 665 | for (size_t i = 0; i < nb_configurations; ++i) { |
| 666 | const FlashConfig *config = &configuration[i]; |
| 667 | char *path = g_strdup_printf("pflash-cfi02" |
| 668 | "/geometry/%dx%x-%dx%x-%dx%x-%dx%x" |
| 669 | "/%d", |
| 670 | config->nb_blocs[0], |
| 671 | config->sector_len[0], |
| 672 | config->nb_blocs[1], |
| 673 | config->sector_len[1], |
| 674 | config->nb_blocs[2], |
| 675 | config->sector_len[2], |
| 676 | config->nb_blocs[3], |
| 677 | config->sector_len[3], |
| 678 | config->bank_width); |
| 679 | qtest_add_data_func(path, config, test_geometry); |
| 680 | g_free(path); |
| 681 | } |
| 682 | |
| 683 | qtest_add_data_func("pflash-cfi02/cfi-in-autoselect", &configuration[0], |
| 684 | test_cfi_in_autoselect); |
| 685 | int result = g_test_run(); |
| 686 | cleanup(NULL); |
| 687 | return result; |
| 688 | } |