| 1 | /* |
| 2 | * PowerNV XSCOM Bus |
| 3 | * |
| 4 | * Copyright (c) 2024, IBM Corporation. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #ifndef PNV_XSCOM_H |
| 10 | #define PNV_XSCOM_H |
| 11 | |
| 12 | #define SMT 4 /* some tests will break if less than 4 */ |
| 13 | |
| 14 | typedef enum PnvChipType { |
| 15 | PNV_CHIP_POWER8, /* AKA Venice */ |
| 16 | PNV_CHIP_POWER9, /* AKA Nimbus */ |
| 17 | PNV_CHIP_POWER10, |
| 18 | PNV_CHIP_POWER11, |
| 19 | } PnvChipType; |
| 20 | |
| 21 | typedef struct PnvChip { |
| 22 | PnvChipType chip_type; |
| 23 | const char *cpu_model; |
| 24 | uint64_t xscom_base; |
| 25 | uint64_t cfam_id; |
| 26 | uint32_t first_core; |
| 27 | uint32_t num_i2c; |
| 28 | } PnvChip; |
| 29 | |
| 30 | static const PnvChip pnv_chips[] = { |
| 31 | { |
| 32 | .chip_type = PNV_CHIP_POWER8, |
| 33 | .cpu_model = "POWER8", |
| 34 | .xscom_base = 0x0003fc0000000000ull, |
| 35 | .cfam_id = 0x220ea04980000000ull, |
| 36 | .first_core = 0x1, |
| 37 | .num_i2c = 0, |
| 38 | }, |
| 39 | { |
| 40 | .chip_type = PNV_CHIP_POWER9, |
| 41 | .cpu_model = "POWER9", |
| 42 | .xscom_base = 0x000603fc00000000ull, |
| 43 | .cfam_id = 0x220d104900008000ull, |
| 44 | .first_core = 0x0, |
| 45 | .num_i2c = 4, |
| 46 | }, |
| 47 | { |
| 48 | .chip_type = PNV_CHIP_POWER10, |
| 49 | .cpu_model = "POWER10", |
| 50 | .xscom_base = 0x000603fc00000000ull, |
| 51 | .cfam_id = 0x220da04980000000ull, |
| 52 | .first_core = 0x0, |
| 53 | .num_i2c = 4, |
| 54 | }, |
| 55 | { |
| 56 | .chip_type = PNV_CHIP_POWER11, |
| 57 | .cpu_model = "Power11", |
| 58 | .xscom_base = 0x000603fc00000000ull, |
| 59 | .cfam_id = 0x220da04980000000ull, |
| 60 | .first_core = 0x0, |
| 61 | .num_i2c = 0, |
| 62 | }, |
| 63 | }; |
| 64 | |
| 65 | static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba) |
| 66 | { |
| 67 | uint64_t addr = chip->xscom_base; |
| 68 | |
| 69 | if ((chip->chip_type == PNV_CHIP_POWER11) || |
| 70 | (chip->chip_type == PNV_CHIP_POWER10) || |
| 71 | (chip->chip_type == PNV_CHIP_POWER9)) { |
| 72 | addr |= ((uint64_t) pcba << 3); |
| 73 | } else { |
| 74 | addr |= (((uint64_t) pcba << 4) & ~0xffull) | |
| 75 | (((uint64_t) pcba << 3) & 0x78); |
| 76 | } |
| 77 | return addr; |
| 78 | } |
| 79 | |
| 80 | static const char *pnv_get_machine_type(enum PnvChipType chip_type) |
| 81 | { |
| 82 | static const char *const machine_types[] = { |
| 83 | [PNV_CHIP_POWER8] = "powernv8", |
| 84 | [PNV_CHIP_POWER9] = "powernv9", |
| 85 | [PNV_CHIP_POWER10] = "powernv10", |
| 86 | [PNV_CHIP_POWER11] = "powernv11", |
| 87 | }; |
| 88 | |
| 89 | g_assert(chip_type <= PNV_CHIP_POWER11); |
| 90 | |
| 91 | return machine_types[chip_type]; |
| 92 | } |
| 93 | |
| 94 | #endif /* PNV_XSCOM_H */ |