| 1 | /* |
| 2 | * QTest testcase for the watchdog timer of HiFive 1 rev b. |
| 3 | * |
| 4 | * Copyright (c) 2023 SiFive, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2 or later, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along with |
| 16 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #include "qemu/osdep.h" |
| 20 | #include "qemu/timer.h" |
| 21 | #include "qemu/bitops.h" |
| 22 | #include "libqtest.h" |
| 23 | #include "hw/core/registerfields.h" |
| 24 | #include "hw/misc/sifive_e_aon.h" |
| 25 | |
| 26 | FIELD(AON_WDT_WDOGCFG, SCALE, 0, 4) |
| 27 | FIELD(AON_WDT_WDOGCFG, RSVD0, 4, 4) |
| 28 | FIELD(AON_WDT_WDOGCFG, RSTEN, 8, 1) |
| 29 | FIELD(AON_WDT_WDOGCFG, ZEROCMP, 9, 1) |
| 30 | FIELD(AON_WDT_WDOGCFG, RSVD1, 10, 2) |
| 31 | FIELD(AON_WDT_WDOGCFG, EN_ALWAYS, 12, 1) |
| 32 | FIELD(AON_WDT_WDOGCFG, EN_CORE_AWAKE, 13, 1) |
| 33 | FIELD(AON_WDT_WDOGCFG, RSVD2, 14, 14) |
| 34 | FIELD(AON_WDT_WDOGCFG, IP0, 28, 1) |
| 35 | FIELD(AON_WDT_WDOGCFG, RSVD3, 29, 3) |
| 36 | |
| 37 | #define WDOG_BASE (0x10000000) |
| 38 | #define WDOGCFG (0x0) |
| 39 | #define WDOGCOUNT (0x8) |
| 40 | #define WDOGS (0x10) |
| 41 | #define WDOGFEED (0x18) |
| 42 | #define WDOGKEY (0x1c) |
| 43 | #define WDOGCMP0 (0x20) |
| 44 | |
| 45 | #define SIFIVE_E_AON_WDOGKEY (0x51F15E) |
| 46 | #define SIFIVE_E_AON_WDOGFEED (0xD09F00D) |
| 47 | #define SIFIVE_E_LFCLK_DEFAULT_FREQ (32768) |
| 48 | |
| 49 | static void test_init(QTestState *qts) |
| 50 | { |
| 51 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 52 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0); |
| 53 | |
| 54 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 55 | qtest_writel(qts, WDOG_BASE + WDOGCFG, 0); |
| 56 | |
| 57 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 58 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF); |
| 59 | } |
| 60 | |
| 61 | static void test_wdogcount(void) |
| 62 | { |
| 63 | uint64_t tmp; |
| 64 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 65 | |
| 66 | test_init(qts); |
| 67 | |
| 68 | tmp = qtest_readl(qts, WDOG_BASE + WDOGCOUNT); |
| 69 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xBEEF); |
| 70 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == tmp); |
| 71 | |
| 72 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 73 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xBEEF); |
| 74 | g_assert(0xBEEF == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 75 | |
| 76 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 77 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0xAAAAAAAA); |
| 78 | g_assert(0x2AAAAAAA == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 79 | |
| 80 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 81 | qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xAAAAAAAA); |
| 82 | g_assert(0x2AAAAAAA == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 83 | |
| 84 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 85 | qtest_writel(qts, WDOG_BASE + WDOGFEED, SIFIVE_E_AON_WDOGFEED); |
| 86 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 87 | |
| 88 | qtest_quit(qts); |
| 89 | } |
| 90 | |
| 91 | static void test_wdogcfg(void) |
| 92 | { |
| 93 | uint32_t tmp_cfg; |
| 94 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 95 | |
| 96 | test_init(qts); |
| 97 | |
| 98 | tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 99 | qtest_writel(qts, WDOG_BASE + WDOGCFG, 0xFFFFFFFF); |
| 100 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCFG) == tmp_cfg); |
| 101 | |
| 102 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 103 | qtest_writel(qts, WDOG_BASE + WDOGCFG, 0xFFFFFFFF); |
| 104 | g_assert(0xFFFFFFFF == qtest_readl(qts, WDOG_BASE + WDOGCFG)); |
| 105 | |
| 106 | tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 107 | g_assert(15 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, SCALE)); |
| 108 | g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 109 | g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 110 | g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 111 | g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 112 | g_assert(1 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, IP0)); |
| 113 | |
| 114 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 115 | qtest_writel(qts, WDOG_BASE + WDOGCFG, 0); |
| 116 | tmp_cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 117 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, SCALE)); |
| 118 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 119 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 120 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 121 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 122 | g_assert(0 == FIELD_EX32(tmp_cfg, AON_WDT_WDOGCFG, IP0)); |
| 123 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCFG)); |
| 124 | |
| 125 | qtest_quit(qts); |
| 126 | } |
| 127 | |
| 128 | static void test_wdogcmp0(void) |
| 129 | { |
| 130 | uint32_t tmp; |
| 131 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 132 | |
| 133 | test_init(qts); |
| 134 | |
| 135 | tmp = qtest_readl(qts, WDOG_BASE + WDOGCMP0); |
| 136 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF); |
| 137 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCMP0) == tmp); |
| 138 | |
| 139 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 140 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, 0xBEEF); |
| 141 | g_assert(0xBEEF == qtest_readl(qts, WDOG_BASE + WDOGCMP0)); |
| 142 | |
| 143 | qtest_quit(qts); |
| 144 | } |
| 145 | |
| 146 | static void test_wdogkey(void) |
| 147 | { |
| 148 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 149 | |
| 150 | test_init(qts); |
| 151 | |
| 152 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY)); |
| 153 | |
| 154 | qtest_writel(qts, WDOG_BASE + WDOGKEY, 0xFFFF); |
| 155 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY)); |
| 156 | |
| 157 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 158 | g_assert(1 == qtest_readl(qts, WDOG_BASE + WDOGKEY)); |
| 159 | |
| 160 | qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xAAAAAAAA); |
| 161 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGKEY)); |
| 162 | |
| 163 | qtest_quit(qts); |
| 164 | } |
| 165 | |
| 166 | static void test_wdogfeed(void) |
| 167 | { |
| 168 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 169 | |
| 170 | test_init(qts); |
| 171 | |
| 172 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGFEED)); |
| 173 | |
| 174 | qtest_writel(qts, WDOG_BASE + WDOGFEED, 0xFFFF); |
| 175 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGFEED)); |
| 176 | |
| 177 | qtest_quit(qts); |
| 178 | } |
| 179 | |
| 180 | static void test_scaled_wdogs(void) |
| 181 | { |
| 182 | uint32_t cfg; |
| 183 | uint32_t fake_count = 0x12345678; |
| 184 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 185 | |
| 186 | test_init(qts); |
| 187 | |
| 188 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 189 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, fake_count); |
| 190 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == fake_count); |
| 191 | g_assert((uint16_t)qtest_readl(qts, WDOG_BASE + WDOGS) == |
| 192 | (uint16_t)fake_count); |
| 193 | |
| 194 | for (int i = 0; i < 16; i++) { |
| 195 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 196 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, i); |
| 197 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 198 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 199 | g_assert((uint16_t)qtest_readl(qts, WDOG_BASE + WDOGS) == |
| 200 | (uint16_t)(fake_count >> |
| 201 | FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE))); |
| 202 | } |
| 203 | |
| 204 | qtest_quit(qts); |
| 205 | } |
| 206 | |
| 207 | static void test_watchdog(void) |
| 208 | { |
| 209 | uint32_t cfg; |
| 210 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 211 | |
| 212 | test_init(qts); |
| 213 | |
| 214 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 215 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, SIFIVE_E_LFCLK_DEFAULT_FREQ); |
| 216 | |
| 217 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 218 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 0); |
| 219 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1); |
| 220 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 221 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 222 | |
| 223 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND); |
| 224 | |
| 225 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == |
| 226 | SIFIVE_E_LFCLK_DEFAULT_FREQ); |
| 227 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGS) == |
| 228 | SIFIVE_E_LFCLK_DEFAULT_FREQ); |
| 229 | |
| 230 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 231 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 232 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 233 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 234 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 235 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 236 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 237 | |
| 238 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 239 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0); |
| 240 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0); |
| 241 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 242 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 243 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 244 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 245 | |
| 246 | qtest_quit(qts); |
| 247 | } |
| 248 | |
| 249 | static void test_scaled_watchdog(void) |
| 250 | { |
| 251 | uint32_t cfg; |
| 252 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 253 | |
| 254 | test_init(qts); |
| 255 | |
| 256 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 257 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, 10); |
| 258 | |
| 259 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 260 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 15); |
| 261 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1); |
| 262 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 263 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 264 | |
| 265 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 10); |
| 266 | |
| 267 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == |
| 268 | SIFIVE_E_LFCLK_DEFAULT_FREQ * 10); |
| 269 | |
| 270 | g_assert(10 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 271 | |
| 272 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 273 | g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 274 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 275 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 276 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 277 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 278 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 279 | |
| 280 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 281 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0); |
| 282 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0); |
| 283 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 284 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 285 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 286 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 287 | |
| 288 | qtest_quit(qts); |
| 289 | } |
| 290 | |
| 291 | static void test_periodic_int(void) |
| 292 | { |
| 293 | uint32_t cfg; |
| 294 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 295 | |
| 296 | test_init(qts); |
| 297 | |
| 298 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 299 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, SIFIVE_E_LFCLK_DEFAULT_FREQ); |
| 300 | |
| 301 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 302 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 0); |
| 303 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, ZEROCMP, 1); |
| 304 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1); |
| 305 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 306 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 307 | |
| 308 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND); |
| 309 | |
| 310 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 311 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 312 | |
| 313 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 314 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 315 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 316 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 317 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 318 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 319 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 320 | |
| 321 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0); |
| 322 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 323 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 324 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 325 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 326 | |
| 327 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND); |
| 328 | |
| 329 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGCOUNT)); |
| 330 | g_assert(0 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 331 | |
| 332 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 333 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 334 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 335 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 336 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 337 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 338 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 339 | |
| 340 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0); |
| 341 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 342 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 343 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 344 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 345 | |
| 346 | qtest_quit(qts); |
| 347 | } |
| 348 | |
| 349 | static void test_enable_disable(void) |
| 350 | { |
| 351 | uint32_t cfg; |
| 352 | QTestState *qts = qtest_init("-machine sifive_e"); |
| 353 | |
| 354 | test_init(qts); |
| 355 | |
| 356 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 357 | qtest_writel(qts, WDOG_BASE + WDOGCMP0, 10); |
| 358 | |
| 359 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 360 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, SCALE, 15); |
| 361 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1); |
| 362 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 363 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 364 | |
| 365 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2); |
| 366 | |
| 367 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == |
| 368 | SIFIVE_E_LFCLK_DEFAULT_FREQ * 2); |
| 369 | g_assert(2 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 370 | |
| 371 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 372 | g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 373 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 374 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 375 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 376 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 377 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 378 | |
| 379 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 380 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 0); |
| 381 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 382 | |
| 383 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 8); |
| 384 | |
| 385 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == |
| 386 | SIFIVE_E_LFCLK_DEFAULT_FREQ * 2); |
| 387 | g_assert(2 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 388 | |
| 389 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 390 | g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 391 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 392 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 393 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 394 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 395 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 396 | |
| 397 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS, 1); |
| 398 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 399 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 400 | |
| 401 | qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 8); |
| 402 | |
| 403 | g_assert(qtest_readl(qts, WDOG_BASE + WDOGCOUNT) == |
| 404 | SIFIVE_E_LFCLK_DEFAULT_FREQ * 10); |
| 405 | g_assert(10 == qtest_readl(qts, WDOG_BASE + WDOGS)); |
| 406 | |
| 407 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 408 | g_assert(15 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, SCALE)); |
| 409 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, RSTEN)); |
| 410 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, ZEROCMP)); |
| 411 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_ALWAYS)); |
| 412 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, EN_CORE_AWAKE)); |
| 413 | g_assert(1 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 414 | |
| 415 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 416 | qtest_writel(qts, WDOG_BASE + WDOGCOUNT, 0); |
| 417 | cfg = FIELD_DP32(cfg, AON_WDT_WDOGCFG, IP0, 0); |
| 418 | qtest_writel(qts, WDOG_BASE + WDOGKEY, SIFIVE_E_AON_WDOGKEY); |
| 419 | qtest_writel(qts, WDOG_BASE + WDOGCFG, cfg); |
| 420 | cfg = qtest_readl(qts, WDOG_BASE + WDOGCFG); |
| 421 | g_assert(0 == FIELD_EX32(cfg, AON_WDT_WDOGCFG, IP0)); |
| 422 | |
| 423 | qtest_quit(qts); |
| 424 | } |
| 425 | |
| 426 | int main(int argc, char *argv[]) |
| 427 | { |
| 428 | g_test_init(&argc, &argv, NULL); |
| 429 | qtest_add_func("/sifive-e-aon-watchdog-test/wdogcount", |
| 430 | test_wdogcount); |
| 431 | qtest_add_func("/sifive-e-aon-watchdog-test/wdogcfg", |
| 432 | test_wdogcfg); |
| 433 | qtest_add_func("/sifive-e-aon-watchdog-test/wdogcmp0", |
| 434 | test_wdogcmp0); |
| 435 | qtest_add_func("/sifive-e-aon-watchdog-test/wdogkey", |
| 436 | test_wdogkey); |
| 437 | qtest_add_func("/sifive-e-aon-watchdog-test/wdogfeed", |
| 438 | test_wdogfeed); |
| 439 | qtest_add_func("/sifive-e-aon-watchdog-test/scaled_wdogs", |
| 440 | test_scaled_wdogs); |
| 441 | qtest_add_func("/sifive-e-aon-watchdog-test/watchdog", |
| 442 | test_watchdog); |
| 443 | qtest_add_func("/sifive-e-aon-watchdog-test/scaled_watchdog", |
| 444 | test_scaled_watchdog); |
| 445 | qtest_add_func("/sifive-e-aon-watchdog-test/periodic_int", |
| 446 | test_periodic_int); |
| 447 | qtest_add_func("/sifive-e-aon-watchdog-test/enable_disable", |
| 448 | test_enable_disable); |
| 449 | return g_test_run(); |
| 450 | } |