| 1 | /* |
| 2 | * QTest testcase header for STM32L4X5 : |
| 3 | * used for consolidating common objects in stm32l4x5_*-test.c |
| 4 | * |
| 5 | * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr> |
| 6 | * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr> |
| 7 | * |
| 8 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 9 | * See the COPYING file in the top-level directory. |
| 10 | */ |
| 11 | |
| 12 | #include "libqtest.h" |
| 13 | |
| 14 | /* copied from clock.h */ |
| 15 | #define CLOCK_PERIOD_1SEC (1000000000llu << 32) |
| 16 | #define CLOCK_PERIOD_FROM_HZ(hz) (((hz) != 0) ? CLOCK_PERIOD_1SEC / (hz) : 0u) |
| 17 | /* |
| 18 | * MSI (4 MHz) is used as system clock source after startup |
| 19 | * from Reset. |
| 20 | * AHB, APB1 and APB2 prescalers are set to 1 at reset. |
| 21 | */ |
| 22 | #define SYSCLK_PERIOD CLOCK_PERIOD_FROM_HZ(4000000) |
| 23 | #define RCC_AHB2ENR 0x4002104C |
| 24 | #define RCC_APB1ENR1 0x40021058 |
| 25 | #define RCC_APB1ENR2 0x4002105C |
| 26 | #define RCC_APB2ENR 0x40021060 |
| 27 | |
| 28 | |
| 29 | static inline uint64_t get_clock_period(QTestState *qts, const char *path) |
| 30 | { |
| 31 | uint64_t clock_period = 0; |
| 32 | QDict *r; |
| 33 | |
| 34 | r = qtest_qmp(qts, "{ 'execute': 'qom-get', 'arguments':" |
| 35 | " { 'path': %s, 'property': 'qtest-clock-period'} }", path); |
| 36 | g_assert_false(qdict_haskey(r, "error")); |
| 37 | clock_period = qdict_get_int(r, "return"); |
| 38 | qobject_unref(r); |
| 39 | return clock_period; |
| 40 | } |
| 41 | |
| 42 |