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1 /*
2 * Regression tests for valid packets that qemu incorrectly rejected as
3 * invalid.
4 *
5 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8
9 #include <stdio.h>
10 #include <stdint.h>
11
12 int err;
13
14 #include "hex_test.h"
15
16 /* volatile to keep the load from being optimized away */
17 static volatile int buf[2] = { 0x1234, 0 };
18
19 /* Load and register transfer in one packet, load encoded first. */
20 static int32_t load_imm_pair(void)
21 {
22 int32_t out;
23 /* { r6 = memw(r3+#-4); r7 = #0x4ae6 } */
24 asm volatile(
25 "{ r3 = %1 }\n\t"
26 ".word 0x97837fe6\n\t"
27 ".word 0x7845dcc7\n\t"
28 "{ %0 = r6 }\n\t"
29 : "=r"(out) : "r"(&buf[1]) : "r3", "r6", "r7");
30 return out;
31 }
32
33 static int32_t dcbuf[8] __attribute__((aligned(32)));
34
35 /* Slot-0-only op (dczeroa) packed last with three transfers. */
36 static void slot0_restricted(int32_t *out)
37 {
38 asm volatile(
39 "{ %0 = #0x11\n\t"
40 " %1 = #0x22\n\t"
41 " %2 = #0x33\n\t"
42 " dczeroa(%3) }\n\t"
43 : "=r"(out[0]), "=r"(out[1]), "=r"(out[2])
44 : "r"(dcbuf) : "memory");
45 }
46
47 int main()
48 {
49 int32_t r[3];
50
51 check32(load_imm_pair(), 0x1234);
52
53 dcbuf[0] = 0x5a5a5a5a;
54 slot0_restricted(r);
55 check32(r[0], 0x11);
56 check32(r[1], 0x22);
57 check32(r[2], 0x33);
58 check32(dcbuf[0], 0); /* dczeroa cleared the line */
59
60 puts(err ? "FAIL" : "PASS");
61 return err;
62 }