| 1 | /* |
| 2 | * Header file for wrappers around MSA instructions assembler invocations |
| 3 | * |
| 4 | * Copyright (C) 2019 Wave Computing, Inc. |
| 5 | * Copyright (C) 2019 Aleksandar Markovic <amarkovic@wavecomp.com> |
| 6 | * |
| 7 | * This program is free software: you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation, either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program. If not, see <https://www.gnu.org/licenses/>. |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #ifndef WRAPPERS_MSA_H |
| 23 | #define WRAPPERS_MSA_H |
| 24 | |
| 25 | |
| 26 | #define RESET_MSA_REGISTER(wi) \ |
| 27 | __asm__ volatile ( \ |
| 28 | "xor.v $" #wi ", $" #wi ", $" #wi "\n\t" \ |
| 29 | : \ |
| 30 | : \ |
| 31 | : \ |
| 32 | ) |
| 33 | |
| 34 | |
| 35 | static inline void reset_msa_registers() |
| 36 | { |
| 37 | |
| 38 | RESET_MSA_REGISTER(w0); |
| 39 | RESET_MSA_REGISTER(w1); |
| 40 | RESET_MSA_REGISTER(w2); |
| 41 | RESET_MSA_REGISTER(w3); |
| 42 | RESET_MSA_REGISTER(w4); |
| 43 | RESET_MSA_REGISTER(w5); |
| 44 | RESET_MSA_REGISTER(w6); |
| 45 | RESET_MSA_REGISTER(w7); |
| 46 | RESET_MSA_REGISTER(w8); |
| 47 | RESET_MSA_REGISTER(w9); |
| 48 | RESET_MSA_REGISTER(w10); |
| 49 | RESET_MSA_REGISTER(w11); |
| 50 | RESET_MSA_REGISTER(w12); |
| 51 | RESET_MSA_REGISTER(w13); |
| 52 | RESET_MSA_REGISTER(w14); |
| 53 | RESET_MSA_REGISTER(w15); |
| 54 | RESET_MSA_REGISTER(w16); |
| 55 | RESET_MSA_REGISTER(w17); |
| 56 | RESET_MSA_REGISTER(w18); |
| 57 | RESET_MSA_REGISTER(w19); |
| 58 | RESET_MSA_REGISTER(w20); |
| 59 | RESET_MSA_REGISTER(w21); |
| 60 | RESET_MSA_REGISTER(w22); |
| 61 | RESET_MSA_REGISTER(w23); |
| 62 | RESET_MSA_REGISTER(w24); |
| 63 | RESET_MSA_REGISTER(w25); |
| 64 | RESET_MSA_REGISTER(w26); |
| 65 | RESET_MSA_REGISTER(w27); |
| 66 | RESET_MSA_REGISTER(w28); |
| 67 | RESET_MSA_REGISTER(w29); |
| 68 | RESET_MSA_REGISTER(w30); |
| 69 | RESET_MSA_REGISTER(w31); |
| 70 | |
| 71 | } |
| 72 | |
| 73 | |
| 74 | #define DO_MSA__WD__WS(suffix, mnemonic) \ |
| 75 | static inline void do_msa_##suffix(const void *input, \ |
| 76 | const void *output) \ |
| 77 | { \ |
| 78 | __asm__ volatile ( \ |
| 79 | "move $t0, %0\n\t" \ |
| 80 | "ld.d $w11, 0($t0)\n\t" \ |
| 81 | #mnemonic " $w10, $w11\n\t" \ |
| 82 | "move $t0, %1\n\t" \ |
| 83 | "st.d $w10, 0($t0)\n\t" \ |
| 84 | : \ |
| 85 | : "r" (input), "r" (output) \ |
| 86 | : "t0", "memory" \ |
| 87 | ); \ |
| 88 | } |
| 89 | |
| 90 | #define DO_MSA__WD__WD(suffix, mnemonic) \ |
| 91 | static inline void do_msa_##suffix(const void *input, \ |
| 92 | const void *output) \ |
| 93 | { \ |
| 94 | __asm__ volatile ( \ |
| 95 | "move $t0, %0\n\t" \ |
| 96 | "ld.d $w11, 0($t0)\n\t" \ |
| 97 | #mnemonic " $w10, $w10\n\t" \ |
| 98 | "move $t0, %1\n\t" \ |
| 99 | "st.d $w10, 0($t0)\n\t" \ |
| 100 | : \ |
| 101 | : "r" (input), "r" (output) \ |
| 102 | : "t0", "memory" \ |
| 103 | ); \ |
| 104 | } |
| 105 | |
| 106 | |
| 107 | #define DO_MSA__WD__WS_WT(suffix, mnemonic) \ |
| 108 | static inline void do_msa_##suffix(const void *input1, \ |
| 109 | const void *input2, \ |
| 110 | const void *output) \ |
| 111 | { \ |
| 112 | __asm__ volatile ( \ |
| 113 | "move $t0, %0\n\t" \ |
| 114 | "ld.d $w11, 0($t0)\n\t" \ |
| 115 | "move $t0, %1\n\t" \ |
| 116 | "ld.d $w12, 0($t0)\n\t" \ |
| 117 | #mnemonic " $w10, $w11, $w12\n\t" \ |
| 118 | "move $t0, %2\n\t" \ |
| 119 | "st.d $w10, 0($t0)\n\t" \ |
| 120 | : \ |
| 121 | : "r" (input1), "r" (input2), "r" (output) \ |
| 122 | : "t0", "memory" \ |
| 123 | ); \ |
| 124 | } |
| 125 | |
| 126 | #define DO_MSA__WD__WD_WT(suffix, mnemonic) \ |
| 127 | static inline void do_msa_##suffix(const void *input1, \ |
| 128 | const void *input2, \ |
| 129 | const void *output) \ |
| 130 | { \ |
| 131 | __asm__ volatile ( \ |
| 132 | "move $t0, %0\n\t" \ |
| 133 | "ld.d $w11, 0($t0)\n\t" \ |
| 134 | "move $t0, %1\n\t" \ |
| 135 | "ld.d $w12, 0($t0)\n\t" \ |
| 136 | #mnemonic " $w10, $w10, $w12\n\t" \ |
| 137 | "move $t0, %2\n\t" \ |
| 138 | "st.d $w10, 0($t0)\n\t" \ |
| 139 | : \ |
| 140 | : "r" (input1), "r" (input2), "r" (output) \ |
| 141 | : "t0", "memory" \ |
| 142 | ); \ |
| 143 | } |
| 144 | |
| 145 | #define DO_MSA__WD__WS_WD(suffix, mnemonic) \ |
| 146 | static inline void do_msa_##suffix(const void *input1, \ |
| 147 | const void *input2, \ |
| 148 | const void *output) \ |
| 149 | { \ |
| 150 | __asm__ volatile ( \ |
| 151 | "move $t0, %0\n\t" \ |
| 152 | "ld.d $w11, 0($t0)\n\t" \ |
| 153 | "move $t0, %1\n\t" \ |
| 154 | "ld.d $w12, 0($t0)\n\t" \ |
| 155 | #mnemonic " $w10, $w11, $w10\n\t" \ |
| 156 | "move $t0, %2\n\t" \ |
| 157 | "st.d $w10, 0($t0)\n\t" \ |
| 158 | : \ |
| 159 | : "r" (input1), "r" (input2), "r" (output) \ |
| 160 | : "t0", "memory" \ |
| 161 | ); \ |
| 162 | } |
| 163 | |
| 164 | |
| 165 | /* |
| 166 | * Bit Count |
| 167 | * --------- |
| 168 | */ |
| 169 | |
| 170 | DO_MSA__WD__WS(NLOC_B, nloc.b) |
| 171 | DO_MSA__WD__WS(NLOC_H, nloc.h) |
| 172 | DO_MSA__WD__WS(NLOC_W, nloc.w) |
| 173 | DO_MSA__WD__WS(NLOC_D, nloc.d) |
| 174 | |
| 175 | DO_MSA__WD__WS(NLZC_B, nlzc.b) |
| 176 | DO_MSA__WD__WS(NLZC_H, nlzc.h) |
| 177 | DO_MSA__WD__WS(NLZC_W, nlzc.w) |
| 178 | DO_MSA__WD__WS(NLZC_D, nlzc.d) |
| 179 | |
| 180 | DO_MSA__WD__WS(PCNT_B, pcnt.b) |
| 181 | DO_MSA__WD__WS(PCNT_H, pcnt.h) |
| 182 | DO_MSA__WD__WS(PCNT_W, pcnt.w) |
| 183 | DO_MSA__WD__WS(PCNT_D, pcnt.d) |
| 184 | |
| 185 | |
| 186 | /* |
| 187 | * Bit move |
| 188 | * -------- |
| 189 | */ |
| 190 | |
| 191 | DO_MSA__WD__WS_WT(BINSL_B, binsl.b) |
| 192 | DO_MSA__WD__WD_WT(BINSL_B__DDT, binsl.b) |
| 193 | DO_MSA__WD__WS_WD(BINSL_B__DSD, binsl.b) |
| 194 | DO_MSA__WD__WS_WT(BINSL_H, binsl.h) |
| 195 | DO_MSA__WD__WD_WT(BINSL_H__DDT, binsl.h) |
| 196 | DO_MSA__WD__WS_WD(BINSL_H__DSD, binsl.h) |
| 197 | DO_MSA__WD__WS_WT(BINSL_W, binsl.w) |
| 198 | DO_MSA__WD__WD_WT(BINSL_W__DDT, binsl.w) |
| 199 | DO_MSA__WD__WS_WD(BINSL_W__DSD, binsl.w) |
| 200 | DO_MSA__WD__WS_WT(BINSL_D, binsl.d) |
| 201 | DO_MSA__WD__WD_WT(BINSL_D__DDT, binsl.d) |
| 202 | DO_MSA__WD__WS_WD(BINSL_D__DSD, binsl.d) |
| 203 | |
| 204 | DO_MSA__WD__WS_WT(BINSR_B, binsr.b) |
| 205 | DO_MSA__WD__WD_WT(BINSR_B__DDT, binsr.b) |
| 206 | DO_MSA__WD__WS_WD(BINSR_B__DSD, binsr.b) |
| 207 | DO_MSA__WD__WS_WT(BINSR_H, binsr.h) |
| 208 | DO_MSA__WD__WD_WT(BINSR_H__DDT, binsr.h) |
| 209 | DO_MSA__WD__WS_WD(BINSR_H__DSD, binsr.h) |
| 210 | DO_MSA__WD__WS_WT(BINSR_W, binsr.w) |
| 211 | DO_MSA__WD__WD_WT(BINSR_W__DDT, binsr.w) |
| 212 | DO_MSA__WD__WS_WD(BINSR_W__DSD, binsr.w) |
| 213 | DO_MSA__WD__WS_WT(BINSR_D, binsr.d) |
| 214 | DO_MSA__WD__WD_WT(BINSR_D__DDT, binsr.d) |
| 215 | DO_MSA__WD__WS_WD(BINSR_D__DSD, binsr.d) |
| 216 | |
| 217 | DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) |
| 218 | DO_MSA__WD__WD_WT(BMNZ_V__DDT, bmnz.v) |
| 219 | DO_MSA__WD__WS_WD(BMNZ_V__DSD, bmnz.v) |
| 220 | DO_MSA__WD__WS_WT(BMZ_V, bmz.v) |
| 221 | DO_MSA__WD__WD_WT(BMZ_V__DDT, bmz.v) |
| 222 | DO_MSA__WD__WS_WD(BMZ_V__DSD, bmz.v) |
| 223 | DO_MSA__WD__WS_WT(BSEL_V, bsel.v) |
| 224 | DO_MSA__WD__WD_WT(BSEL_V__DDT, bsel.v) |
| 225 | DO_MSA__WD__WS_WD(BSEL_V__DSD, bsel.v) |
| 226 | |
| 227 | |
| 228 | /* |
| 229 | * Bit Set |
| 230 | * ------- |
| 231 | */ |
| 232 | |
| 233 | DO_MSA__WD__WS_WT(BCLR_B, bclr.b) |
| 234 | DO_MSA__WD__WS_WT(BCLR_H, bclr.h) |
| 235 | DO_MSA__WD__WS_WT(BCLR_W, bclr.w) |
| 236 | DO_MSA__WD__WS_WT(BCLR_D, bclr.d) |
| 237 | |
| 238 | DO_MSA__WD__WS_WT(BSET_B, bset.b) |
| 239 | DO_MSA__WD__WS_WT(BSET_H, bset.h) |
| 240 | DO_MSA__WD__WS_WT(BSET_W, bset.w) |
| 241 | DO_MSA__WD__WS_WT(BSET_D, bset.d) |
| 242 | |
| 243 | DO_MSA__WD__WS_WT(BNEG_B, bneg.b) |
| 244 | DO_MSA__WD__WS_WT(BNEG_H, bneg.h) |
| 245 | DO_MSA__WD__WS_WT(BNEG_W, bneg.w) |
| 246 | DO_MSA__WD__WS_WT(BNEG_D, bneg.d) |
| 247 | |
| 248 | |
| 249 | /* |
| 250 | * Fixed Multiply |
| 251 | * -------------- |
| 252 | */ |
| 253 | |
| 254 | DO_MSA__WD__WS_WT(MADD_Q_H, madd_q.h) |
| 255 | DO_MSA__WD__WD_WT(MADD_Q_H__DDT, madd_q.h) |
| 256 | DO_MSA__WD__WS_WD(MADD_Q_H__DSD, madd_q.h) |
| 257 | DO_MSA__WD__WS_WT(MADD_Q_W, madd_q.w) |
| 258 | DO_MSA__WD__WD_WT(MADD_Q_W__DDT, madd_q.w) |
| 259 | DO_MSA__WD__WS_WD(MADD_Q_W__DSD, madd_q.w) |
| 260 | |
| 261 | DO_MSA__WD__WS_WT(MADDR_Q_H, maddr_q.h) |
| 262 | DO_MSA__WD__WD_WT(MADDR_Q_H__DDT, maddr_q.h) |
| 263 | DO_MSA__WD__WS_WD(MADDR_Q_H__DSD, maddr_q.h) |
| 264 | DO_MSA__WD__WS_WT(MADDR_Q_W, maddr_q.w) |
| 265 | DO_MSA__WD__WD_WT(MADDR_Q_W__DDT, maddr_q.w) |
| 266 | DO_MSA__WD__WS_WD(MADDR_Q_W__DSD, maddr_q.w) |
| 267 | |
| 268 | DO_MSA__WD__WS_WT(MSUB_Q_H, msub_q.h) |
| 269 | DO_MSA__WD__WD_WT(MSUB_Q_H__DDT, msub_q.h) |
| 270 | DO_MSA__WD__WS_WD(MSUB_Q_H__DSD, msub_q.h) |
| 271 | DO_MSA__WD__WS_WT(MSUB_Q_W, msub_q.w) |
| 272 | DO_MSA__WD__WD_WT(MSUB_Q_W__DDT, msub_q.w) |
| 273 | DO_MSA__WD__WS_WD(MSUB_Q_W__DSD, msub_q.w) |
| 274 | |
| 275 | DO_MSA__WD__WS_WT(MSUBR_Q_H, msubr_q.h) |
| 276 | DO_MSA__WD__WD_WT(MSUBR_Q_H__DDT, msubr_q.h) |
| 277 | DO_MSA__WD__WS_WD(MSUBR_Q_H__DSD, msubr_q.h) |
| 278 | DO_MSA__WD__WS_WT(MSUBR_Q_W, msubr_q.w) |
| 279 | DO_MSA__WD__WD_WT(MSUBR_Q_W__DDT, msubr_q.w) |
| 280 | DO_MSA__WD__WS_WD(MSUBR_Q_W__DSD, msubr_q.w) |
| 281 | |
| 282 | DO_MSA__WD__WS_WT(MUL_Q_H, mul_q.h) |
| 283 | DO_MSA__WD__WS_WT(MUL_Q_W, mul_q.w) |
| 284 | |
| 285 | DO_MSA__WD__WS_WT(MULR_Q_H, mulr_q.h) |
| 286 | DO_MSA__WD__WS_WT(MULR_Q_W, mulr_q.w) |
| 287 | |
| 288 | |
| 289 | /* |
| 290 | * Float Max Min |
| 291 | * ------------- |
| 292 | */ |
| 293 | |
| 294 | DO_MSA__WD__WS_WT(FMAX_W, fmax.w) |
| 295 | DO_MSA__WD__WS_WT(FMAX_D, fmax.d) |
| 296 | |
| 297 | DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w) |
| 298 | DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d) |
| 299 | |
| 300 | DO_MSA__WD__WS_WT(FMIN_W, fmin.w) |
| 301 | DO_MSA__WD__WS_WT(FMIN_D, fmin.d) |
| 302 | |
| 303 | DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w) |
| 304 | DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d) |
| 305 | |
| 306 | |
| 307 | /* |
| 308 | * Int Add |
| 309 | * ------- |
| 310 | */ |
| 311 | |
| 312 | DO_MSA__WD__WS_WT(ADD_A_B, add_a.b) |
| 313 | DO_MSA__WD__WS_WT(ADD_A_H, add_a.h) |
| 314 | DO_MSA__WD__WS_WT(ADD_A_W, add_a.w) |
| 315 | DO_MSA__WD__WS_WT(ADD_A_D, add_a.d) |
| 316 | |
| 317 | DO_MSA__WD__WS_WT(ADDS_A_B, adds_a.b) |
| 318 | DO_MSA__WD__WS_WT(ADDS_A_H, adds_a.h) |
| 319 | DO_MSA__WD__WS_WT(ADDS_A_W, adds_a.w) |
| 320 | DO_MSA__WD__WS_WT(ADDS_A_D, adds_a.d) |
| 321 | |
| 322 | DO_MSA__WD__WS_WT(ADDS_S_B, adds_s.b) |
| 323 | DO_MSA__WD__WS_WT(ADDS_S_H, adds_s.h) |
| 324 | DO_MSA__WD__WS_WT(ADDS_S_W, adds_s.w) |
| 325 | DO_MSA__WD__WS_WT(ADDS_S_D, adds_s.d) |
| 326 | |
| 327 | DO_MSA__WD__WS_WT(ADDS_U_B, adds_u.b) |
| 328 | DO_MSA__WD__WS_WT(ADDS_U_H, adds_u.h) |
| 329 | DO_MSA__WD__WS_WT(ADDS_U_W, adds_u.w) |
| 330 | DO_MSA__WD__WS_WT(ADDS_U_D, adds_u.d) |
| 331 | |
| 332 | DO_MSA__WD__WS_WT(ADDV_B, addv.b) |
| 333 | DO_MSA__WD__WS_WT(ADDV_H, addv.h) |
| 334 | DO_MSA__WD__WS_WT(ADDV_W, addv.w) |
| 335 | DO_MSA__WD__WS_WT(ADDV_D, addv.d) |
| 336 | |
| 337 | DO_MSA__WD__WS_WT(HADD_S_H, hadd_s.h) |
| 338 | DO_MSA__WD__WS_WT(HADD_S_W, hadd_s.w) |
| 339 | DO_MSA__WD__WS_WT(HADD_S_D, hadd_s.d) |
| 340 | |
| 341 | DO_MSA__WD__WS_WT(HADD_U_H, hadd_u.h) |
| 342 | DO_MSA__WD__WS_WT(HADD_U_W, hadd_u.w) |
| 343 | DO_MSA__WD__WS_WT(HADD_U_D, hadd_u.d) |
| 344 | |
| 345 | |
| 346 | /* |
| 347 | * Int Average |
| 348 | * ----------- |
| 349 | */ |
| 350 | |
| 351 | DO_MSA__WD__WS_WT(AVE_S_B, ave_s.b) |
| 352 | DO_MSA__WD__WS_WT(AVE_S_H, ave_s.h) |
| 353 | DO_MSA__WD__WS_WT(AVE_S_W, ave_s.w) |
| 354 | DO_MSA__WD__WS_WT(AVE_S_D, ave_s.d) |
| 355 | |
| 356 | DO_MSA__WD__WS_WT(AVE_U_B, ave_u.b) |
| 357 | DO_MSA__WD__WS_WT(AVE_U_H, ave_u.h) |
| 358 | DO_MSA__WD__WS_WT(AVE_U_W, ave_u.w) |
| 359 | DO_MSA__WD__WS_WT(AVE_U_D, ave_u.d) |
| 360 | |
| 361 | DO_MSA__WD__WS_WT(AVER_S_B, aver_s.b) |
| 362 | DO_MSA__WD__WS_WT(AVER_S_H, aver_s.h) |
| 363 | DO_MSA__WD__WS_WT(AVER_S_W, aver_s.w) |
| 364 | DO_MSA__WD__WS_WT(AVER_S_D, aver_s.d) |
| 365 | |
| 366 | DO_MSA__WD__WS_WT(AVER_U_B, aver_u.b) |
| 367 | DO_MSA__WD__WS_WT(AVER_U_H, aver_u.h) |
| 368 | DO_MSA__WD__WS_WT(AVER_U_W, aver_u.w) |
| 369 | DO_MSA__WD__WS_WT(AVER_U_D, aver_u.d) |
| 370 | |
| 371 | |
| 372 | /* |
| 373 | * Int Compare |
| 374 | * ----------- |
| 375 | */ |
| 376 | |
| 377 | DO_MSA__WD__WS_WT(CEQ_B, ceq.b) |
| 378 | DO_MSA__WD__WS_WT(CEQ_H, ceq.h) |
| 379 | DO_MSA__WD__WS_WT(CEQ_W, ceq.w) |
| 380 | DO_MSA__WD__WS_WT(CEQ_D, ceq.d) |
| 381 | |
| 382 | DO_MSA__WD__WS_WT(CLE_S_B, cle_s.b) |
| 383 | DO_MSA__WD__WS_WT(CLE_S_H, cle_s.h) |
| 384 | DO_MSA__WD__WS_WT(CLE_S_W, cle_s.w) |
| 385 | DO_MSA__WD__WS_WT(CLE_S_D, cle_s.d) |
| 386 | |
| 387 | DO_MSA__WD__WS_WT(CLE_U_B, cle_u.b) |
| 388 | DO_MSA__WD__WS_WT(CLE_U_H, cle_u.h) |
| 389 | DO_MSA__WD__WS_WT(CLE_U_W, cle_u.w) |
| 390 | DO_MSA__WD__WS_WT(CLE_U_D, cle_u.d) |
| 391 | |
| 392 | DO_MSA__WD__WS_WT(CLT_S_B, clt_s.b) |
| 393 | DO_MSA__WD__WS_WT(CLT_S_H, clt_s.h) |
| 394 | DO_MSA__WD__WS_WT(CLT_S_W, clt_s.w) |
| 395 | DO_MSA__WD__WS_WT(CLT_S_D, clt_s.d) |
| 396 | |
| 397 | DO_MSA__WD__WS_WT(CLT_U_B, clt_u.b) |
| 398 | DO_MSA__WD__WS_WT(CLT_U_H, clt_u.h) |
| 399 | DO_MSA__WD__WS_WT(CLT_U_W, clt_u.w) |
| 400 | DO_MSA__WD__WS_WT(CLT_U_D, clt_u.d) |
| 401 | |
| 402 | |
| 403 | /* |
| 404 | * Int Divide |
| 405 | * ---------- |
| 406 | */ |
| 407 | |
| 408 | DO_MSA__WD__WS_WT(DIV_S_B, div_s.b) |
| 409 | DO_MSA__WD__WS_WT(DIV_S_H, div_s.h) |
| 410 | DO_MSA__WD__WS_WT(DIV_S_W, div_s.w) |
| 411 | DO_MSA__WD__WS_WT(DIV_S_D, div_s.d) |
| 412 | |
| 413 | DO_MSA__WD__WS_WT(DIV_U_B, div_u.b) |
| 414 | DO_MSA__WD__WS_WT(DIV_U_H, div_u.h) |
| 415 | DO_MSA__WD__WS_WT(DIV_U_W, div_u.w) |
| 416 | DO_MSA__WD__WS_WT(DIV_U_D, div_u.d) |
| 417 | |
| 418 | |
| 419 | /* |
| 420 | * Int Dot Product |
| 421 | * --------------- |
| 422 | */ |
| 423 | |
| 424 | DO_MSA__WD__WS_WT(DOTP_S_H, dotp_s.h) |
| 425 | DO_MSA__WD__WS_WT(DOTP_S_W, dotp_s.w) |
| 426 | DO_MSA__WD__WS_WT(DOTP_S_D, dotp_s.d) |
| 427 | |
| 428 | DO_MSA__WD__WS_WT(DOTP_U_H, dotp_u.h) |
| 429 | DO_MSA__WD__WS_WT(DOTP_U_W, dotp_u.w) |
| 430 | DO_MSA__WD__WS_WT(DOTP_U_D, dotp_u.d) |
| 431 | |
| 432 | DO_MSA__WD__WS_WT(DPADD_S_H, dpadd_s.h) |
| 433 | DO_MSA__WD__WD_WT(DPADD_S_H__DDT, dpadd_s.h) |
| 434 | DO_MSA__WD__WS_WD(DPADD_S_H__DSD, dpadd_s.h) |
| 435 | DO_MSA__WD__WS_WT(DPADD_S_W, dpadd_s.w) |
| 436 | DO_MSA__WD__WD_WT(DPADD_S_W__DDT, dpadd_s.w) |
| 437 | DO_MSA__WD__WS_WD(DPADD_S_W__DSD, dpadd_s.w) |
| 438 | DO_MSA__WD__WS_WT(DPADD_S_D, dpadd_s.d) |
| 439 | DO_MSA__WD__WD_WT(DPADD_S_D__DDT, dpadd_s.d) |
| 440 | DO_MSA__WD__WS_WD(DPADD_S_D__DSD, dpadd_s.d) |
| 441 | |
| 442 | DO_MSA__WD__WS_WT(DPADD_U_H, dpadd_u.h) |
| 443 | DO_MSA__WD__WD_WT(DPADD_U_H__DDT, dpadd_u.h) |
| 444 | DO_MSA__WD__WS_WD(DPADD_U_H__DSD, dpadd_u.h) |
| 445 | DO_MSA__WD__WS_WT(DPADD_U_W, dpadd_u.w) |
| 446 | DO_MSA__WD__WD_WT(DPADD_U_W__DDT, dpadd_u.w) |
| 447 | DO_MSA__WD__WS_WD(DPADD_U_W__DSD, dpadd_u.w) |
| 448 | DO_MSA__WD__WS_WT(DPADD_U_D, dpadd_u.d) |
| 449 | DO_MSA__WD__WD_WT(DPADD_U_D__DDT, dpadd_u.d) |
| 450 | DO_MSA__WD__WS_WD(DPADD_U_D__DSD, dpadd_u.d) |
| 451 | |
| 452 | DO_MSA__WD__WS_WT(DPSUB_S_H, dpsub_s.h) |
| 453 | DO_MSA__WD__WD_WT(DPSUB_S_H__DDT, dpsub_s.h) |
| 454 | DO_MSA__WD__WS_WD(DPSUB_S_H__DSD, dpsub_s.h) |
| 455 | DO_MSA__WD__WS_WT(DPSUB_S_W, dpsub_s.w) |
| 456 | DO_MSA__WD__WD_WT(DPSUB_S_W__DDT, dpsub_s.w) |
| 457 | DO_MSA__WD__WS_WD(DPSUB_S_W__DSD, dpsub_s.w) |
| 458 | DO_MSA__WD__WS_WT(DPSUB_S_D, dpsub_s.d) |
| 459 | DO_MSA__WD__WD_WT(DPSUB_S_D__DDT, dpsub_s.d) |
| 460 | DO_MSA__WD__WS_WD(DPSUB_S_D__DSD, dpsub_s.d) |
| 461 | |
| 462 | DO_MSA__WD__WS_WT(DPSUB_U_H, dpsub_u.h) |
| 463 | DO_MSA__WD__WD_WT(DPSUB_U_H__DDT, dpsub_u.h) |
| 464 | DO_MSA__WD__WS_WD(DPSUB_U_H__DSD, dpsub_u.h) |
| 465 | DO_MSA__WD__WS_WT(DPSUB_U_W, dpsub_u.w) |
| 466 | DO_MSA__WD__WD_WT(DPSUB_U_W__DDT, dpsub_u.w) |
| 467 | DO_MSA__WD__WS_WD(DPSUB_U_W__DSD, dpsub_u.w) |
| 468 | DO_MSA__WD__WS_WT(DPSUB_U_D, dpsub_u.d) |
| 469 | DO_MSA__WD__WD_WT(DPSUB_U_D__DDT, dpsub_u.d) |
| 470 | DO_MSA__WD__WS_WD(DPSUB_U_D__DSD, dpsub_u.d) |
| 471 | |
| 472 | |
| 473 | /* |
| 474 | * Int Max Min |
| 475 | * ----------- |
| 476 | */ |
| 477 | |
| 478 | DO_MSA__WD__WS_WT(MAX_A_B, max_a.b) |
| 479 | DO_MSA__WD__WS_WT(MAX_A_H, max_a.h) |
| 480 | DO_MSA__WD__WS_WT(MAX_A_W, max_a.w) |
| 481 | DO_MSA__WD__WS_WT(MAX_A_D, max_a.d) |
| 482 | |
| 483 | DO_MSA__WD__WS_WT(MAX_S_B, max_s.b) |
| 484 | DO_MSA__WD__WS_WT(MAX_S_H, max_s.h) |
| 485 | DO_MSA__WD__WS_WT(MAX_S_W, max_s.w) |
| 486 | DO_MSA__WD__WS_WT(MAX_S_D, max_s.d) |
| 487 | |
| 488 | DO_MSA__WD__WS_WT(MAX_U_B, max_u.b) |
| 489 | DO_MSA__WD__WS_WT(MAX_U_H, max_u.h) |
| 490 | DO_MSA__WD__WS_WT(MAX_U_W, max_u.w) |
| 491 | DO_MSA__WD__WS_WT(MAX_U_D, max_u.d) |
| 492 | |
| 493 | DO_MSA__WD__WS_WT(MIN_A_B, min_a.b) |
| 494 | DO_MSA__WD__WS_WT(MIN_A_H, min_a.h) |
| 495 | DO_MSA__WD__WS_WT(MIN_A_W, min_a.w) |
| 496 | DO_MSA__WD__WS_WT(MIN_A_D, min_a.d) |
| 497 | |
| 498 | DO_MSA__WD__WS_WT(MIN_S_B, min_s.b) |
| 499 | DO_MSA__WD__WS_WT(MIN_S_H, min_s.h) |
| 500 | DO_MSA__WD__WS_WT(MIN_S_W, min_s.w) |
| 501 | DO_MSA__WD__WS_WT(MIN_S_D, min_s.d) |
| 502 | |
| 503 | DO_MSA__WD__WS_WT(MIN_U_B, min_u.b) |
| 504 | DO_MSA__WD__WS_WT(MIN_U_H, min_u.h) |
| 505 | DO_MSA__WD__WS_WT(MIN_U_W, min_u.w) |
| 506 | DO_MSA__WD__WS_WT(MIN_U_D, min_u.d) |
| 507 | |
| 508 | |
| 509 | /* |
| 510 | * Int Modulo |
| 511 | * ---------- |
| 512 | */ |
| 513 | |
| 514 | DO_MSA__WD__WS_WT(MOD_S_B, mod_s.b) |
| 515 | DO_MSA__WD__WS_WT(MOD_S_H, mod_s.h) |
| 516 | DO_MSA__WD__WS_WT(MOD_S_W, mod_s.w) |
| 517 | DO_MSA__WD__WS_WT(MOD_S_D, mod_s.d) |
| 518 | |
| 519 | DO_MSA__WD__WS_WT(MOD_U_B, mod_u.b) |
| 520 | DO_MSA__WD__WS_WT(MOD_U_H, mod_u.h) |
| 521 | DO_MSA__WD__WS_WT(MOD_U_W, mod_u.w) |
| 522 | DO_MSA__WD__WS_WT(MOD_U_D, mod_u.d) |
| 523 | |
| 524 | |
| 525 | /* |
| 526 | * Int Multiply |
| 527 | * ------------ |
| 528 | */ |
| 529 | |
| 530 | DO_MSA__WD__WS_WT(MADDV_B, maddv.b) |
| 531 | DO_MSA__WD__WD_WT(MADDV_B__DDT, maddv.b) |
| 532 | DO_MSA__WD__WS_WD(MADDV_B__DSD, maddv.b) |
| 533 | DO_MSA__WD__WS_WT(MADDV_H, maddv.h) |
| 534 | DO_MSA__WD__WD_WT(MADDV_H__DDT, maddv.h) |
| 535 | DO_MSA__WD__WS_WD(MADDV_H__DSD, maddv.h) |
| 536 | DO_MSA__WD__WS_WT(MADDV_W, maddv.w) |
| 537 | DO_MSA__WD__WD_WT(MADDV_W__DDT, maddv.w) |
| 538 | DO_MSA__WD__WS_WD(MADDV_W__DSD, maddv.w) |
| 539 | DO_MSA__WD__WS_WT(MADDV_D, maddv.d) |
| 540 | DO_MSA__WD__WD_WT(MADDV_D__DDT, maddv.d) |
| 541 | DO_MSA__WD__WS_WD(MADDV_D__DSD, maddv.d) |
| 542 | |
| 543 | DO_MSA__WD__WS_WT(MSUBV_B, msubv.b) |
| 544 | DO_MSA__WD__WD_WT(MSUBV_B__DDT, msubv.b) |
| 545 | DO_MSA__WD__WS_WD(MSUBV_B__DSD, msubv.b) |
| 546 | DO_MSA__WD__WS_WT(MSUBV_H, msubv.h) |
| 547 | DO_MSA__WD__WD_WT(MSUBV_H__DDT, msubv.h) |
| 548 | DO_MSA__WD__WS_WD(MSUBV_H__DSD, msubv.h) |
| 549 | DO_MSA__WD__WS_WT(MSUBV_W, msubv.w) |
| 550 | DO_MSA__WD__WD_WT(MSUBV_W__DDT, msubv.w) |
| 551 | DO_MSA__WD__WS_WD(MSUBV_W__DSD, msubv.w) |
| 552 | DO_MSA__WD__WS_WT(MSUBV_D, msubv.d) |
| 553 | DO_MSA__WD__WD_WT(MSUBV_D__DDT, msubv.d) |
| 554 | DO_MSA__WD__WS_WD(MSUBV_D__DSD, msubv.d) |
| 555 | |
| 556 | DO_MSA__WD__WS_WT(MULV_B, mulv.b) |
| 557 | DO_MSA__WD__WS_WT(MULV_H, mulv.h) |
| 558 | DO_MSA__WD__WS_WT(MULV_W, mulv.w) |
| 559 | DO_MSA__WD__WS_WT(MULV_D, mulv.d) |
| 560 | |
| 561 | |
| 562 | /* |
| 563 | * Int Subtract |
| 564 | * ------------ |
| 565 | */ |
| 566 | |
| 567 | DO_MSA__WD__WS_WT(ASUB_S_B, asub_s.b) |
| 568 | DO_MSA__WD__WS_WT(ASUB_S_H, asub_s.h) |
| 569 | DO_MSA__WD__WS_WT(ASUB_S_W, asub_s.w) |
| 570 | DO_MSA__WD__WS_WT(ASUB_S_D, asub_s.d) |
| 571 | |
| 572 | DO_MSA__WD__WS_WT(ASUB_U_B, asub_u.b) |
| 573 | DO_MSA__WD__WS_WT(ASUB_U_H, asub_u.h) |
| 574 | DO_MSA__WD__WS_WT(ASUB_U_W, asub_u.w) |
| 575 | DO_MSA__WD__WS_WT(ASUB_U_D, asub_u.d) |
| 576 | |
| 577 | DO_MSA__WD__WS_WT(HSUB_S_H, hsub_s.h) |
| 578 | DO_MSA__WD__WS_WT(HSUB_S_W, hsub_s.w) |
| 579 | DO_MSA__WD__WS_WT(HSUB_S_D, hsub_s.d) |
| 580 | |
| 581 | DO_MSA__WD__WS_WT(HSUB_U_H, hsub_u.h) |
| 582 | DO_MSA__WD__WS_WT(HSUB_U_W, hsub_u.w) |
| 583 | DO_MSA__WD__WS_WT(HSUB_U_D, hsub_u.d) |
| 584 | |
| 585 | DO_MSA__WD__WS_WT(SUBS_S_B, subs_s.b) |
| 586 | DO_MSA__WD__WS_WT(SUBS_S_H, subs_s.h) |
| 587 | DO_MSA__WD__WS_WT(SUBS_S_W, subs_s.w) |
| 588 | DO_MSA__WD__WS_WT(SUBS_S_D, subs_s.d) |
| 589 | |
| 590 | DO_MSA__WD__WS_WT(SUBS_U_B, subs_u.b) |
| 591 | DO_MSA__WD__WS_WT(SUBS_U_H, subs_u.h) |
| 592 | DO_MSA__WD__WS_WT(SUBS_U_W, subs_u.w) |
| 593 | DO_MSA__WD__WS_WT(SUBS_U_D, subs_u.d) |
| 594 | |
| 595 | DO_MSA__WD__WS_WT(SUBSUS_U_B, subsus_u.b) |
| 596 | DO_MSA__WD__WS_WT(SUBSUS_U_H, subsus_u.h) |
| 597 | DO_MSA__WD__WS_WT(SUBSUS_U_W, subsus_u.w) |
| 598 | DO_MSA__WD__WS_WT(SUBSUS_U_D, subsus_u.d) |
| 599 | |
| 600 | DO_MSA__WD__WS_WT(SUBSUU_S_B, subsuu_s.b) |
| 601 | DO_MSA__WD__WS_WT(SUBSUU_S_H, subsuu_s.h) |
| 602 | DO_MSA__WD__WS_WT(SUBSUU_S_W, subsuu_s.w) |
| 603 | DO_MSA__WD__WS_WT(SUBSUU_S_D, subsuu_s.d) |
| 604 | |
| 605 | DO_MSA__WD__WS_WT(SUBV_B, subv.b) |
| 606 | DO_MSA__WD__WS_WT(SUBV_H, subv.h) |
| 607 | DO_MSA__WD__WS_WT(SUBV_W, subv.w) |
| 608 | DO_MSA__WD__WS_WT(SUBV_D, subv.d) |
| 609 | |
| 610 | |
| 611 | /* |
| 612 | * Interleave |
| 613 | * ---------- |
| 614 | */ |
| 615 | |
| 616 | DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b) |
| 617 | DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h) |
| 618 | DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w) |
| 619 | DO_MSA__WD__WS_WT(ILVEV_D, ilvev.d) |
| 620 | |
| 621 | DO_MSA__WD__WS_WT(ILVOD_B, ilvod.b) |
| 622 | DO_MSA__WD__WS_WT(ILVOD_H, ilvod.h) |
| 623 | DO_MSA__WD__WS_WT(ILVOD_W, ilvod.w) |
| 624 | DO_MSA__WD__WS_WT(ILVOD_D, ilvod.d) |
| 625 | |
| 626 | DO_MSA__WD__WS_WT(ILVL_B, ilvl.b) |
| 627 | DO_MSA__WD__WS_WT(ILVL_H, ilvl.h) |
| 628 | DO_MSA__WD__WS_WT(ILVL_W, ilvl.w) |
| 629 | DO_MSA__WD__WS_WT(ILVL_D, ilvl.d) |
| 630 | |
| 631 | DO_MSA__WD__WS_WT(ILVR_B, ilvr.b) |
| 632 | DO_MSA__WD__WS_WT(ILVR_H, ilvr.h) |
| 633 | DO_MSA__WD__WS_WT(ILVR_W, ilvr.w) |
| 634 | DO_MSA__WD__WS_WT(ILVR_D, ilvr.d) |
| 635 | |
| 636 | |
| 637 | /* |
| 638 | * Logic |
| 639 | * ----- |
| 640 | */ |
| 641 | |
| 642 | DO_MSA__WD__WS_WT(AND_V, and.v) |
| 643 | DO_MSA__WD__WS_WT(NOR_V, nor.v) |
| 644 | DO_MSA__WD__WS_WT(OR_V, or.v) |
| 645 | DO_MSA__WD__WS_WT(XOR_V, xor.v) |
| 646 | |
| 647 | |
| 648 | /* |
| 649 | * Move |
| 650 | * ---- |
| 651 | */ |
| 652 | |
| 653 | DO_MSA__WD__WS(MOVE_V, move.v) |
| 654 | |
| 655 | |
| 656 | /* |
| 657 | * Pack |
| 658 | * ---- |
| 659 | */ |
| 660 | |
| 661 | DO_MSA__WD__WS_WT(PCKEV_B, pckev.b) |
| 662 | DO_MSA__WD__WD_WT(PCKEV_B__DDT, pckev.b) |
| 663 | DO_MSA__WD__WS_WD(PCKEV_B__DSD, pckev.b) |
| 664 | DO_MSA__WD__WS_WT(PCKEV_H, pckev.h) |
| 665 | DO_MSA__WD__WD_WT(PCKEV_H__DDT, pckev.h) |
| 666 | DO_MSA__WD__WS_WD(PCKEV_H__DSD, pckev.h) |
| 667 | DO_MSA__WD__WS_WT(PCKEV_W, pckev.w) |
| 668 | DO_MSA__WD__WD_WT(PCKEV_W__DDT, pckev.w) |
| 669 | DO_MSA__WD__WS_WD(PCKEV_W__DSD, pckev.w) |
| 670 | DO_MSA__WD__WS_WT(PCKEV_D, pckev.d) |
| 671 | DO_MSA__WD__WD_WT(PCKEV_D__DDT, pckev.d) |
| 672 | DO_MSA__WD__WS_WD(PCKEV_D__DSD, pckev.d) |
| 673 | |
| 674 | DO_MSA__WD__WS_WT(PCKOD_B, pckod.b) |
| 675 | DO_MSA__WD__WD_WT(PCKOD_B__DDT, pckod.b) |
| 676 | DO_MSA__WD__WS_WD(PCKOD_B__DSD, pckod.b) |
| 677 | DO_MSA__WD__WS_WT(PCKOD_H, pckod.h) |
| 678 | DO_MSA__WD__WD_WT(PCKOD_H__DDT, pckod.h) |
| 679 | DO_MSA__WD__WS_WD(PCKOD_H__DSD, pckod.h) |
| 680 | DO_MSA__WD__WS_WT(PCKOD_W, pckod.w) |
| 681 | DO_MSA__WD__WD_WT(PCKOD_W__DDT, pckod.w) |
| 682 | DO_MSA__WD__WS_WD(PCKOD_W__DSD, pckod.w) |
| 683 | DO_MSA__WD__WS_WT(PCKOD_D, pckod.d) |
| 684 | DO_MSA__WD__WD_WT(PCKOD_D__DDT, pckod.d) |
| 685 | DO_MSA__WD__WS_WD(PCKOD_D__DSD, pckod.d) |
| 686 | |
| 687 | DO_MSA__WD__WS_WT(VSHF_B, vshf.b) |
| 688 | DO_MSA__WD__WD_WT(VSHF_B__DDT, vshf.b) |
| 689 | DO_MSA__WD__WS_WD(VSHF_B__DSD, vshf.b) |
| 690 | DO_MSA__WD__WS_WT(VSHF_H, vshf.h) |
| 691 | DO_MSA__WD__WD_WT(VSHF_H__DDT, vshf.h) |
| 692 | DO_MSA__WD__WS_WD(VSHF_H__DSD, vshf.h) |
| 693 | DO_MSA__WD__WS_WT(VSHF_W, vshf.w) |
| 694 | DO_MSA__WD__WD_WT(VSHF_W__DDT, vshf.w) |
| 695 | DO_MSA__WD__WS_WD(VSHF_W__DSD, vshf.w) |
| 696 | DO_MSA__WD__WS_WT(VSHF_D, vshf.d) |
| 697 | DO_MSA__WD__WD_WT(VSHF_D__DDT, vshf.d) |
| 698 | DO_MSA__WD__WS_WD(VSHF_D__DSD, vshf.d) |
| 699 | |
| 700 | |
| 701 | /* |
| 702 | * Shift |
| 703 | * ----- |
| 704 | */ |
| 705 | |
| 706 | DO_MSA__WD__WS_WT(SLL_B, sll.b) |
| 707 | DO_MSA__WD__WS_WT(SLL_H, sll.h) |
| 708 | DO_MSA__WD__WS_WT(SLL_W, sll.w) |
| 709 | DO_MSA__WD__WS_WT(SLL_D, sll.d) |
| 710 | |
| 711 | DO_MSA__WD__WS_WT(SRA_B, sra.b) |
| 712 | DO_MSA__WD__WS_WT(SRA_H, sra.h) |
| 713 | DO_MSA__WD__WS_WT(SRA_W, sra.w) |
| 714 | DO_MSA__WD__WS_WT(SRA_D, sra.d) |
| 715 | |
| 716 | DO_MSA__WD__WS_WT(SRAR_B, srar.b) |
| 717 | DO_MSA__WD__WS_WT(SRAR_H, srar.h) |
| 718 | DO_MSA__WD__WS_WT(SRAR_W, srar.w) |
| 719 | DO_MSA__WD__WS_WT(SRAR_D, srar.d) |
| 720 | |
| 721 | DO_MSA__WD__WS_WT(SRL_B, srl.b) |
| 722 | DO_MSA__WD__WS_WT(SRL_H, srl.h) |
| 723 | DO_MSA__WD__WS_WT(SRL_W, srl.w) |
| 724 | DO_MSA__WD__WS_WT(SRL_D, srl.d) |
| 725 | |
| 726 | DO_MSA__WD__WS_WT(SRLR_B, srlr.b) |
| 727 | DO_MSA__WD__WS_WT(SRLR_H, srlr.h) |
| 728 | DO_MSA__WD__WS_WT(SRLR_W, srlr.w) |
| 729 | DO_MSA__WD__WS_WT(SRLR_D, srlr.d) |
| 730 | |
| 731 | |
| 732 | #endif |