| 1 | /* |
| 2 | * Test for MISA changing C and related IALIGN alignment cases |
| 3 | * |
| 4 | * This test verifies that the "C" extension can be cleared and set in MISA, |
| 5 | * that a branch to 2-byte aligned instructions can be executed when "C" is |
| 6 | * enabled, and that a write to MISA which would increase IALIGN and cause |
| 7 | * the next instruction to be unaligned is ignored. |
| 8 | * |
| 9 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 10 | */ |
| 11 | |
| 12 | #define RVC (1 << ('C'-'A')) |
| 13 | #define RVV (1 << ('V'-'A')) |
| 14 | |
| 15 | .option norvc |
| 16 | .text |
| 17 | .global _start |
| 18 | _start: |
| 19 | lla t0, trap |
| 20 | csrw mtvec, t0 |
| 21 | |
| 22 | csrr t0, misa |
| 23 | li t1, RVC |
| 24 | not t1, t1 |
| 25 | and t0, t0, t1 |
| 26 | csrw misa, t0 |
| 27 | csrr t1, misa |
| 28 | li a0, 2 # fail code |
| 29 | bne t0, t1, _exit # Could not clear RVC in MISA |
| 30 | |
| 31 | li t1, RVC |
| 32 | or t0, t0, t1 |
| 33 | csrw misa, t0 |
| 34 | csrr t1, misa |
| 35 | li a0, 3 # fail code |
| 36 | bne t0, t1, _exit # Could not set RVC in MISA |
| 37 | |
| 38 | j unalign |
| 39 | . = . + 2 |
| 40 | unalign: |
| 41 | |
| 42 | li t1, RVC |
| 43 | not t1, t1 |
| 44 | and t0, t0, t1 |
| 45 | csrw misa, t0 |
| 46 | csrr t1, misa |
| 47 | li a0, 4 # fail code |
| 48 | beq t0, t1, _exit # Was able to clear RVC in MISA |
| 49 | |
| 50 | li t0, (RVC|RVV) |
| 51 | not t0, t0 |
| 52 | and t0, t0, t1 |
| 53 | csrw misa, t0 |
| 54 | csrr t0, misa |
| 55 | li a0, 5 # fail code |
| 56 | bne t0, t1, _exit # MISA write was not ignored (RVV was cleared) |
| 57 | |
| 58 | j realign |
| 59 | . = . + 2 |
| 60 | realign: |
| 61 | |
| 62 | # Success! |
| 63 | li a0, 0 |
| 64 | j _exit |
| 65 | |
| 66 | trap: |
| 67 | # Any trap is a fail code 1 |
| 68 | li a0, 1 |
| 69 | |
| 70 | # Exit code in a0 |
| 71 | _exit: |
| 72 | lla a1, semiargs |
| 73 | li t0, 0x20026 # ADP_Stopped_ApplicationExit |
| 74 | sd t0, 0(a1) |
| 75 | sd a0, 8(a1) |
| 76 | li a0, 0x20 # TARGET_SYS_EXIT_EXTENDED |
| 77 | |
| 78 | # Semihosting call sequence |
| 79 | .balign 16 |
| 80 | slli zero, zero, 0x1f |
| 81 | ebreak |
| 82 | srai zero, zero, 0x7 |
| 83 | j . |
| 84 | |
| 85 | .data |
| 86 | .balign 16 |
| 87 | semiargs: |
| 88 | .space 16 |