hw/intc/arm_gicv5: Add defines for GICv5 architected PPIs
The GICv5 defines architected numbers for the PPI sources like the generic timer and the PMU; these are different from the ones traditionally used by GICv2 and GICv3. Add defines for them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20260327111700.795099-14-peter.maydell@linaro.org
Peter Maydell committed
Mar 27, 2026 at 11:16 UTC
0d762c15c315afbc66dec57dc80011e6b1f4d15d
1 file changed
+20
include/hw/intc/arm_gicv5_types.h
+20
@@ -25,4 +25,24 @@ typedef enum GICv5Domain {
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#define NUM_GICV5_DOMAINS 4
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+/* Architected GICv5 PPIs (as listed in R_XDVCM) */
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+#define GICV5_PPI_S_DB_PPI 0
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+#define GICV5_PPI_RL_DB_PPI 1
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+#define GICV5_PPI_NS_DB_PPI 2
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+#define GICV5_PPI_SW_PPI 3
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+#define GICV5_PPI_HACDBSIRQ 15
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+#define GICV5_PPI_CNTHVS 19
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+#define GICV5_PPI_CNTHPS 20
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+#define GICV5_PPI_PMBIRQ 21
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+#define GICV5_PPI_COMMIRQ 22
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+#define GICV5_PPI_PMUIRQ 23
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+#define GICV5_PPI_CTIIRQ 24
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+#define GICV5_PPI_GICMNT 25
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+#define GICV5_PPI_CNTHP 26
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+#define GICV5_PPI_CNTV 27
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+#define GICV5_PPI_CNTHV 28
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+#define GICV5_PPI_CNTPS 29
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+#define GICV5_PPI_CNTP 30
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+#define GICV5_PPI_TRBIRQ 31
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+
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#endif