@samitouri / QOSamiQemu / commits / 0d762c15c3

hw/intc/arm_gicv5: Add defines for GICv5 architected PPIs

The GICv5 defines architected numbers for the PPI sources like the generic timer and the PMU; these are different from the ones traditionally used by GICv2 and GICv3. Add defines for them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20260327111700.795099-14-peter.maydell@linaro.org

Peter Maydell committed Mar 27, 2026 at 11:16 UTC 0d762c15c315afbc66dec57dc80011e6b1f4d15d
1 file changed +20
include/hw/intc/arm_gicv5_types.h
+20
@@ -25,4 +25,24 @@ typedef enum GICv5Domain {
25
26 #define NUM_GICV5_DOMAINS 4
27
28 +/* Architected GICv5 PPIs (as listed in R_XDVCM) */
29 +#define GICV5_PPI_S_DB_PPI 0
30 +#define GICV5_PPI_RL_DB_PPI 1
31 +#define GICV5_PPI_NS_DB_PPI 2
32 +#define GICV5_PPI_SW_PPI 3
33 +#define GICV5_PPI_HACDBSIRQ 15
34 +#define GICV5_PPI_CNTHVS 19
35 +#define GICV5_PPI_CNTHPS 20
36 +#define GICV5_PPI_PMBIRQ 21
37 +#define GICV5_PPI_COMMIRQ 22
38 +#define GICV5_PPI_PMUIRQ 23
39 +#define GICV5_PPI_CTIIRQ 24
40 +#define GICV5_PPI_GICMNT 25
41 +#define GICV5_PPI_CNTHP 26
42 +#define GICV5_PPI_CNTV 27
43 +#define GICV5_PPI_CNTHV 28
44 +#define GICV5_PPI_CNTPS 29
45 +#define GICV5_PPI_CNTP 30
46 +#define GICV5_PPI_TRBIRQ 31
47 +
48 #endif