hw/arm/fsl-imx8mm: Implemented support for SNVS
SNVS contains an RTC which allows Linux to deal correctly with time Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Gaurav Sharma <gaurav.sharma_7@nxp.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gaurav Sharma committed
Apr 21, 2026 at 12:22 UTC
0dade2f267ec222be9be8ea59964a91f30605cac
2 files changed
+12
hw/arm/fsl-imx8mm.c
+10
@@ -173,6 +173,8 @@ static void fsl_imx8mm_init(Object *obj)
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object_initialize_child(obj, "analog", &s->analog, TYPE_IMX8MP_ANALOG);
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+ object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS);
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+
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for (i = 0; i < FSL_IMX8MM_NUM_UARTS; i++) {
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g_autofree char *name = g_strdup_printf("uart%d", i + 1);
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object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);
@@ -355,6 +357,13 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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fsl_imx8mm_memmap[FSL_IMX8MM_OCRAM].addr,
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&s->ocram);
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+ /* SNVS */
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+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
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+ return;
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+ }
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+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0,
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+ fsl_imx8mm_memmap[FSL_IMX8MM_SNVS_HP].addr);
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+
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/* Unimplemented devices */
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for (i = 0; i < ARRAY_SIZE(fsl_imx8mm_memmap); i++) {
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switch (i) {
@@ -364,6 +373,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)
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case FSL_IMX8MM_GIC_REDIST:
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case FSL_IMX8MM_RAM:
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case FSL_IMX8MM_OCRAM:
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+ case FSL_IMX8MM_SNVS_HP:
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case FSL_IMX8MM_UART1 ... FSL_IMX8MM_UART4:
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/* device implemented and treated above */
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break;
include/hw/arm/fsl-imx8mm.h
+2
@@ -13,6 +13,7 @@
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#include "cpu.h"
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#include "hw/char/imx_serial.h"
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#include "hw/intc/arm_gicv3_common.h"
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+#include "hw/misc/imx7_snvs.h"
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#include "hw/misc/imx8mp_analog.h"
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#include "hw/misc/imx8mp_ccm.h"
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#include "qom/object.h"
@@ -37,6 +38,7 @@ struct FslImx8mmState {
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GICv3State gic;
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IMX8MPCCMState ccm;
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IMX8MPAnalogState analog;
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+ IMX7SNVSState snvs;
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IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];
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MemoryRegion ocram;
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};