target/riscv: Deprecate the shakti_c machine
The RISC-V shakti_c machine hasn't had meaningful contributions since 2021 and is currently unmaintained. The machine is scheduled to be removed as it appears to have no users. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com> Message-ID: <20260430052218.771358-3-alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Alistair Francis committed
Apr 30, 2026 at 15:22 UTC
0e466ba898a4eb8a11d6e108434e318534adfd20
2 files changed
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docs/about/deprecated.rst
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@@ -242,6 +242,13 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
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better reflects the way this property affects all random data within
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the device tree blob, not just the ``kaslr-seed`` node.
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+RISC-V Shakti machine (since 11.1)
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+''''''''''''''''''''''''''''''''''
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+
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+The RISC-V ``shakti_c`` machine hasn't had meaningful contributions since 2021
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+and is currently unmaintained. The machine is scheduled to be removed as it
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+appears to have no users.
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+
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Backend options
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---------------
hw/riscv/shakti_c.c
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@@ -83,6 +83,7 @@ static void shakti_c_machine_class_init(ObjectClass *klass, const void *data)
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mc->init = shakti_c_machine_state_init;
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mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C;
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mc->valid_cpu_types = valid_cpu_types;
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+ mc->deprecation_reason = "Currently unmaintained with no known users";
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mc->default_ram_id = "riscv.shakti.c.ram";
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}
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