@samitouri / QOSamiQemu / commits / 113ed8e53c

target/arm/cpu64: Mitigate migration failures due to spurious TCR_EL1, PIRE0_EL1 and PIR_EL1

Before linux v6.13 those registers were erroneously unconditionally exposed and this was fixed by commits: - 0fcb4eea5345 ("KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests") - a68cddbe47ef ("KVM: arm64: Hide S1PIE registers from userspace when disabled for guests") in v6.13. This means if we migrate from an old kernel host to a >= 6.13 kernel host, migration currently fails. Declare cpreg migration tolerance for those registers. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Sebastian Ott <sebott@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260420140552.104369-5-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Eric Auger committed Apr 20, 2026 at 16:03 UTC 113ed8e53c08a46af2d3307ece846caf5a719f99
1 file changed +28
target/arm/cpu64.c
+28
@@ -810,6 +810,33 @@ static void aarch64_a53_initfn(Object *obj)
810 define_cortex_a72_a57_a53_cp_reginfo(cpu);
811 }
812
813 +#if defined(CONFIG_KVM)
814 +static void kvm_arm_set_cpreg_mig_tolerances(ARMCPU *cpu)
815 +{
816 + /*
817 + * Registers that may be in the incoming stream and not exposed
818 + * on the destination
819 + */
820 +
821 + /*
822 + * TCR_EL1 was erroneously unconditionnally exposed before linux v6.13.
823 + * See commit 0fcb4eea5345 ("KVM: arm64: Hide TCR2_EL1 from userspace
824 + * when disabled for guests")
825 + */
826 + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 2, 0, 3),
827 + 0, 0, ToleranceNotOnBothEnds);
828 + /*
829 + * PIRE0_EL1 and PIR_EL1 were erroneously unconditionnally exposed
830 + * before linux v6.13. See commit a68cddbe47ef ("KVM: arm64: Hide
831 + * S1PIE registers from userspace when disabled for guests")
832 + */
833 + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 10, 2, 2),
834 + 0, 0, ToleranceNotOnBothEnds);
835 + arm_register_cpreg_mig_tolerance(cpu, ARM64_SYS_REG(3, 0, 10, 2, 3),
836 + 0, 0, ToleranceNotOnBothEnds);
837 +}
838 +#endif
839 +
840 static void aarch64_host_initfn(Object *obj)
841 {
842 ARMCPU *cpu = ARM_CPU(obj);
@@ -822,6 +849,7 @@ static void aarch64_host_initfn(Object *obj)
849 #endif
850
851 #if defined(CONFIG_KVM)
852 + kvm_arm_set_cpreg_mig_tolerances(cpu);
853 kvm_arm_set_cpu_features_from_host(cpu);
854 aarch64_add_sve_properties(obj);
855 #elif defined(CONFIG_HVF)