@samitouri / QOSamiQemu / commits / 14cc2db187

target/mips: Inline cpu_ld/st_mmuidx_ra() calls in LD/ST Multiple

In preparation of removing the cpu_ld*_mmuidx_ra() and cpu_st*_mmuidx_ra() calls, inline them. Expand MO_TE to mo_endian_env(env) in gen_ldst_multiple(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260417035734.32334-4-philmd@linaro.org>

Philippe Mathieu-Daudé committed Apr 16, 2026 at 22:31 UTC 14cc2db18750cb1c96dd1e20775a90a85bca0190
2 files changed +18 -18
target/mips/tcg/ldst_helper.c
+16 -18
@@ -215,21 +215,20 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
215 uint32_t memop_idx)
216 {
217 MemOpIdx oi = memop_idx;
218 - unsigned mem_idx = get_mmuidx(oi);
218 unsigned base_reglist = reglist & 0xf;
219 bool do_r31 = reglist & 0x10;
220 + target_ulong *gpr = env->active_tc.gpr;
221 + uintptr_t ra = GETPC();
222
223 if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
224 for (unsigned i = 0; i < base_reglist; i++) {
224 - env->active_tc.gpr[multiple_regs[i]] =
225 - (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC());
225 + gpr[multiple_regs[i]] = (target_long)cpu_ldl_mmu(env, addr, oi, ra);
226 addr += 4;
227 }
228 }
229
230 if (do_r31) {
231 - env->active_tc.gpr[31] =
232 - (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC());
231 + gpr[31] = (target_long)cpu_ldl_mmu(env, addr, oi, ra);
232 }
233 }
234
@@ -237,20 +236,20 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
236 uint32_t memop_idx)
237 {
238 MemOpIdx oi = memop_idx;
240 - unsigned mem_idx = get_mmuidx(oi);
239 unsigned base_reglist = reglist & 0xf;
240 bool do_r31 = reglist & 0x10;
241 + target_ulong *gpr = env->active_tc.gpr;
242 + uintptr_t ra = GETPC();
243
244 if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
245 for (unsigned i = 0; i < base_reglist; i++) {
246 - cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
247 - mem_idx, GETPC());
246 + cpu_stl_mmu(env, addr, gpr[multiple_regs[i]], oi, ra);
247 addr += 4;
248 }
249 }
250
251 if (do_r31) {
253 - cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
252 + cpu_stl_mmu(env, addr, gpr[31], oi, ra);
253 }
254 }
255
@@ -259,21 +258,20 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
258 uint32_t memop_idx)
259 {
260 MemOpIdx oi = memop_idx;
262 - unsigned mem_idx = get_mmuidx(oi);
261 unsigned base_reglist = reglist & 0xf;
262 bool do_r31 = reglist & 0x10;
263 + target_ulong *gpr = env->active_tc.gpr;
264 + uintptr_t ra = GETPC();
265
266 if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
267 for (unsigned i = 0; i < base_reglist; i++) {
268 - env->active_tc.gpr[multiple_regs[i]] =
269 - cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC());
268 + gpr[multiple_regs[i]] = cpu_ldq_mmu(env, addr, oi, ra);
269 addr += 8;
270 }
271 }
272
273 if (do_r31) {
275 - env->active_tc.gpr[31] =
276 - cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC());
274 + gpr[31] = cpu_ldq_mmu(env, addr, oi, ra);
275 }
276 }
277
@@ -281,20 +279,20 @@ void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
279 uint32_t memop_idx)
280 {
281 MemOpIdx oi = memop_idx;
284 - unsigned mem_idx = get_mmuidx(oi);
282 unsigned base_reglist = reglist & 0xf;
283 bool do_r31 = reglist & 0x10;
284 + target_ulong *gpr = env->active_tc.gpr;
285 + uintptr_t ra = GETPC();
286
287 if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {
288 for (unsigned i = 0; i < base_reglist; i++) {
290 - cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
291 - mem_idx, GETPC());
289 + cpu_stq_mmu(env, addr, gpr[multiple_regs[i]], oi, ra);
290 addr += 8;
291 }
292 }
293
294 if (do_r31) {
297 - cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
295 + cpu_stq_mmu(env, addr, gpr[31], oi, ra);
296 }
297 }
298
target/mips/tcg/micromips_translate.c.inc
+2
@@ -701,6 +701,8 @@ static void gen_ldst_multiple(DisasContext *ctx, uint32_t opc, int reglist,
701 return;
702 }
703
704 + mop |= mo_endian(ctx);
705 +
706 t0 = tcg_temp_new();
707
708 gen_base_offset_addr(ctx, t0, base, offset);