target/i386: add new AMD EPYC models for GMET enablement
Add models to expose Guest Mode Execute Trap (GMET) support, and add CPUID_SVM_GMET header definition so that future EPYC models can easily add default support. New models are: AMD EPYC-Milan-v4 AMD EPYC-Genoa-v3 AMD EPYC-Turin-v2 Cc: Babu Moger <babu.moger@amd.com> Cc: Nikunj A Dadhania <nikunj@amd.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jon Kohler <jon@nutanix.com> Link: https://lore.kernel.org/r/20260330193428.1663253-2-jon@nutanix.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jon Kohler committed
Mar 30, 2026 at 12:34 UTC
1df0984830b3dcd7f4985367636db046686e7911
2 files changed
+35
target/i386/cpu.c
+34
@@ -6836,6 +6836,16 @@ static const X86CPUDefinition builtin_x86_defs[] = {
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},
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.cache_info = &epyc_milan_v3_cache_info
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},
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+ {
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+ .version = 4,
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+ .props = (PropValue[]) {
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+ { "gmet", "on" },
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+ { "model-id",
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+ "AMD EPYC-Milan-v4 Processor" },
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+ { /* end of list */ }
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+ },
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+ .cache_info = &epyc_milan_v3_cache_info
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+ },
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{ /* end of list */ }
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}
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},
@@ -6933,6 +6943,16 @@ static const X86CPUDefinition builtin_x86_defs[] = {
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},
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.cache_info = &epyc_genoa_v2_cache_info
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},
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+ {
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+ .version = 3,
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+ .props = (PropValue[]) {
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+ { "gmet", "on" },
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+ { "model-id",
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+ "AMD EPYC-Genoa-v3 Processor" },
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+ { /* end of list */ }
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+ },
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+ .cache_info = &epyc_genoa_v2_cache_info
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+ },
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{ /* end of list */ }
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}
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},
@@ -7163,6 +7183,20 @@ static const X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x80000022,
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.model_id = "AMD EPYC-Turin Processor",
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.cache_info = &epyc_turin_cache_info,
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+ .versions = (X86CPUVersionDefinition[]) {
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+ { .version = 1 },
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+ {
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+ .version = 2,
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+ .props = (PropValue[]) {
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+ { "gmet", "on" },
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+ { "model-id",
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+ "AMD EPYC-Turin-v2 Processor" },
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+ { /* end of list */ }
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+ },
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+ .cache_info = &epyc_turin_cache_info
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+ },
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+ { /* end of list */ }
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+ }
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},
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};
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target/i386/cpu.h
+1
@@ -879,6 +879,7 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
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#define CPUID_SVM_AVIC (1U << 13)
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#define CPUID_SVM_V_VMSAVE_VMLOAD (1U << 15)
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#define CPUID_SVM_VGIF (1U << 16)
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+#define CPUID_SVM_GMET (1U << 17)
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#define CPUID_SVM_VNMI (1U << 25)
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#define CPUID_SVM_SVME_ADDR_CHK (1U << 28)
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