target/hppa: Define PA[20|1X] physical address space size
When converting virtual to physical addresses, TARGET_PHYS_ADDR_SPACE_BITS is used under PA-RISC 2.0, and an explicit cast to uint32_t is used under PA-RISC 1.X. Replace the former with a more specific macro limited to mem_helper.c, and make the latter conversion explicit by defining the size of the physical address space for PA-RISC 1.X. Note: while 44 bits should be used for the 64-bit address space running a C3700, 40 bits is still chosen as this is expected by the SeaBIOS functional test. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Anton Johansson <anjo@rev.ng> Message-ID: <20260218-phys_addr-v6-1-a603bf363218@rev.ng> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Anton Johansson committed
Dec 9, 2025 at 14:56 UTC
2b581da051094468706b86806629067ef49937de
2 files changed
+28
-5
target/hppa/cpu.h
+1
@@ -336,6 +336,7 @@ static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,
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return hppa_form_gva_mask(env->gva_offset_mask, spc, off);
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}
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+hwaddr hppa_abs_to_phys_pa1x(vaddr addr);
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hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr);
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hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr);
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target/hppa/mem_helper.c
+27
-5
@@ -29,6 +29,28 @@
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#include "hw/core/cpu.h"
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#include "trace.h"
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+/*
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+ * 64-bit (PA-RISC 2.0) machines are assumed to run PA-8700, and 32-bit
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+ * machines 7300LC. This should give 44 and 32 bits of physical address
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+ * space respectively.
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+ *
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+ * CPU model Physical address space bits
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+ * PA-7000--7300LC 32
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+ * PA-8000--8600 40
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+ * PA-8700--8900 44
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+ *
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+ * FIXME: However, the SeaBIOS firmware that is that tested against
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+ * uses 40-bit physical addresses, despite supposedly running a C3700
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+ * with a PA-8700 cpu, so use 40-bits for 64-bit.
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+ */
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+#define HPPA_PHYS_ADDR_SPACE_BITS_PA20 40
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+#define HPPA_PHYS_ADDR_SPACE_BITS_PA1X 32
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+
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+hwaddr hppa_abs_to_phys_pa1x(vaddr addr)
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+{
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+ return extract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA1X);
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+}
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+
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hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
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{
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/*
@@ -42,8 +64,8 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)
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* Since the supported physical address space is below 54 bits, the
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* H-8 algorithm is moot and all that is left is to truncate.
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*/
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- QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 54);
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- return sextract64(addr, 0, TARGET_PHYS_ADDR_SPACE_BITS);
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+ QEMU_BUILD_BUG_ON(HPPA_PHYS_ADDR_SPACE_BITS_PA20 > 54);
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+ return sextract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
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}
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hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
@@ -67,7 +89,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)
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* is what can be seen on physical machines too.
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*/
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addr = (uint32_t)addr;
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- addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4);
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+ addr |= -1ull << (HPPA_PHYS_ADDR_SPACE_BITS_PA20 - 4);
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}
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return addr;
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}
@@ -217,7 +239,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
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if (hppa_is_pa20(env)) {
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phys = hppa_abs_to_phys_pa2_w0(addr);
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} else {
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- phys = (uint32_t)addr;
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+ phys = hppa_abs_to_phys_pa1x(addr);
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}
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break;
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default:
@@ -558,7 +580,7 @@ static void itlbt_pa20(CPUHPPAState *env, target_ulong r1,
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/* Align per the page size. */
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ent->pa &= TARGET_PAGE_MASK << mask_shift;
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/* Ignore the bits beyond physical address space. */
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- ent->pa = sextract64(ent->pa, 0, TARGET_PHYS_ADDR_SPACE_BITS);
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+ ent->pa = sextract64(ent->pa, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);
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ent->t = extract64(r2, 61, 1);
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ent->d = extract64(r2, 60, 1);