@samitouri / QOSamiQemu / commits / 2ff50ac99b

target/mips: Inline cpu_ld{uw,l}_code() calls in set_badinstr_registers

In preparation of removing the cpu_lduw_code() and cpu_ldl_code() wrappers, inline them. Directly replace MO_TE by mo_endian_env(env). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260320074555.33974-2-philmd@linaro.org>

Philippe Mathieu-Daudé committed Nov 21, 2025 at 09:16 UTC 2ff50ac99ba4bfb5b292cd944d1e38f8a091ada3
1 file changed +13 -5
target/mips/tcg/system/tlb_helper.c
+13 -5
@@ -999,16 +999,22 @@ static void set_hflags_for_handler(CPUMIPSState *env)
999
1000 static inline void set_badinstr_registers(CPUMIPSState *env)
1001 {
1002 + CPUState *cs = env_cpu(env);
1003 + MemOpIdx oi;
1004 +
1005 if (env->insn_flags & ISA_NANOMIPS32) {
1006 if (env->CP0_Config3 & (1 << CP0C3_BI)) {
1004 - uint32_t instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16;
1007 + uint32_t instr;
1008 +
1009 + oi = make_memop_idx(mo_endian_env(env) | MO_UW, cpu_mmu_index(cs, true));
1010 + instr = cpu_ldw_code_mmu(env, env->active_tc.PC, oi, 0) << 16;
1011 if ((instr & 0x10000000) == 0) {
1006 - instr |= cpu_lduw_code(env, env->active_tc.PC + 2);
1012 + instr |= cpu_ldw_code_mmu(env, env->active_tc.PC + 2, oi, 0);
1013 }
1014 env->CP0_BadInstr = instr;
1015
1016 if ((instr & 0xFC000000) == 0x60000000) {
1011 - instr = cpu_lduw_code(env, env->active_tc.PC + 4) << 16;
1017 + instr = cpu_ldw_code_mmu(env, env->active_tc.PC + 4, oi, 0) << 16;
1018 env->CP0_BadInstrX = instr;
1019 }
1020 }
@@ -1019,12 +1025,14 @@ static inline void set_badinstr_registers(CPUMIPSState *env)
1025 /* TODO: add BadInstr support for microMIPS */
1026 return;
1027 }
1028 +
1029 + oi = make_memop_idx(mo_endian_env(env) | MO_UL, cpu_mmu_index(cs, true));
1030 if (env->CP0_Config3 & (1 << CP0C3_BI)) {
1023 - env->CP0_BadInstr = cpu_ldl_code(env, env->active_tc.PC);
1031 + env->CP0_BadInstr = cpu_ldl_code_mmu(env, env->active_tc.PC, oi, 0);
1032 }
1033 if ((env->CP0_Config3 & (1 << CP0C3_BP)) &&
1034 (env->hflags & MIPS_HFLAG_BMASK)) {
1027 - env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 4);
1035 + env->CP0_BadInstrP = cpu_ldl_code_mmu(env, env->active_tc.PC - 4, oi, 0);
1036 }
1037 }
1038