target/mips: Move count_clock to MIPSCPU struct
The count_clock pointer is not something we can do a shallow copy of, as linux-user cpu_copy() does, and although it is a system-mode piece of state we unconditionally create it, so it is present also in user-mode. There isn't any need to keep this in the env struct rather than the CPU struct, so move it to avoid possible memory leaks or double-usage. This also puts it next to the other Clocks that this CPU has. I haven't seen any sanitizer reports about this field, so this is averting a possible problem rather than correcting an observed one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260317175031.3035740-4-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Peter Maydell committed
Mar 17, 2026 at 17:50 UTC
3687ff02bd16410d1a3e2b28e55da02cb84838a9
3 files changed
+11
-7
target/mips/cpu.c
+2
-2
@@ -449,7 +449,7 @@ static void mips_cp0_period_set(MIPSCPU *cpu)
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clock_set_mul_div(cpu->count_div, env->cpu_model->CCRes, 1);
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clock_set_source(cpu->count_div, cpu->clock);
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- clock_set_source(env->count_clock, cpu->count_div);
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+ clock_set_source(cpu->count_clock, cpu->count_div);
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}
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static void mips_cpu_realizefn(DeviceState *dev, Error **errp)
@@ -520,7 +520,7 @@ static void mips_cpu_initfn(Object *obj)
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cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, cpu, 0);
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cpu->count_div = clock_new(OBJECT(obj), "clk-div-count");
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- env->count_clock = clock_new(OBJECT(obj), "clk-count");
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+ cpu->count_clock = clock_new(OBJECT(obj), "clk-count");
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env->cpu_model = mcc->cpu_def;
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}
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target/mips/cpu.h
+1
-1
@@ -1188,7 +1188,6 @@ typedef struct CPUArchState {
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const mips_def_t *cpu_model;
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QEMUTimer *timer; /* Internal timer */
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- Clock *count_clock; /* CP0_Count clock */
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target_ulong exception_base; /* ExceptionBase input to the core */
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} CPUMIPSState;
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@@ -1206,6 +1205,7 @@ struct ArchCPU {
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CPUMIPSState env;
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Clock *clock;
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+ Clock *count_clock; /* CP0_Count clock */
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Clock *count_div; /* Divider for CP0_Count clock */
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CPUMIPSMVPContext *mvp;
target/mips/system/cp0_timer.c
+8
-4
@@ -29,14 +29,16 @@
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/* MIPS R4K timer */
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static uint32_t cpu_mips_get_count_val(CPUMIPSState *env)
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{
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+ MIPSCPU *cpu = env_archcpu(env);
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int64_t now_ns;
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now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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return env->CP0_Count +
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- (uint32_t)clock_ns_to_ticks(env->count_clock, now_ns);
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+ (uint32_t)clock_ns_to_ticks(cpu->count_clock, now_ns);
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}
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static void cpu_mips_timer_update(CPUMIPSState *env)
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{
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+ MIPSCPU *cpu = env_archcpu(env);
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uint64_t now_ns, next_ns;
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uint32_t wait;
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@@ -46,7 +48,7 @@ static void cpu_mips_timer_update(CPUMIPSState *env)
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if (!wait) {
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wait = UINT32_MAX;
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}
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- next_ns = now_ns + clock_ticks_to_ns(env->count_clock, wait);
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+ next_ns = now_ns + clock_ticks_to_ns(cpu->count_clock, wait);
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timer_mod(env->timer, next_ns);
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}
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@@ -85,11 +87,12 @@ void cpu_mips_store_count(CPUMIPSState *env, uint32_t count)
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* So env->timer may be NULL, which is also the case with KVM enabled so
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* treat timer as disabled in that case.
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*/
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+ MIPSCPU *cpu = env_archcpu(env);
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if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer) {
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env->CP0_Count = count;
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} else {
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/* Store new count register */
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- env->CP0_Count = count - (uint32_t)clock_ns_to_ticks(env->count_clock,
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+ env->CP0_Count = count - (uint32_t)clock_ns_to_ticks(cpu->count_clock,
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qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
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/* Update timer timer */
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cpu_mips_timer_update(env);
@@ -116,7 +119,8 @@ void cpu_mips_start_count(CPUMIPSState *env)
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void cpu_mips_stop_count(CPUMIPSState *env)
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{
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/* Store the current value */
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- env->CP0_Count += (uint32_t)clock_ns_to_ticks(env->count_clock,
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+ MIPSCPU *cpu = env_archcpu(env);
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+ env->CP0_Count += (uint32_t)clock_ns_to_ticks(cpu->count_clock,
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qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
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}
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