target/riscv: Fix pointer masking for virtual-machine load/store insns
The effective privilege of explicit memory accesses made by virtual-machine load/store instructions (HLV.* and HSV.*) is controlled by hstatus.SPVP. mstatus.MPRV does not affect these virtual-machine load/store instructions. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260421093715.2995067-5-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Frank Chang committed
Apr 21, 2026 at 17:37 UTC
40540c8a929f165420e775b41800262578e6712d
1 file changed
+15
-8
target/riscv/cpu_helper.c
+15
-8
@@ -217,16 +217,23 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env)
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RISCVPmPmm riscv_pm_get_virt_pmm(CPURISCVState *env)
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{
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#ifndef CONFIG_USER_ONLY
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- int priv_mode = cpu_address_mode(env);
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+ int priv_mode;
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+
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+ if (!riscv_cpu_cfg(env)->ext_ssnpm ||
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+ get_field(env->mstatus, MSTATUS_MXR) ||
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+ get_field(env->vsstatus, MSTATUS_MXR)) {
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+ return PMM_FIELD_DISABLED;
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+ }
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+
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+ priv_mode = get_field(env->hstatus, HSTATUS_SPVP);
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- if (priv_mode == PRV_U) {
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- return get_field(env->hstatus, HSTATUS_HUPMM);
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+ if (priv_mode == PRV_S) {
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+ /* Effective privilege mode: VS */
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+ return get_field(env->henvcfg, HENVCFG_PMM);
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} else {
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- if (get_field(env->hstatus, HSTATUS_SPVP)) {
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- return get_field(env->henvcfg, HENVCFG_PMM);
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- } else {
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- return get_field(env->senvcfg, SENVCFG_PMM);
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- }
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+ /* Effective privilege mode: VU */
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+ return (env->priv == PRV_U) ? get_field(env->hstatus, HSTATUS_HUPMM) :
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+ get_field(env->senvcfg, SENVCFG_PMM);
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}
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#else
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return PMM_FIELD_DISABLED;